Most things working on STM_NES now with more complete pinport_al.h
definitions. Still work left on the expansion port though.. Created *_CONN definitions so code doesn't get included for connectors that aren't present. Added a NES CPU write that doesn't toggle M2 but not sure if this will really be needed for MMC2 or not..
This commit is contained in:
Paul XPS
parent
9a963e06b1
commit
2013efe253
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@ -12,7 +12,7 @@ uint8_t dump_buff( buffer *buff ) {
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uint8_t bank;
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switch ( buff->mem_type ) {
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// #ifdef NES_CONN
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#ifdef NES_CONN
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case NESCPU_4KB:
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//mapper lower nibble specifies NES CPU A12-15
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if (buff->mapper > 0x0F) {
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@ -54,9 +54,9 @@ uint8_t dump_buff( buffer *buff ) {
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buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
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buff->last_idx, ~FALSE );
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break;
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// #endif
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#endif
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// #ifdef SNES_CONN
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#ifdef SNES_CONN
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case SNESROM_PAGE: //ROMSEL is always taken low
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//mapper byte specifies SNES CPU A15-8
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addrH |= (buff->mapper); //no shift needed
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@ -72,9 +72,9 @@ uint8_t dump_buff( buffer *buff ) {
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//id contains MSb of page when <256B buffer
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buff->last_idx, ~FALSE );
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break;
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// #endif
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#endif
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// #ifdef NES_CONN
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#ifdef NES_CONN
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case PRGROM:
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addrH |= 0x80; //$8000
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if (buff->mapper == MAP30) {
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@ -138,9 +138,9 @@ uint8_t dump_buff( buffer *buff ) {
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buff->cur_byte = nes_cpu_page_rd_poll( buff->data, addrH, buff->id,
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buff->last_idx, ~FALSE );
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break;
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// #endif
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#endif
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// #ifdef SNES_CONN
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#ifdef SNES_CONN
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case SNESROM:
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if (buff->mapper == LOROM) {
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addrH |= 0x80; //$8000 LOROM space
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@ -163,7 +163,7 @@ uint8_t dump_buff( buffer *buff ) {
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//id contains MSb of page when <256B buffer
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buff->last_idx, ~FALSE );
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break;
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// #endif
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#endif
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default:
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return ERR_BUFF_UNSUP_MEM_TYPE;
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@ -385,7 +385,7 @@ uint8_t flash_buff( buffer *buff ) {
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uint8_t bank;
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switch ( buff->mem_type ) {
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// #ifdef NES_CONN
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#ifdef NES_CONN
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case PRGROM: //$8000
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//Latest method used here!
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@ -508,9 +508,9 @@ uint8_t flash_buff( buffer *buff ) {
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case PRGRAM:
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write_page( addrH+0x60, buff, nes_cpu_wr);
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break;
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//#endif
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#endif
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//#ifdef SNES_CONN
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#ifdef SNES_CONN
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case SNESROM:
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if (buff->mapper == LOROM_5VOLT) {
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//LOROM banks start at $XX:8000
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@ -554,7 +554,7 @@ uint8_t flash_buff( buffer *buff ) {
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case SNESRAM:
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//warn addrX = ((buff->page_num)>>8);
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break;
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// #endif
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#endif
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default:
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return ERR_BUFF_UNSUP_MEM_TYPE;
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@ -1,5 +1,8 @@
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#include "gameboy.h"
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//only need this file if connector is present on the device
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#ifdef GB_CONN
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//=================================================================================================
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//
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// GAMEBOY operations
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@ -57,3 +60,6 @@ void dmg_wr( uint16_t addr, uint8_t data )
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{
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return;
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}
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#endif //GB_CONN
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@ -1,5 +1,8 @@
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#include "gba.h"
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//only need this file if connector is present on the device
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#ifdef GB_CONN
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//=================================================================================================
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//
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// GBA operations
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@ -57,3 +60,5 @@ void gba_wr( uint16_t addr, uint8_t data )
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{
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return;
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}
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#endif //GB_CONN
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@ -27,12 +27,22 @@ uint8_t io_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rd
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#define HWORD_LEN 2
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switch (opcode) {
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case IO_RESET: io_reset(); break;
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#ifdef NES_CONN
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case NES_INIT: nes_init(); break;
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#endif
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#ifdef SNES_CONN
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case SNES_INIT: snes_init(); break;
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#endif
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#ifdef GB_CONN
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case GAMEBOY_INIT: gameboy_init(); break;
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// case GBA_INIT: gba_init(); break;
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#endif
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#ifdef SEGA_CONN
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case SEGA_INIT: sega_init(); break;
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#endif
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#ifdef N64_CONN
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// case N64_INIT: n64_init(); break;
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#endif
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case SWIM_INIT:
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return swim_init(operand); break;
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case JTAG_INIT:
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@ -128,6 +138,7 @@ void io_reset()
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//set outputs as required
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//latch address of $0000
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//disable NES cart memories
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#ifdef NES_CONN
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void nes_init()
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{
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//start with a reset
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@ -167,7 +178,7 @@ void nes_init()
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ADDR_SET(0x0000);
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}
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#endif
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//SNES cartridge interfacing setup
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//set outputs as required
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@ -176,6 +187,7 @@ void nes_init()
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//reset high disables SRAM and puts INL carts in PRGM mode
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//Excersize caution calling this while NES/FC cart inserted on old kazzo versions
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//probably won't work if FC inserted due to EXP0-EXP6 short due to audio jumper on cart
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#ifdef SNES_CONN
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void snes_init()
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{
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//start with a reset
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@ -212,11 +224,13 @@ void snes_init()
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HADDR_SET(0x00);
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}
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#endif
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//GAMEBOY cartridge interfacing setup
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//set outputs as required
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//latch address of $0000
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//disable cart memories
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#ifdef GB_CONN
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void gameboy_init()
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{
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//start with a reset
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@ -255,12 +269,14 @@ void gameboy_init()
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#endif
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}
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#endif
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//GBA cartridge interfacing setup
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//set outputs as required
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//latch address of $0000
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//disable cart memories
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#ifdef GB_CONN
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void gba_init()
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{
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//start with a reset
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@ -294,12 +310,14 @@ void gba_init()
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ADDR_SET(0x0000);
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}
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#endif
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//SEGA Genesis/MegaDrive cartridge interfacing setup
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//set outputs as required
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//latch address of $00:0000
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//disable cart memories
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#ifdef SEGA_CONN
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void sega_init()
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{
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//start with a reset
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@ -338,7 +356,7 @@ void sega_init()
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HADDR_SET(0x00);
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}
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#endif
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//Initialization of SWIM "single wire interface module" communications
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//the SWIM pin depends on INL board design.
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@ -1,5 +1,8 @@
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#include "n64.h"
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//only need this file if connector is present on the device
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#ifdef N64_CONN
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//=================================================================================================
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//
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// N64 operations
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@ -57,3 +60,6 @@ void n64_wr( uint16_t addr, uint8_t data )
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{
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return;
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}
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#endif //N64_CONN
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@ -1,5 +1,8 @@
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#include "nes.h"
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//only need this file if connector is present on the device
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#ifdef NES_CONN
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//=================================================================================================
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//
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// NES operations
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@ -47,6 +50,9 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
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case NES_CPU_WR:
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nes_cpu_wr( operand, miscdata );
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break;
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case NES_M2_LOW_WR:
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nes_m2_low_wr( operand, miscdata );
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break;
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case NES_DUALPORT_WR:
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nes_dualport_wr( operand, miscdata );
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break;
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}
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/* Desc:NES CPU Write, but M2 remains low
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* Allows writes to flash, but not memory if M2 must be high for mapper to latch the write
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* A15 decoded to enable /ROMSEL
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* Note:addrH bit7 has no effect (ends up on PPU /A13)
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* EXP0 as-is
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* Pre: nes_init() setup of io pins
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* Post:data latched by anything listening on the bus
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* address left on bus
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* data left on bus, but pullup only
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* Rtn: None
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*/
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void nes_m2_low_wr( uint16_t addr, uint8_t data )
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{
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//Float EXP0 as it should be in NES
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//EXP0_IP_FL();
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//need for whole function
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//_DATA_OP();
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//set addrL
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//ADDR_OUT = addrL;
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//latch addrH
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//DATA_OUT = addrH;
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//_AHL_CLK();
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ADDR_SET(addr);
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//PRG R/W LO
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PRGRW_LO();
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//put data on bus
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DATA_OP();
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DATA_SET(data);
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//set M2 and /ROMSEL
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// M2_HI();
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if( addr >= 0x8000 ) { //addressing cart rom space
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ROMSEL_LO(); //romsel trails M2 during CPU operations
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}
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//give some time
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NOP();
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NOP();
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//latch data to cart memory/mapper
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// M2_LO();
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ROMSEL_HI();
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//retore PRG R/W to default
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PRGRW_HI();
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//Free data bus
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DATA_IP();
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}
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/* Desc:NES PPU Read
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* decode A13 from addrH to set /A13 as expected
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* Pre: nes_init() setup of io pins
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@ -1237,3 +1299,6 @@ void cdream_chrrom_flash_wr( uint16_t addr, uint8_t data )
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return;
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}
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#endif //NES_CONN
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@ -14,6 +14,7 @@ void disc_push_exp0_prgrom_wr( uint16_t addr, uint8_t data );
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uint8_t emulate_nes_cpu_rd( uint16_t addr );
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uint8_t nes_cpu_rd( uint16_t addr );
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void nes_cpu_wr( uint16_t addr, uint8_t data );
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void nes_m2_low_wr( uint16_t addr, uint8_t data );
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uint8_t nes_ppu_rd( uint16_t addr );
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void nes_ppu_wr( uint16_t addr, uint8_t data );
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uint8_t nes_dualport_rd( uint16_t addr );
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@ -406,9 +406,11 @@ uint8_t pinport_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_
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//opcode: type of operation
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//operand: value to place on bus
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//============================
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#ifndef STM_NES //HADDR not present when there's no 16bit console connector
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case HADDR_ENABLE_: HADDR_ENABLE(); break;
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case HADDR_DISABLE_: HADDR_DISABLE(); break;
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case HADDR_SET_: HADDR_SET(operand); break;
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#endif
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default:
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//macro doesn't exist or isn't on this PCB version
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@ -8,6 +8,25 @@
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//#define STM_INL6
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//#define STM_NES
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//define the connectors present on each device
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//these are used to exclude unecessary code from devices which don't have the connectors present
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#if defined(AVR_KAZZO) || defined(STM_ADAPTER)
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#define NES_CONN //includes famicom as definitions are effectively the same
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#define SNES_CONN
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#endif
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#ifdef STM_NES
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#define NES_CONN //famicom isn't actually present but a pin adapter should work
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#endif
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#if defined(STM_INL6) || defined(STM_INL6_PROTO)
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#define NES_CONN //includes famicom as definitions are effectively the same
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#define SNES_CONN
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#define SEGA_CONN
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#define GB_CONN
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#define N64_CONN
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#endif
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#ifdef AVR_CORE
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#include "avr_gpio.h"
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#include <avr/wdt.h>
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@ -298,11 +317,27 @@ void software_AXL_CLK();
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//
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//
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// STM32F070C6T6 "INL RETRO NES" V2.0N NESmaker edition
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// Orange solder mask
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// Labeled "INL RETRO PROGRAMMER DUMPER V2.0N"
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// Dated AUG 2018
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// Comparable to INL6, but only has NES connector
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// uses Flipflop for io expansion for A8-15 similar to original kazzos
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// this device is setup very similarly to STM_ADAPTER
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// AHL/AHLOE, AXL, EXP port, and CIC port are main differences
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//
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// AHL_OEn controls AHL flipflop clock and /OE
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// -also tied to CIC RESET, but this creates problems with CICs that wire OR RESET and DOUT
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// Only viable solution is to cut AHL_OEn away from CIC RESET
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// Don't have any reason that CIC RESET is needed at this point, and in reality it's the same
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// CIC mcu pin for stm8s001 CICs.. Perhaps I should have used stm32 pin PA1 shared with EXP1 (JTAG TDI)
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// CIC CLK connected to A0
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// CIC KEY DIN shared with NTSC 24Mhz
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// CIC KEY DOUT is also SWCLK
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// AXL does not exist
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// EXP0-3,6 has dedicated mcu pin
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// EXP4-5,7-8 connect to A4-7
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// EXP9 is shared with LED
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//
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@ -602,109 +637,23 @@ void software_AXL_CLK();
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#endif //STM_INL6 & PROTO
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#ifdef STM_NES
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// PC0 "M2" mcupinA3
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#define C0bank GPIOA
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#define C0 (3U)
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// PC1 "ROMSEL" mcupinA4
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#define C1bank GPIOA
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#define C1 (4U)
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// PC2 "PRGRW" mcupinA5
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#define C2bank GPIOA
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#define C2 (5U)
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// PC3 "FREE" mcupinA6
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#define C3bank GPIOA
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#define C3 (6U)
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// PC4 "CSRD" mcupinA7
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#define C4bank GPIOA
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#define C4 (7U)
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// PC5 "CSWR" mcupinB0
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#define C5bank GPIOB
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#define C5 (0U)
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// PC6 "CICE" mcupinA10
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#define C6bank GPIOA
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#define C6 (10U)
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// PC7 "AHL" mcupinB1
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// THIS IS FLIPFLOP /OE pin as well!
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#define C7bank GPIOB
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#define C7 (1U)
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// PC8 "EXP0" mcupinA0
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#define C8bank GPIOA
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#define C8 (0U)
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// PC9 "LED" mcupinC13
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#define C9bank GPIOC
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#define C9 (13U)
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// PC10 "IRQ" mcupinA15
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#define C10bank GPIOA
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#define C10 (15U)
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// PC11 "CIA10" mcupinA13
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#define C11bank GPIOA
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#define C11 (13U)
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// PC12 "BL"
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// Not defined
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#define C12nodef
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// PC13 "AXL"
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// Not present on STM_NES
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#define C13nodef
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// PC14 "AUDL"
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// Not defined
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#define C14nodef
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// PC15 "AUDR"
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// Not defined
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#define C15nodef
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// PC16 "GBP"
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// Not defined
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#define C16nodef
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// PC17 "SWD" mcupinA13
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// Not defined due to shared with CIRAM A10
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#define C17nodef
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// PC18 "SWC" mcupinA14
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#define C18bank GPIOA
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#define C18 (14U)
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||||
|
||||
// PC19 "AFL"
|
||||
// Not defined
|
||||
#define C19nodef
|
||||
|
||||
// PC20 "COUT"
|
||||
// Not defined
|
||||
#define C20nodef
|
||||
|
||||
// PC21 "FCAPU" double mapping of EXP0
|
||||
#define C21bank C8bank
|
||||
#define C21 C8
|
||||
|
||||
|
||||
#define RCC_AHBENR_CTL (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN)
|
||||
#define RCC_AHBENR_ADDR (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN)
|
||||
#define RCC_AHBENR_DATA RCC_AHBENR_GPIOBEN
|
||||
|
||||
#endif //STM_NES
|
||||
|
||||
|
||||
//TODO combine STM_NES & STM_ADAPTER, they're predominantly the same
|
||||
//STM_NES & STM_ADAPTER, they're predominantly the same
|
||||
//AHL-AHLOE, AXL, EXP port, and CIC port are only differences
|
||||
//The recommended wiring for STM_ADAPTER to CIC pins brings them even closer together..
|
||||
|
||||
#ifdef STM_ADAPTER
|
||||
// PC13 "AXL" mcupinA2
|
||||
#define C13bank GPIOA
|
||||
#define C13 (2U)
|
||||
#endif
|
||||
|
||||
#ifdef STM_NES
|
||||
// PC13 "AXL"
|
||||
// Not present on STM_NES, it uses this pin for EXP6 instead
|
||||
#define C13nodef
|
||||
#endif
|
||||
|
||||
#if defined (STM_ADAPTER) || defined(STM_NES)
|
||||
|
||||
// PC0 "M2" mcupinA3
|
||||
#define C0bank GPIOA
|
||||
|
|
@ -719,6 +668,8 @@ void software_AXL_CLK();
|
|||
#define C2 (5U)
|
||||
|
||||
// PC3 "FREE" mcupinA6
|
||||
// No connection on kazzo/stm adapter (recommend wire connection to CIC KEY DIN (pin34)
|
||||
// STM NES connects to CIC KEY DIN (pin34) & NTSC 24Mhz Clock
|
||||
#define C3bank GPIOA
|
||||
#define C3 (6U)
|
||||
#ifdef PURPLE_KAZZO
|
||||
|
|
@ -738,6 +689,8 @@ void software_AXL_CLK();
|
|||
#define C6 (10U)
|
||||
|
||||
// PC7 "AHL" mcupinB1
|
||||
// AH Flipflop /OE is grounded on kazzo/stmadapter
|
||||
// AH Flipflop /OE is tied to CLK with this "AHL_OEN" signal
|
||||
#define C7bank GPIOB
|
||||
#define C7 (1U)
|
||||
|
||||
|
|
@ -746,6 +699,7 @@ void software_AXL_CLK();
|
|||
#define C8 (0U)
|
||||
|
||||
// PC9 "LED" mcupinC13
|
||||
// This is also EXP9 on kazzo, stm adapter, and stm NES
|
||||
#define C9bank GPIOC
|
||||
#define C9 (13U)
|
||||
|
||||
|
|
@ -754,16 +708,16 @@ void software_AXL_CLK();
|
|||
#define C10 (15U)
|
||||
|
||||
// PC11 "CIA10" mcupinA13
|
||||
// This is also SWDIO pin
|
||||
#define C11bank GPIOA
|
||||
#define C11 (13U)
|
||||
|
||||
// PC12 "BL"
|
||||
// Not defined
|
||||
// Not defined because it's an MCU dedicated pin44 "BOOT0"
|
||||
#define C12nodef
|
||||
|
||||
// PC13 "AXL" mcupinA2
|
||||
#define C13bank GPIOA
|
||||
#define C13 (2U)
|
||||
// PC13 "AXL"
|
||||
// Differs between STM_ADAPTER and STM_NES so defined above
|
||||
|
||||
// PC14 "AUDL"
|
||||
// Not defined
|
||||
|
|
@ -782,6 +736,9 @@ void software_AXL_CLK();
|
|||
#define C17nodef
|
||||
|
||||
// PC18 "SWC" mcupinA14
|
||||
// This has no connection on STM_ADAPTER, recommended wire connection to CIC KEY DOUT (pin35)
|
||||
// STM_NES connects this to CIC KEY DOUT
|
||||
// PROBLEM... INL STM8 CIC cuts mcu pins by wire ORing RESET & DOUT...
|
||||
#define C18bank GPIOA
|
||||
#define C18 (14U)
|
||||
|
||||
|
|
@ -790,7 +747,7 @@ void software_AXL_CLK();
|
|||
#define C19nodef
|
||||
|
||||
// PC20 "COUT"
|
||||
// Not defined
|
||||
// Not defined but maybe it should be in place of SWC..
|
||||
#define C20nodef
|
||||
|
||||
// PC21 "FCAPU" double mapping of EXP0
|
||||
|
|
@ -802,7 +759,7 @@ void software_AXL_CLK();
|
|||
#define RCC_AHBENR_ADDR (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN)
|
||||
#define RCC_AHBENR_DATA RCC_AHBENR_GPIOBEN
|
||||
|
||||
#endif //STM_ADAPTER
|
||||
#endif //STM_ADAPTER & STM_NES
|
||||
|
||||
|
||||
#ifdef AVR_KAZZO
|
||||
|
|
@ -1072,7 +1029,7 @@ void software_AXL_CLK();
|
|||
#elif defined PURPLE_KAZZO
|
||||
#define AHL_CLK() CTL_SET_HI(AHLbank, AHL); CTL_SET_LO(AHLbank, AHL)
|
||||
#define AXL_CLK() CTL_SET_HI(FREEbank, FREE); CTL_SET_LO(FREEbank, FREE)
|
||||
#else
|
||||
#else //STM_NES ties AHL to the flipflop's /OE pin as well, so default should be low when address bus is enabled
|
||||
#define AHL_CLK() CTL_SET_HI(AHLbank, AHL); CTL_SET_LO(AHLbank, AHL)
|
||||
#define AXL_CLK() CTL_SET_HI(AXLbank, AXL); CTL_SET_LO(AXLbank, AXL)
|
||||
#endif
|
||||
|
|
@ -1266,6 +1223,9 @@ void software_AXL_CLK();
|
|||
// INL6 has direct pin access
|
||||
// -these pins also act as Data8-15 for Sega Genesis
|
||||
// -has separate pins dedicated to A16-23
|
||||
// STM_NES doesn't use a flipflop, has direct access or dual purposed pinning
|
||||
// EXP1-3,6 has dedicated mcu pin
|
||||
// EXP4-5,7-8 connect to A4-7
|
||||
// Directionality: All pins are forced output, or tristate. This maintains compatability
|
||||
// between all devices
|
||||
// Driver: All pins are push-pull, AVR & STM ADAPTER drive with 5v signals, INL6 drives with 3.3v
|
||||
|
|
@ -1307,21 +1267,38 @@ void software_AXL_CLK();
|
|||
#define E68bank GPIOA
|
||||
|
||||
//TODO this is not complete!!! it's still a copy paste from the prototype
|
||||
#define EXP_PU() E157bank->PUPDR |= (PUPDR_PU_ALL & 0xFFF00000); E68bank->PUPDR |= (PUPDR_PU_ALL & 0x30000300)
|
||||
#define EXP_IP() E157bank->MODER &=~(MODER_OP_ALL & 0xFFF00000); E68bank->MODER &=~(MODER_OP_ALL & 0x30000300)
|
||||
#define EXP_OP() E157bank->MODER |= (MODER_OP_ALL & 0xFFF00000); E68bank->MODER |= (MODER_OP_ALL & 0x30000300)
|
||||
#define EXP_PU() //E157bank->PUPDR |= (PUPDR_PU_ALL & 0xFFF00000); E68bank->PUPDR |= (PUPDR_PU_ALL & 0x30000300)
|
||||
#define EXP_IP() //E157bank->MODER &=~(MODER_OP_ALL & 0xFFF00000); E68bank->MODER &=~(MODER_OP_ALL & 0x30000300)
|
||||
#define EXP_OP() //E157bank->MODER |= (MODER_OP_ALL & 0xFFF00000); E68bank->MODER |= (MODER_OP_ALL & 0x30000300)
|
||||
//not sure these bit shift accesses will work if the value passed in is a uint8_t variable...
|
||||
#define EXP_SET(val) E157bank->ODR = ((E157bank->ODR & 0x03FF) | (val<<10 & 0x7C00) | (val<<9 & 0x8000)); E68bank->ODR = ((E68bank->ODR & 0xBFEF) | (val>>1 & 0x0010) | (val<<7 & 0x4000))
|
||||
#define EXP_SET(val) //E157bank->ODR = ((E157bank->ODR & 0x03FF) | (val<<10 & 0x7C00) | (val<<9 & 0x8000)); E68bank->ODR = ((E68bank->ODR & 0xBFEF) | (val>>1 & 0x0010) | (val<<7 & 0x4000))
|
||||
|
||||
#define EXP_EN_CLK() RCC->AHBENR |= RCC_AHBENR_EXP
|
||||
#define EXP_ENABLE() ADDR_EN_CLK(); EXP_OP()
|
||||
#define EXP_DISABLE() EXP_PU(); EXP_IP()
|
||||
#define EXP_EN_CLK() //RCC->AHBENR |= RCC_AHBENR_EXP
|
||||
#define EXP_ENABLE() //ADDR_EN_CLK(); EXP_OP()
|
||||
#define EXP_DISABLE() //EXP_PU(); EXP_IP()
|
||||
|
||||
#endif //STM_INL6
|
||||
|
||||
|
||||
#ifdef STM_NES
|
||||
//TODO
|
||||
//EXP1-3,6 has dedicated mcu pin
|
||||
// EXP1:PA1, EXP2:PC14, EXP3:PC15, EXP6:PA2
|
||||
//EXP4-5,7-8 connect to A4-7
|
||||
// EXP4:A4->PB6, EXP5:A5->PB7, EXP7:A6->PA8, EXP8:A7->PA9
|
||||
#define E1678bank GPIOA
|
||||
#define E45bank GPIOB
|
||||
#define E23bank GPIOC
|
||||
|
||||
//TODO
|
||||
#define EXP_PU()// E157bank->PUPDR |= (PUPDR_PU_ALL & 0xFFF00000); E68bank->PUPDR |= (PUPDR_PU_ALL & 0x30000300)
|
||||
#define EXP_IP()// E157bank->MODER &=~(MODER_OP_ALL & 0xFFF00000); E68bank->MODER &=~(MODER_OP_ALL & 0x30000300)
|
||||
#define EXP_OP()// E157bank->MODER |= (MODER_OP_ALL & 0xFFF00000); E68bank->MODER |= (MODER_OP_ALL & 0x30000300)
|
||||
//not sure these bit shift accesses will work if the value passed in is a uint8_t variable...
|
||||
#define EXP_SET(val)// E157bank->ODR = ((E157bank->ODR & 0x03FF) | (val<<10 & 0x7C00) | (val<<9 & 0x8000)); E68bank->ODR = ((E68bank->ODR & 0xBFEF) | (val>>1 & 0x0010) | (val<<7 & 0x4000))
|
||||
|
||||
#define EXP_EN_CLK()// RCC->AHBENR |= RCC_AHBENR_EXP
|
||||
#define EXP_ENABLE()// ADDR_EN_CLK(); EXP_OP()
|
||||
#define EXP_DISABLE()// EXP_PU(); EXP_IP()
|
||||
|
||||
#endif //STM_NES
|
||||
|
||||
|
|
@ -1385,7 +1362,7 @@ void software_AXL_CLK();
|
|||
// ---------------------------------------------------------------------------------------
|
||||
// HIGH ADDRESS PORT 8bits A16-23
|
||||
//
|
||||
// This port is present on all devices
|
||||
// This port is present on all devices with SNES connector
|
||||
// Restrictions: CANNOT be used when EXPANSION PORT is enabled
|
||||
// CIRAM_A10 & CIRAM /CE cannot be used on CONTROL PORT
|
||||
// Directionality: All pins are forced output
|
||||
|
|
@ -1401,7 +1378,7 @@ void software_AXL_CLK();
|
|||
//
|
||||
// ---------------------------------------------------------------------------------------
|
||||
|
||||
#if defined STM_INL6_PROTO
|
||||
#ifdef STM_INL6_PROTO
|
||||
|
||||
//A16-21 are on PB10-15 these also map to EXP1-5, & 7
|
||||
//A22-23 are on PA9-10 these also map to CIRAM A10 & CIRAM /CE respectively
|
||||
|
|
@ -1418,7 +1395,9 @@ void software_AXL_CLK();
|
|||
#define HADDR_ENABLE() HADDR_EN_CLK(); HADDR_OP()
|
||||
#define HADDR_DISABLE() HADDR_PU(); HADDR_IP()
|
||||
|
||||
#elif defined STM_INL6
|
||||
#endif //STM_INL6_PROTO
|
||||
|
||||
#ifdef STM_INL6
|
||||
|
||||
//A16-21 are on PB2-7 these also map to EXP1-5, & 7 (changed from prototype)
|
||||
//A22-23 are on PA9-10 these also map to CIRAM A10 & CIRAM /CE respectively
|
||||
|
|
@ -1435,12 +1414,15 @@ void software_AXL_CLK();
|
|||
#define HADDR_ENABLE() HADDR_EN_CLK(); HADDR_OP()
|
||||
#define HADDR_DISABLE() HADDR_PU(); HADDR_IP()
|
||||
|
||||
//end STM_INL6 & PROTO
|
||||
|
||||
//TODO STM_NES
|
||||
#endif //STM_INL6
|
||||
|
||||
|
||||
#else //AVR_KAZZO or STM_ADAPTER
|
||||
#ifdef STM_NES
|
||||
//HADDR is NOT PRESENT!
|
||||
#endif
|
||||
|
||||
//#else //AVR_KAZZO or STM_ADAPTER
|
||||
#if defined(AVR_KAZZO) || defined(STM_ADAPTER)
|
||||
|
||||
|
||||
// ADDR16-23 are behind AXL flipflop
|
||||
|
|
@ -1506,7 +1488,32 @@ void software_AXL_CLK();
|
|||
|
||||
#endif //STM_INL6 & PROTO
|
||||
|
||||
//TODO STM_NES
|
||||
#ifdef STM_NES
|
||||
//TODO BLINDLY COPIED FROM STM6, will not work AS-IS
|
||||
|
||||
// PE0 "A0" mcupinC0
|
||||
// TODO!!!
|
||||
#define E0bank //GPIOC
|
||||
#define E0 //(0U)
|
||||
|
||||
// PE1 "D0" //mcupinB2
|
||||
#define E1bank //GPIOB
|
||||
#define E1 //(2U)
|
||||
|
||||
// PE2 "D8" //mcupinB10
|
||||
#define E2bank //GPIOB
|
||||
#define E2 //(10U)
|
||||
|
||||
// PE3 "D9" //mcupinB11
|
||||
#define E3bank //GPIOB
|
||||
#define E3 //(11U)
|
||||
|
||||
// PE4 "D10" //mcupinB12
|
||||
#define E4bank //GPIOB
|
||||
#define E4 //(12U)
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef STM_ADAPTER
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
#include "sega.h"
|
||||
|
||||
//only need this file if connector is present on the device
|
||||
#ifdef SEGA_CONN
|
||||
|
||||
//=================================================================================================
|
||||
//
|
||||
// SEGA operations
|
||||
|
|
@ -57,3 +60,6 @@ void sega_wr( uint16_t addr, uint8_t data )
|
|||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
#endif //SEGA_CONN
|
||||
|
|
|
|||
|
|
@ -1,5 +1,8 @@
|
|||
#include "snes.h"
|
||||
|
||||
//only need this file if connector is present on the device
|
||||
#ifdef SNES_CONN
|
||||
|
||||
//=================================================================================================
|
||||
//
|
||||
// SNES operations
|
||||
|
|
@ -335,3 +338,5 @@ void snes_3v_flash_wr( uint16_t addr, uint8_t data )
|
|||
return;
|
||||
}
|
||||
|
||||
|
||||
#endif //SNES_CONN
|
||||
|
|
|
|||
|
|
@ -109,14 +109,19 @@ uint16_t usbFunctionSetup(uint8_t data[8]) {
|
|||
rv[RETURN_ERR_IDX] = io_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
|
||||
#ifdef NES_CONN
|
||||
case DICT_NES:
|
||||
rv[RETURN_ERR_IDX] = nes_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef SNES_CONN
|
||||
case DICT_SNES:
|
||||
rv[RETURN_ERR_IDX] = snes_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef GB_CONN
|
||||
case DICT_GAMEBOY:
|
||||
rv[RETURN_ERR_IDX] = gameboy_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
|
|
@ -124,14 +129,19 @@ uint16_t usbFunctionSetup(uint8_t data[8]) {
|
|||
case DICT_GBA:
|
||||
rv[RETURN_ERR_IDX] = gba_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef SEGA_CONN
|
||||
case DICT_SEGA:
|
||||
rv[RETURN_ERR_IDX] = sega_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef N64_CONN
|
||||
case DICT_N64:
|
||||
rv[RETURN_ERR_IDX] = n64_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break;
|
||||
#endif
|
||||
|
||||
case DICT_SWIM:
|
||||
rv[RETURN_ERR_IDX] = swim_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
|
|
|
|||
|
|
@ -63,6 +63,9 @@
|
|||
#define SET_CUR_BANK 0x20
|
||||
#define SET_BANK_TABLE 0x21
|
||||
|
||||
|
||||
#define NES_M2_LOW_WR 0x22 //like CPU WR, but M2 stays low
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND AND RETURN VALUE plus SUCCESS/ERROR_CODE
|
||||
//=============================================================================================
|
||||
|
|
|
|||
Loading…
Reference in New Issue