From 31678bacfe8702115c5b68b0ebbf643cea335246 Mon Sep 17 00:00:00 2001 From: Paul Molloy Date: Wed, 23 Nov 2016 18:12:50 -0600 Subject: [PATCH] renamed: host/source/pinport.h -> shared/shared_pinport.h modified: firmware/source/pinport.c modified: firmware/source/pinport.h -creating shared_pinport.h which is effectively a dictionary for pinport opcodes -file gets copied to host and firmware source dirs when compilied. -hardware macros had to be renamed to include underscore to differentiate opcode name from hardware macro. -pinport.c now is a nice clean switch between opcode name and macro with all literal numbers removed. -now don't have to manually track/update opcode numbers between multiple locations. modified: firmware/source/io.c modified: firmware/source/main.c -updates to add underscore pre-fix to hardware macros. --- firmware/source/io.c | 18 +- firmware/source/main.c | 8 +- firmware/source/pinport.c | 201 ++++++++-------- firmware/source/pinport.h | 224 +++++++++--------- .../pinport.h => shared/shared_pinport.h | 48 ++-- 5 files changed, 249 insertions(+), 250 deletions(-) rename host/source/pinport.h => shared/shared_pinport.h (85%) diff --git a/firmware/source/io.c b/firmware/source/io.c index 45526d3..27005c9 100644 --- a/firmware/source/io.c +++ b/firmware/source/io.c @@ -6,20 +6,20 @@ void io_pullup() { //pull up addr[7:0] bus - ADDR_IP(); - ADDR_HI(); + _ADDR_IP(); + _ADDR_HI(); //pull up data bus - DATA_IP(); - DATA_HI(); + _DATA_IP(); + _DATA_HI(); //pull up control port - CTL_IP(); - CTL_HI(); + _CTL_IP(); + _CTL_HI(); //pull up aux port - AUX_IP(); - AUX_HI(); + _AUX_IP(); + _AUX_HI(); //Aux port EXP /OE control //pull up on EXP FF should disable FF ouput @@ -29,7 +29,7 @@ void io_pullup() //NES PRG-ROM /OE (with pulldown) on old INL-ROM v1 boards w/pulldown //NED PRG-ROM /WE (with pullup) on INL-ROM v3 boards w/pullup //NES CPLD JTAG TDO non-5v tolerant - EXP0_FLT(); + _EXP0_FLT(); //LED LAST displaying complete.. } diff --git a/firmware/source/main.c b/firmware/source/main.c index 42f56e5..50be6e3 100644 --- a/firmware/source/main.c +++ b/firmware/source/main.c @@ -48,10 +48,10 @@ USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]) { switch(spacket->bRequest) { case REQ_LED_ON: - LED_ON(); //from macros + _LED_ON(); //from macros break; case REQ_LED_OFF: - LED_OFF(); + _LED_OFF(); break; default: return 1; @@ -128,9 +128,9 @@ int main() io_pullup(); //configure LED PORT/DDR - LED_OP(); + _LED_OP(); //boot with LED on to differentiate bettwen BL/RUN - LED_ON(); + _LED_ON(); //enable interrupts sei(); diff --git a/firmware/source/pinport.c b/firmware/source/pinport.c index 05a3e4f..8bc6769 100644 --- a/firmware/source/pinport.c +++ b/firmware/source/pinport.c @@ -1,20 +1,22 @@ #include #include "logic.h" #include "pinport.h" +#include "shared_pinport.h" //This file was created based on pinport.h //the close relationship between these two files must be kept in mind when making changes. -//This file is also very dependent on macro definitions in host app. -//the host app pinport.h was generated from this file, so any changes here must be forwarded. +//This file is also very dependent on shared_pinport.h +//the shared_pinport.h was generated from this file, so any changes here must be forwarded. /* Desc:Function takes an opcode which was transmitted via USB * then decodes it to call designated macro. + * shared_pinport.h is used in both host and fw to ensure opcodes/names align * Pre: Macro must be defined in firmware pinport.h - * opcode must align with host pinport.h otherwise who knows what you're calling + * opcode must be defined in shared-pinport.h * Post:Macro call complete. * Rtn: SUCCESS if opcode found, ERROR_UNKNOWN_OPCODE if opcode not present. */ -uint8_t pinport_macro( uint8_t opcode ) +uint8_t pinport_opcode2macro( uint8_t opcode ) { //these should be simple macros only for now //ie only changes one pin/port, macro doesn't call other macros yet @@ -24,154 +26,149 @@ uint8_t pinport_macro( uint8_t opcode ) //ADDR[7:0] PORTA //============================ //DDR-PORT MACROS - case 0: ADDR_IP(); break; - case 1: ADDR_OP(); break; - case 2: ADDR_LO(); break; - case 3: ADDR_HI(); break; + case ADDR_IP: _ADDR_IP(); break; + case ADDR_OP: _ADDR_OP(); break; + case ADDR_LO: _ADDR_LO(); break; + case ADDR_HI: _ADDR_HI(); break; //============================ //DATA[7:0] PORTB //============================ //DDR-PORT MACROS - case 4: DATA_IP(); break; - case 5: DATA_OP(); break; - case 6: DATA_LO(); break; - case 7: DATA_HI(); break; + case DATA_IP: _DATA_IP(); break; + case DATA_OP: _DATA_OP(); break; + case DATA_LO: _DATA_LO(); break; + case DATA_HI: _DATA_HI(); break; //============================ //CTL PORTC //============================ //DDR-PORT MACROS - case 8: CTL_IP(); break; + case CTL_IP: _CTL_IP(); break; // No CTL_OP() macro as some of these are inputs or bidir, best to individually assert as output - case 9: CTL_LO(); break; - case 10: CTL_HI(); break; + case CTL_LO: _CTL_LO(); break; + case CTL_HI: _CTL_HI(); break; //PIN MACROS - case 11: M2_IP(); break; - case 12: M2_OP(); break; - case 13: M2_LO(); break; - case 14: M2_HI(); break; + case M2_IP: _M2_IP(); break; + case M2_OP: _M2_OP(); break; + case M2_LO: _M2_LO(); break; + case M2_HI: _M2_HI(); break; - case 15: ROMSEL_IP(); break; - case 16: ROMSEL_OP(); break; - case 17: ROMSEL_LO(); break; - case 18: ROMSEL_HI(); break; + case ROMSEL_IP: _ROMSEL_IP(); break; + case ROMSEL_OP: _ROMSEL_OP(); break; + case ROMSEL_LO: _ROMSEL_LO(); break; + case ROMSEL_HI: _ROMSEL_HI(); break; - case 19: CICE_IP(); break; - case 20: CICE_OP(); break; - case 21: CICE_LO(); break; - case 22: CICE_HI(); break; - - case 23: PRGRW_IP(); break; - case 24: PRGRW_OP(); break; - case 25: PRGRW_WR(); break; //LO for writes - case 26: PRGRW_RD(); break; //Hi for reads + case PRGRW_IP: _PRGRW_IP(); break; + case PRGRW_OP: _PRGRW_OP(); break; + case PRGRW_WR: _PRGRW_WR(); break; //LO for writes + case PRGRW_RD: _PRGRW_RD(); break; //Hi for reads //give each def different version numbers to detect errors //where command given to board which doesn't have that function #ifdef PURPLE_KAZZO //purple boards only - case 27: p_AXL_ip(); break; //Don't use these, use software tied together versions instead. - case 28: p_AXL_op(); break; //Increases compatibility between versions - case 29: p_AXL_lo(); break; //Don't recommend calling lo/hi, use CLK instead - case 30: p_AXL_hi(); break; + case p_AXL_ip: _p_AXL_ip(); break; //Don't use these, use software tied together versions instead. + case p_AXL_op: _p_AXL_op(); break; //Increases compatibility between versions + case p_AXL_lo: _p_AXL_lo(); break; //Don't recommend calling lo/hi, use CLK instead + case p_AXL_hi: _p_AXL_hi(); break; #else //Green and final design - case 31: FREE_IP(); break; - case 32: FREE_OP(); break; - case 33: FREE_LO(); break; - case 34: FREE_HI(); break; + case FREE_IP: _FREE_IP(); break; + case FREE_OP: _FREE_OP(); break; + case FREE_LO: _FREE_LO(); break; + case FREE_HI: _FREE_HI(); break; #endif - case 35: CSRD_IP(); break; - case 36: CSRD_OP(); break; - case 37: CSRD_LO(); break; - case 38: CSRD_HI(); break; + case CSRD_IP: _CSRD_IP(); break; + case CSRD_OP: _CSRD_OP(); break; + case CSRD_LO: _CSRD_LO(); break; + case CSRD_HI: _CSRD_HI(); break; - case 39: CSWR_IP(); break; - case 40: CSWR_OP(); break; - case 41: CSWR_LO(); break; - case 42: CSWR_HI(); break; + case CSWR_IP: _CSWR_IP(); break; + case CSWR_OP: _CSWR_OP(); break; + case CSWR_LO: _CSWR_LO(); break; + case CSWR_HI: _CSWR_HI(); break; - case 43: CICE_IP(); break; - case 44: CICE_OP(); break; - case 45: CICE_LO(); break; - case 46: CICE_HI(); break; + case CICE_IP: _CICE_IP(); break; + case CICE_OP: _CICE_OP(); break; + case CICE_LO: _CICE_LO(); break; + case CICE_HI: _CICE_HI(); break; #ifdef GREEN_KAZZO - case 47: g_AXHL_IP(); break; - case 48: g_AXHL_OP(); break; - case 49: g_AXHL_lo(); break; //Don't recommend calling these as AXHL should be left low - case 50: g_AXHL_hi(); break; //That way AXHL_CLK(); is always effective + case g_AXHL_IP: _g_AXHL_IP(); break; + case g_AXHL_OP: _g_AXHL_OP(); break; + case g_AXHL_lo: _g_AXHL_lo(); break; //Don't recommend calling these as AXHL should be left low + case g_AXHL_hi: _g_AXHL_hi(); break; //That way AXHL_CLK(); is always effective #endif //purple and final design, safe to pretend green is similar due to software AHL/AXL CLK - case 51: AHL_IP(); break; - case 52: AHL_OP(); break; - case 53: AHL_lo(); break; //Don't recommend calling these as AHL should be left low - case 54: AHL_hi(); break; //That way AHL_CLK(); is always effective. + case AHL_IP: _AHL_IP(); break; + case AHL_OP: _AHL_OP(); break; + case AHL_lo: _AHL_lo(); break; //Don't recommend calling these as AHL should be left low + case AHL_hi: _AHL_hi(); break; //That way AHL_CLK(); is always effective. //also helps maintain validity of software AHL/AXL CLK //============================ //AUX PORTD //============================ //DDR-PORT MACROS - case 55: AUX_IP(); break; //Don't touch USB pins!!! + case AUX_IP: _AUX_IP(); break; //Don't touch USB pins!!! // No AUX_OP(); macro as many of these are inputs or bidir, best to individually assert as output - case 56: AUX_LO(); break; - case 57: AUX_HI(); break; + case AUX_LO: _AUX_LO(); break; + case AUX_HI: _AUX_HI(); break; //PIN MACROS //lower case aren't meant to be called unless certain pin is 5v tolerant - case 58: EXP0_ip(); break; - case 59: EXP0_op(); break; - case 60: EXP0_lo(); break; //Don't call this assuming EXP0 DDR is set to o/p - case 61: EXP0_hi(); break; //Don't call this unless you're certain pin is 5v tolerant + case EXP0_ip: _EXP0_ip(); break; + case EXP0_op: _EXP0_op(); break; + case EXP0_lo: _EXP0_lo(); break; //Don't call this assuming EXP0 DDR is set to o/p + case EXP0_hi: _EXP0_hi(); break; //Don't call this unless you're certain pin is 5v tolerant //User options pull up, force low, and float - case 62: EXP0_LO(); break; //Sets low then DDR to o/p - case 63: EXP0_PU(); break; //maybe add some NOP(); to allow time for pull up - case 64: EXP0_FLT(); break; //Set to i/p w/o pullup + case EXP0_LO: _EXP0_LO(); break; //Sets low then DDR to o/p + case EXP0_PU: _EXP0_PU(); break; //maybe add some NOP(); to allow time for pull up + case EXP0_FLT: _EXP0_FLT(); break; //Set to i/p w/o pullup - case 65: LED_IP(); break; - case 66: LED_OP(); break; - case 67: LED_OFF(); break; - case 68: LED_ON(); break; + case LED_IP: _LED_IP(); break; + case LED_OP: _LED_OP(); break; + case LED_OFF: _LED_OFF(); break; + case LED_ON: _LED_ON(); break; - case 69: IRQ_IP(); break; - case 70: IRQ_OP(); break; - case 71: IRQ_LO(); break; - case 72: IRQ_HI(); break; + case IRQ_IP: _IRQ_IP(); break; + case IRQ_OP: _IRQ_OP(); break; + case IRQ_LO: _IRQ_LO(); break; + case IRQ_HI: _IRQ_HI(); break; - case 73: CIA10_IP(); break; - case 74: CIA10_OP(); break; - case 75: CIA10_LO(); break; - case 76: CIA10_HI(); break; + case CIA10_IP: _CIA10_IP(); break; + case CIA10_OP: _CIA10_OP(); break; + case CIA10_LO: _CIA10_LO(); break; + case CIA10_HI: _CIA10_HI(); break; - case 77: BL_IP(); break; - case 78: BL_OP(); break; - case 79: BL_LO(); break; - case 80: BL_HI(); break; + case BL_IP: _BL_IP(); break; + case BL_OP: _BL_OP(); break; + case BL_LO: _BL_LO(); break; + case BL_HI: _BL_HI(); break; //#ifndef pg_XOE //FINAL_DESIGN //purple and green have versions of these which tie two pins together in software - case 81: AXLOE_IP(); break; - case 82: AXLOE_OP(); break; + case AXLOE_IP: _AXLOE_IP(); break; + case AXLOE_OP: _AXLOE_OP(); break; //Caution AXL_CLK() relies on EXPFF_OP() to be called beforehand // Think of it like you must enable the output before you can clock it. // Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled. #ifdef PURPLE_KAZZO or GREEN_KAZZO //purple and green versions - case 83: XOE_ip(); break; //Don't call these, use AXLOE instead - case 84: XOE_op(); break; - case 85: XOE_lo(); break; - case 86: XOE_hi(); break; + case XOE_ip: _XOE_ip(); break; //Don't call these, use AXLOE instead + case XOE_op: _XOE_op(); break; + case XOE_lo: _XOE_lo(); break; + case XOE_hi: _XOE_hi(); break; #endif //Same definition on all board versions //Only need to be cognizant that AXL_CLK won't work if EXPFF_FLT was called beforehand //This is only an issue on final design, so an error here should only cause probs on final design //Net effect is it it works on final design should be fine on other versions which is the goal - case 87: EXPFF_OP(); break; //FF /OE pin low->enable o/p - case 88: EXPFF_FLT(); break; //FF /OE pin high->disable o/p + case EXPFF_OP: _EXPFF_OP(); break; //FF /OE pin low->enable o/p + case EXPFF_FLT: _EXPFF_FLT(); break; //FF /OE pin high->disable o/p //AXL_CLK this is similar between purple and green versions, just on a different pin. //green boards don't have an AXL_CLK nor a AHL_CLK, as the two are combined. @@ -183,8 +180,8 @@ uint8_t pinport_macro( uint8_t opcode ) //case 88: software_AHL_CLK(); break; //#else //these two cases covers all designs with macro calling sofware versions for green board. - case 89: AXL_CLK(); break; - case 90: AHL_CLK(); break; + case AXL_CLK: _AXL_CLK(); break; + case AHL_CLK: _AHL_CLK(); break; //#endif //these work fine in hardware for purple and final. //green had to separate these two with software. @@ -235,13 +232,13 @@ void software_AXL_CLK() DATA_OUT = curAHLaddr; //set ADDR as O/P and place desired value on bus - ADDR_OP(); //should already be set, but in case not + _ADDR_OP(); //should already be set, but in case not ADDR_OUT = curAXLaddr; //Clock both latches - g_AXHL_OP(); //can't be sure "AHL" is OP as assumption is AXL will be used as latch - g_AXHL_lo(); //can't be sure it's low either - AXHL_CLK(); //clock values + _g_AXHL_OP(); //can't be sure "AHL" is OP as assumption is AXL will be used as latch + _g_AXHL_lo(); //can't be sure it's low either + _AXHL_CLK(); //clock values //finally restore original DATA & ADDR values DATA_OUT = curAXLaddr; @@ -271,13 +268,13 @@ void software_AHL_CLK() //Desired AHL latch value should have already been placed on DATA_OUT. //set ADDR as O/P and place curAXLaddr on bus other function should have updated it last latch - ADDR_OP(); //should already be set, but in case not + _ADDR_OP(); //should already be set, but in case not ADDR_OUT = curAXLaddr; //Clock both latches //Can assume AHL is OP as other versions would require it to latch AHL //Can also assume it was left low, if not causes issues in all board versions - AXHL_CLK(); //clock values + _AXHL_CLK(); //clock values //finally restore original DATA & ADDR values //never changed: DATA_OUT = curAHLaddr; diff --git a/firmware/source/pinport.h b/firmware/source/pinport.h index b584ebf..01946ac 100644 --- a/firmware/source/pinport.h +++ b/firmware/source/pinport.h @@ -1,7 +1,7 @@ #include #include "logic.h" -uint8_t pinport_macro( uint8_t opcode ); +uint8_t pinport_opcode2macro( uint8_t opcode ); void software_AHL_CLK(); void software_AXL_CLK(); @@ -158,6 +158,13 @@ void software_AXL_CLK(); // +//Firmware macro "functions" have underscore prefix +//opcode macros have identical name but without the prefix +//Haven't decided if PIN/PORT macros should be given underscore as well. +// Good chance I will want them with _ when writing read functions +// Easier to add them than take them out maybe..? +//Current rule is _ goes with () type macro + //============================ //ADDR[7:0] PORTA @@ -167,10 +174,10 @@ void software_AXL_CLK(); #define ADDR_IN PINA #define ADDR_DDR DDRA //DDR-PORT MACROS -#define ADDR_IP() ADDR_DDR = LO -#define ADDR_OP() ADDR_DDR = HI -#define ADDR_LO() ADDR_OUT = LO -#define ADDR_HI() ADDR_OUT = HI +#define _ADDR_IP() ADDR_DDR = LO +#define _ADDR_OP() ADDR_DDR = HI +#define _ADDR_LO() ADDR_OUT = LO +#define _ADDR_HI() ADDR_OUT = HI //============================ @@ -181,10 +188,10 @@ void software_AXL_CLK(); #define DATA_IN PINB #define DATA_DDR DDRB //DDR-PORT MACROS -#define DATA_IP() DATA_DDR = LO -#define DATA_OP() DATA_DDR = HI -#define DATA_LO() DATA_OUT = LO -#define DATA_HI() DATA_OUT = HI +#define _DATA_IP() DATA_DDR = LO +#define _DATA_OP() DATA_DDR = HI +#define _DATA_LO() DATA_OUT = LO +#define _DATA_HI() DATA_OUT = HI //============================ @@ -195,10 +202,10 @@ void software_AXL_CLK(); #define CTL_IN PINC #define CTL_DDR DDRC //DDR-PORT MACROS -#define CTL_IP() CTL_DDR = LO +#define _CTL_IP() CTL_DDR = LO // No CTL_OP() macro as some of these are inputs or bidir, best to individually assert as output -#define CTL_LO() CTL_OUT = LO -#define CTL_HI() CTL_OUT = HI +#define _CTL_LO() CTL_OUT = LO +#define _CTL_HI() CTL_OUT = HI //PIN DEFN #define M2 PC0 //NES, FC, & SNES (SYSCLK) @@ -222,75 +229,70 @@ void software_AXL_CLK(); #endif //PIN MACROS -#define M2_IP() CTL_DDR &= ~(1<enable o/p -#define EXPFF_FLT() AUX_OUT |= (1<disable o/p -//Caution AXL_CLK() relies on EXPFF_OP() to be called beforehand +#define _AXLOE_IP() AUX_DDR &= ~(1<enable o/p +#define _EXPFF_FLT() AUX_OUT |= (1<disable o/p +//Caution _AXL_CLK() relies on _EXPFF_OP() to be called beforehand // Think of it like you must enable the output before you can clock it. // Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled. -#define AXL_CLK() EXPFF_FLT(); EXPFF_OP(); //same name and convention as purple +#define _AXL_CLK() _EXPFF_FLT(); _EXPFF_OP(); //same name and convention as purple #else //purple and green versions -#define XOE_ip() AUX_DDR &= ~(1<enable o/p -#define XOE_hi() AUX_OUT |= (1<disable o/p +#define _XOE_ip() AUX_DDR &= ~(1<enable o/p +#define _XOE_hi() AUX_OUT |= (1<disable o/p //Final version ties XOEn and AXL to same pin, we can do this in software to make other ver behave similarly #endif #ifdef PURPLE_KAZZO -#define AXLOE_IP() XOE_ip(); p_AXL_ip(); -#define AXLOE_OP() XOE_op(); p_AXL_op(); -#define EXPFF_OP() XOE_lo(); p_AXL_lo(); -#define EXPFF_FLT() XOE_hi(); p_AXL_hi(); +#define _AXLOE_IP() _XOE_ip(); _p_AXL_ip(); +#define _AXLOE_OP() _XOE_op(); _p_AXL_op(); +#define _EXPFF_OP() _XOE_lo(); _p_AXL_lo(); +#define _EXPFF_FLT() _XOE_hi(); _p_AXL_hi(); #endif #ifdef GREEN_KAZZO //green can't tie AXL, just don't worry about clocking effect while enabling/disabling -#define AXLOE_IP() XOE_ip(); //run risk that AHL isn't O/P because AXL was made O/P instead -#define AXLOE_OP() XOE_op(); //sofware AXL/AHL clock covers this case though. -#define EXPFF_OP() XOE_lo(); -#define EXPFF_FLT() XOE_hi(); +#define _AXLOE_IP() _XOE_ip(); //run risk that AHL isn't O/P because AXL was made O/P instead +#define _AXLOE_OP() _XOE_op(); //sofware AXL/AHL clock covers this case though. +#define _EXPFF_OP() _XOE_lo(); +#define _EXPFF_FLT() _XOE_hi(); #endif diff --git a/host/source/pinport.h b/shared/shared_pinport.h similarity index 85% rename from host/source/pinport.h rename to shared/shared_pinport.h index af339df..4f6f16f 100644 --- a/host/source/pinport.h +++ b/shared/shared_pinport.h @@ -1,34 +1,32 @@ -#ifndef _pinport_h -#define _pinport_h +#ifndef _shared_pinport_h +#define _shared_pinport_h //This file was created based on firmware version of pinport.h and pinport.c //the close relationship between these two files must be kept in mind when making changes. //This file is also very dependent on macro definitions in firmware. //Any changes to this file must be applied to firmware. //Don't recommend changing opcodes or anything here, change them in fw first then apply here. +//making this a shared file helps cut room for error as changing opcode numbers here will +//inherently get forwarded to both firmware and app at same time. - //these should be simple macros only for now - //ie only changes one pin/port, macro doesn't call other macros yet - //made exception to this rule for EXP0 since doesn't vary on board versions - //switch (opcode) { //============================ //ADDR[7:0] PORTA //============================ //DDR-PORT MACROS -#define ADDR_IP 0 -#define ADDR_OP 1 -#define ADDR_LO 2 -#define ADDR_HI 3 +#define ADDR_IP 0 +#define ADDR_OP 1 +#define ADDR_LO 2 +#define ADDR_HI 3 //============================ //DATA[7:0] PORTB //============================ //DDR-PORT MACROS -#define DATA_IP 4 -#define DATA_OP 5 -#define DATA_LO 6 -#define DATA_HI 7 +#define DATA_IP 4 +#define DATA_OP 5 +#define DATA_LO 6 +#define DATA_HI 7 //============================ @@ -51,10 +49,12 @@ #define ROMSEL_LO 17 #define ROMSEL_HI 18 -#define CICE_IP 19 -#define CICE_OP 20 -#define CICE_LO 21 -#define CICE_HI 22 +//accidentally doubly defined... +//having this shared .h file helped as the compiler points out these issues... +//#define CICE_IP 19 +//#define CICE_OP 20 +//#define CICE_LO 21 +//#define CICE_HI 22 #define PRGRW_IP 23 #define PRGRW_OP 24 @@ -114,13 +114,13 @@ //PIN MACROS //lower case aren't meant to be called unless certain pin is 5v tolerant -#define EXP0_ip 58 -#define EXP0_op 59 -#define EXP0_lo 60 //Don't call this assuming EXP0 DDR is set to o/p -#define EXP0_hi 61 //Don't call this unless you're certain pin is 5v tolerant +#define EXP0_ip 58 +#define EXP0_op 59 +#define EXP0_lo 60 //Don't call this assuming EXP0 DDR is set to o/p +#define EXP0_hi 61 //Don't call this unless you're certain pin is 5v tolerant //User options pull up, force low, and float -#define EXP0_LO 62 //Sets low then DDR to o/p -#define EXP0_PU 63 //maybe add some NOP(); to allow time for pull up +#define EXP0_LO 62 //Sets low then DDR to o/p +#define EXP0_PU 63 //maybe add some NOP(); to allow time for pull up #define EXP0_FLT 64 //Set to i/p w/o pullup #define LED_IP 65