From 3e2bcea7e8d0f6c42b88f4e87535739b045ff7a7 Mon Sep 17 00:00:00 2001 From: Paul Black ASUS win7 Date: Thu, 12 Apr 2018 11:21:04 -0500 Subject: [PATCH] Added quick support to flash HH85 on BNROM. Dumped/flashed MMX on SNES v3 boards. created discrete_exp0_mapper_wr to try and write to mapper but not flash for discrete boards but doesn't seem to work for some reason so commented out for now. --- firmware/source/dump.c | 10 +++- firmware/source/flash.c | 59 ++++++++++--------- firmware/source/nes.c | 111 ++++++++++++++++++++++++++++++++++++ firmware/source/nes.h | 1 + host/scripts/inlretro.lua | 87 ++++++++++++++++++++-------- host/scripts/nes/bnrom.lua | 4 +- host/scripts/nes/nrom.lua | 1 + host/scripts/nes/unrom.lua | 2 + shared/shared_dict_buffer.h | 2 +- shared/shared_dict_nes.h | 2 + 10 files changed, 223 insertions(+), 56 deletions(-) diff --git a/firmware/source/dump.c b/firmware/source/dump.c index 241f97a..46fc438 100644 --- a/firmware/source/dump.c +++ b/firmware/source/dump.c @@ -27,18 +27,24 @@ uint8_t dump_buff( buffer *buff ) { bank = (buff->page_num)>>6; //Nomolos bank table @ CC84 nes_cpu_wr( (0xCC84+bank), bank ); + //nes_cpu_wr( (0xE473+bank), bank ); buff->cur_byte = nes_cpu_page_rd_poll( buff->data, addrH, buff->id, //id contains MSb of page when <256B buffer buff->last_idx, ~FALSE ); break; } - if (buff->mapper == BxROM) { + if ((buff->mapper == BxROM) || (buff->mapper == CDREAM)) { //write bank value to bank table //page_num shift by 7 bits A15 >> A8(0) bank = (buff->page_num)>>7; //Lizard bank table @ FF94 - nes_cpu_wr( (0xFF94+bank), bank ); + //nes_cpu_wr( (0xFF94+bank), bank ); + //HH85 + nes_cpu_wr( (0xFFE0+bank), bank ); + //Mojon bank table @ FF94 + //nes_cpu_wr( 0x800C, 0x00); //select first bank (only one with table) + //nes_cpu_wr( (0xCC43+bank), bank ); //then select desired bank } if (buff->mapper == A53) { //write bank value to bank table diff --git a/firmware/source/flash.c b/firmware/source/flash.c index 2c8fd95..93bc5d3 100644 --- a/firmware/source/flash.c +++ b/firmware/source/flash.c @@ -49,18 +49,18 @@ uint8_t write_page( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlo //retry if write failed //this helped but still seeing similar fails to dumps - // if (read == buff->data[n]) { - n++; - cur++; - // LED_IP_PU(); - // LED_LO(); - // } else { - // nes_cpu_wr(0x5000, 0x81); //outer reg select mode - // nes_cpu_wr(0x8000, bank); //outer bank - // nes_cpu_wr(0x5000, 0x00); //chr reg select act like CNROM - // LED_OP(); - // LED_HI(); - // } +// if (read == buff->data[n]) { + n++; + cur++; +// LED_IP_PU(); +// LED_LO(); +// } else { +// nes_cpu_wr(0x5000, 0x81); //outer reg select mode +// nes_cpu_wr(0x8000, bank); //outer bank +// nes_cpu_wr(0x5000, 0x00); //chr reg select act like CNROM +// LED_OP(); +// LED_HI(); +// } } @@ -81,6 +81,7 @@ uint8_t write_page_bank( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t //select first bank for unlock sequence //needs to be written to bank table! nes_cpu_wr( (0xCC84), 0x00 ); +// nes_cpu_wr( (0xE473), 0x00 ); //wr_func( 0x5555, 0xAA ); wr_func( unlock1, 0xAA ); @@ -92,6 +93,7 @@ uint8_t write_page_bank( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t //now need to select bank for the actual write! //but this write can't be applied to the PRG-ROM nes_cpu_wr( (0xCC84+bank), bank ); + // nes_cpu_wr( (0xE473+bank), bank ); wr_func( ((addrH<<8)| n), buff->data[n] ); @@ -103,18 +105,15 @@ uint8_t write_page_bank( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t //retry if write failed //this helped but still seeing similar fails to dumps - // if (read == buff->data[n]) { - n++; - cur++; - // LED_IP_PU(); - // LED_LO(); - // } else { - // nes_cpu_wr(0x5000, 0x81); //outer reg select mode - // nes_cpu_wr(0x8000, bank); //outer bank - // nes_cpu_wr(0x5000, 0x00); //chr reg select act like CNROM - // LED_OP(); - // LED_HI(); - // } + if (read == buff->data[n]) { + n++; + cur++; + LED_IP_PU(); + LED_LO(); + } else { + LED_OP(); + LED_HI(); + } } @@ -525,16 +524,20 @@ uint8_t flash_buff( buffer *buff ) { //write bank value //page_num shift by 6 bits A14 >> A8(0) bank = buff->page_num >> 6; - //Nomolos banktable location - nes_cpu_wr( (0xCC84+bank), bank ); + //bank gets written inside flash algo write_page_bank( bank, addrH, 0x5555, 0x2AAA, buff, discrete_exp0_prgrom_wr, nes_cpu_rd ); } - if (buff->mapper == BxROM) { + if ((buff->mapper == BxROM) || (buff->mapper == CDREAM)) { //write bank value //page_num shift by 7 bits A15 >> A8(0) bank = buff->page_num >> 7; //Lizard banktable location - nes_cpu_wr( (0xFF94+bank), bank ); + //nes_cpu_wr( (0xFF94+bank), bank ); + //hh85 + nes_cpu_wr( (0xFFE0+bank), bank ); + //Mojontales + //nes_cpu_wr( 0x800C, 0x00); //select first bank (only bank with table) + //nes_cpu_wr( (0xCC43+bank), bank ); //then select desired bank write_page( 0, (0x80 | addrH), 0x5555, 0x2AAA, buff, discrete_exp0_prgrom_wr, nes_cpu_rd ); } if (buff->mapper == A53) { diff --git a/firmware/source/nes.c b/firmware/source/nes.c index eb96ec0..2361c45 100644 --- a/firmware/source/nes.c +++ b/firmware/source/nes.c @@ -38,6 +38,9 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r case NES_CPU_WR: nes_cpu_wr( operand, miscdata ); break; +// case DISCRETE_EXP0_MAPPER_WR: +// discrete_exp0_mapper_wr( operand, miscdata ); +// break; //8bit return values: // case EMULATE_NES_CPU_RD: @@ -98,6 +101,114 @@ void discrete_exp0_prgrom_wr( uint16_t addr, uint8_t data ) DATA_IP(); } + +/* Desc: Discrete board MAPPER write without bus conflicts + * will also write to PRG-ROM, but PRG-ROM shouldn't output + * data while writting to mapper. Thus removing need for bank table. + * NOTE: I think it would be possible to write one value to mapper + * and another value to PRG-ROM. + * PRG-ROM /WE <- EXP0 w/PU + * PRG-ROM /OE <- /ROMSEL + * PRG-ROM /CE <- GND + * PRG-ROM write: /WE & /CE low, /OE high + * mapper '161 CLK <- /ROMSEL + * mapper '161 /LOAD <- PRG R/W + * mapper '161 /LOAD must be low on rising edge of CLK to latch data + * Note:addrH bit7 has no effect (ends up on PPU /A13) + * M2 signal untouched + * Pre: nes_init() setup of io pins + * Post:data latched by MAPPER, will also be written to PRG-ROM afterwards + * address left on bus + * data left on bus, but pullup only + * EXP0 left pulled up + * Rtn: None + */ +//void discrete_exp0_mapper_wr( uint16_t addr, uint8_t data ) +//{ +// //Float EXP0 as it should be in NES +// EXP0_IP_FL(); +// //EXP0_OP(); //tas = 0ns, tah = 30ns +// //EXP0_LO(); +// +// //need for whole function +// //_DATA_OP(); +// +// //set addrL +// //ADDR_OUT = addrL; +// //latch addrH +// //DATA_OUT = addrH; +// //_AHL_CLK(); +// ADDR_SET(addr); +// +// //PRG R/W LO +// PRGRW_LO(); +// +// //put data on bus +// DATA_OP(); +// DATA_SET(data); +// +// //set M2 and /ROMSEL +// MCO_HI(); +// if( addr >= 0x8000 ) { //addressing cart rom space +// ROMSEL_LO(); //romsel trails M2 during CPU operations +// } +// +// //give some time +// NOP(); +// NOP(); +// +// //latch data to cart memory/mapper +// MCO_LO(); +// ROMSEL_HI(); +// +// //retore PRG R/W to default +// PRGRW_HI(); +// +// EXP0_IP_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns +// //Free data bus +// DATA_IP(); +// +// return; +// +// /* +// ADDR_SET(addr); +// +// DATA_OP(); +// DATA_SET(data); +// +// //start write to PRG-ROM (latch address) +// exp0_op(); //tas = 0ns, tah = 30ns +// exp0_lo(); +// +// //enable write to mapper PRG R/W LO +// PRGRW_LO(); +// ROMSEL_LO(); //fact that it's low for such a short time might also if PRG-ROM does output data +// +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// //clock mapper register, should not enable PRG-ROM output since /WE low +// NOP(); //AVR didn't need this delay +// NOP(); //AVR didn't need this delay +// ROMSEL_HI(); //data latched on rising edge +// +// //Could output other data here that would like to be written to PRG-ROM +// //I'm not certain an actual write gets applied to PRG-ROM as /OE is supposed to be high whole time.. +// +// NOP(); //AVR didn't need this delay +// //return to default +// PRGRW_HI(); +// +// EXP0_IP_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns +// //16Mhz avr clk = 62.5ns period guarantees timing reqts +// DATA_IP(); +// */ +//} + + // // /* Desc:Emulate NES CPU Read as best possible // * decode A15 from addrH to set /ROMSEL as expected diff --git a/firmware/source/nes.h b/firmware/source/nes.h index acc8099..db82764 100644 --- a/firmware/source/nes.h +++ b/firmware/source/nes.h @@ -9,6 +9,7 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rdata ); void discrete_exp0_prgrom_wr( uint16_t addr, uint8_t data ); +//void discrete_exp0_mapper_wr( uint16_t addr, uint8_t data ); //uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL ); uint8_t nes_cpu_rd( uint16_t addr ); void nes_cpu_wr( uint16_t addr, uint8_t data ); diff --git a/host/scripts/inlretro.lua b/host/scripts/inlretro.lua index 756310d..a08468c 100644 --- a/host/scripts/inlretro.lua +++ b/host/scripts/inlretro.lua @@ -22,8 +22,9 @@ function main () --cart/mapper specific scripts --local curcart = require "scripts.nes.nrom" - local curcart = require "scripts.nes.unrom" - --local curcart = require "scripts.nes.bnrom" + --local curcart = require "scripts.nes.unrom" + local curcart = require "scripts.nes.bnrom" + --local curcart = require "scripts.nes.cdream" --local curcart = require "scripts.nes.action53" --local curcart = require "scripts.nes.action53_tsop" @@ -31,9 +32,28 @@ function main () -- rv = dict.pinport( "DATA_SET", 0xAA ) -- rv = dict.pinport( "DATA_RD" ) -- rv = dict.io("IO_RESET") - if rv then - print(string.format("%X", rv)) - end + +--[[ --TEST GB power + rv = dict.pinport( "CTL_ENABLE", "CIN" ) + rv = dict.pinport( "CTL_OP", "CIN") + rv = dict.pinport( "CTL_SET_LO", "CIN") + print("CIN low 5v GB") + jtag.sleep(5) + rv = dict.pinport( "CTL_SET_HI", "CIN") + print("CIN high 3v GBA") + jtag.sleep(90) + rv = dict.pinport( "CTL_SET_LO", "CIN") + print("CIN low 5v GB") + jtag.sleep(10) + rv = dict.pinport( "CTL_SET_HI", "CIN") + print("CIN high 3v GBA") + jtag.sleep(10) + --]] + + + --if rv then + -- print(string.format("%X", rv)) + --end -- print(dict.io("EXP0_PULLUP_TEST")) -- @@ -132,7 +152,7 @@ function main () --]] - --[[ + ---[[ --test reading back CIC version dict.io("SWIM_INIT", "SWIM_ON_A0") if swim.start(true) then @@ -143,7 +163,7 @@ function main () print("ERROR trying to read back CIC signature stack data") end - print("done flashing STM8 on A0") + print("done reading STM8 stack on A0\n") dict.io("IO_RESET") --]] @@ -157,10 +177,14 @@ function main () --NROM --curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/ddug2.bin", "ignore/verifyout.bin") --UxROM - curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/nomolosFINAL.prg", "ignore/verifyout.bin") - --curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/nomolos.bin", "ignore/verifyout.bin") + --curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/nomolosFINAL.prg", "ignore/verifyout.bin") + --curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/owlia_revb.prg", "ignore/verifyout.bin") --BNROM - --curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/lizard_v1.bin", "ignore/verifyout.bin") + --curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/lizard_v2.prg", "ignore/verifyout.bin") + --curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/lizard_v2_fr.prg", "ignore/verifyout.bin") + curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/hh85.prg", "ignore/verifyout.bin") + --COLOR DREAMS + --curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/multicart_mojontalesFINAL.prg", "ignore/verifyout.bin") --A53 PLCC --curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/da53v2.prg", "ignore/verifyout.bin") --A53 tssop @@ -200,6 +224,7 @@ function main () elseif cart_console == "SNES" then snes_swimcart = nil + --[[ if swim.start(true) then --SWIM is now established and running at HIGH SPEED snes_swimcart = false --don't want to use SWIM pin to control flash /OE, use SNES RESET (EXP0) instead @@ -222,6 +247,7 @@ function main () else print("ERROR problem with STM8 CIC") end + --]] dict.io("IO_RESET") dict.io("SNES_INIT") @@ -232,6 +258,7 @@ function main () local snes_mapping = "LOROM" --SNES detect if there's save ram and size + ---[[ --SNES detect if able to read flash ID's if not snes.read_flashID(true) then print("ERROR unable to read flash ID") @@ -257,8 +284,9 @@ function main () -- erase.erase_snes( false ) --open file local file - -- file = assert(io.open("flash.bin", "rb")) - file = assert(io.open("SF2_PTdump_capcomFINAL.bin", "rb")) + ---[[ file = assert(io.open("flash.bin", "rb")) + --file = assert(io.open("SF2_PTdump_capcomFINAL.bin", "rb")) + file = assert(io.open("ignore/MMXdump.bin", "rb")) --calculate checksum --local data = file:read("*all") @@ -270,14 +298,21 @@ function main () flash.flash_snes( file, true ) --close file assert(file:close()) + --]] + dict.io("IO_RESET") + print("start swim") + + dict.io("SWIM_INIT", "SWIM_ON_A0") --flash final CIC code if swim.start(true) then --SWIM is now established and running at HIGH SPEED --swim.printCSR() - snes_swimcart = false + --snes_swimcart = false --print("main swimcart", snes_swimcart) + swim.swim_test() + --check if ROP set, allow clearing ROP and erasing CIC --blindly erase STM8 CIC for now by disabling ROP -- swim.disable_ROP_erase(true) @@ -293,24 +328,27 @@ function main () --write option bytes -- enable ROP, debug - swim.write_optn_bytes( true, true ) + swim.write_optn_bytes( false, true ) -- reset STM8 CIC and end SWIM comms to it can execute what we just flashed swim.stop_and_reset() else print("ERROR problem with STM8 CIC") end + --]] --- --DUMPING: --- --create new file --- local file --- file = assert(io.open("snesdump.bin", "wb")) --- --dump cart into file --- -- swim.start() --- dump.dump_snes( file, snes_mapping, true ) --- --- --close file --- assert(file:close()) + --DUMPING: + --create new file + print("dumping SNES") + snes.read_reset_vector(0, true) + local file + file = assert(io.open("snesdump.bin", "wb")) + --dump cart into file + -- swim.start() + -- dump.dump_snes( file, snes_mapping, true ) + + --close file + assert(file:close()) --trick to do this at end while debugging so don't have to wait for it before starting @@ -332,6 +370,7 @@ function main () end + end diff --git a/host/scripts/nes/bnrom.lua b/host/scripts/nes/bnrom.lua index 5eda7f0..70f6cc5 100644 --- a/host/scripts/nes/bnrom.lua +++ b/host/scripts/nes/bnrom.lua @@ -136,7 +136,9 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile, --find bank table in the rom --write bank table to all banks of cartridge --Lizard's bank table is at $FF94 so hard code that for now - wr_bank_table(0xFF94, 16) + --wr_bank_table(0xFF94, 16) + --hh85 bank table at $FFE0 + wr_bank_table(0xFFE0, 16) --flash cart flash.write_file( file, 512, "BxROM", "PRGROM", true ) diff --git a/host/scripts/nes/nrom.lua b/host/scripts/nes/nrom.lua index 61a183a..bcc60f0 100644 --- a/host/scripts/nes/nrom.lua +++ b/host/scripts/nes/nrom.lua @@ -83,6 +83,7 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile, dict.nes("NES_PPU_WR", 0x1555, 0x10) rv = dict.nes("NES_PPU_RD", 0x0000) + i = 0 while ( rv ~= 0xFF ) do rv = dict.nes("NES_PPU_RD", 0x0000) i = i + 1 diff --git a/host/scripts/nes/unrom.lua b/host/scripts/nes/unrom.lua index 59e978c..43a4d37 100644 --- a/host/scripts/nes/unrom.lua +++ b/host/scripts/nes/unrom.lua @@ -136,6 +136,8 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile, --write bank table to all banks of cartridge --Nomolos' bank table is at $CC84 so hard code that for now wr_bank_table(0xCC84, 32) + --Owlia bank table + --wr_bank_table(0xE473, 32) --flash cart flash.write_file( file, 512, "UxROM", "PRGROM", true ) diff --git a/shared/shared_dict_buffer.h b/shared/shared_dict_buffer.h index b1b65f1..3030e16 100644 --- a/shared/shared_dict_buffer.h +++ b/shared/shared_dict_buffer.h @@ -138,7 +138,7 @@ #define AxROM 7 #define MMC2 9 #define MMC4 10 - #define CDREAMS 11 + #define CDREAM 11 #define A53 28 #define UNROM512 30 #define EZNSF 31 diff --git a/shared/shared_dict_nes.h b/shared/shared_dict_nes.h index 20eca53..eb3f030 100644 --- a/shared/shared_dict_nes.h +++ b/shared/shared_dict_nes.h @@ -37,6 +37,8 @@ // A15 decoded to enable /ROMSEL as it should #define NES_CPU_WR 0x02 +//#define DISCRETE_EXP0_MAPPER_WR 0x03 + //============================================================================================= // OPCODES WITH OPERAND AND RETURN VALUE plus SUCCESS/ERROR_CODE //=============================================================================================