Have basic SNES cart detection and dumping working. Dumping mario paint
works on both inl6 and original kazzo just fine. Dumping v3 prototype has a few byte corruptions on inl6, but is fine on original kazzo. The same bytes often fail, but not consistently. Tinkered with adding delay, but that didn't help. Also have issue with adapter not dumping properly. Prob bug with HIGH ADDR on that board need to sort out still. Going to focus on erasing and dumping next then come back to some of these issues.
This commit is contained in:
Paul Molloy
parent
dfeaf960ef
commit
4b3c822a24
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@ -32,6 +32,15 @@ uint8_t dump_buff( buffer *buff ) {
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buff->last_idx, ~FALSE );
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break;
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case SNESROM:
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addrH |= 0x80; //$8000 LOROM space
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//need to split page_num
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//A14-8 page_num[7-0]
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//A15 high (LOROM)
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//A23-16 page_num[14-8]
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HADDR_SET( (buff->page_num)>>7 );
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buff->cur_byte = snes_rom_page_rd_poll( buff->data, addrH, buff->id,
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//id contains MSb of page when <256B buffer
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buff->last_idx, ~FALSE );
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case SNESRAM:
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//warn addrX = ((buff->page_num)>>8);
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break;
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@ -5,6 +5,7 @@
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#include "types.h"
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#include "buffer.h"
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#include "nes.h"
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#include "snes.h"
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#include "shared_dictionaries.h"
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#include "shared_errors.h"
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@ -28,7 +28,7 @@ uint8_t io_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rd
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switch (opcode) {
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case IO_RESET: io_reset(); break;
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case NES_INIT: nes_init(); break;
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// case SNES_INIT: snes_init(); break;
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case SNES_INIT: snes_init(); break;
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case EXP0_PULLUP_TEST:
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rdata[RD_LEN] = BYTE_LEN;
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rdata[RD0] = exp0_pullup_test(); break;
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@ -152,11 +152,10 @@ void nes_init()
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}
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/*
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//SNES cartridge interfacing setup
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//set outputs as required
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//latch address of $000000
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//latch address of $00:0000
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//disable cart memories
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//reset high disables SRAM and puts INL carts in PRGM mode
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//Excersize extreme caution calling this while NES/FC cart inserted
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@ -176,28 +175,26 @@ void snes_init()
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CSWR_OP();
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CSWR_HI();
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//disable SRAM and put cart in PRGM mode
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//disable SRAM and put cart in PLAY mode
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EXP0_OP();
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EXP0_HI();
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//other control pins are inputs or unused, leave as IP pullup from reset
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//memories are now disabled Data bus should be clear
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//setup AHL FF
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AHL_OP();
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AHL_CLK();
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//setup AXL FF
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AXL_OP();
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AXL_CLK();
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DATA_ENABLE();
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DATA_IP_PU();
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//now meet conditions to call other macros
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//setup address $000000
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//setup address $0000
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ADDR_ENABLE();
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ADDR_SET(0x0000);
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ADDRX_SET(0x00);
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//setup HIGH ADDR with bank $00
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HADDR_ENABLE();
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HADDR_SET(0x00);
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}
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*/
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//Test starts by verifying EXP0 can be driven low, if not, will return one byte of AUX_PIN
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//followed by alternating 0xAA, 0x55, 0xAA...
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@ -9,7 +9,7 @@ uint8_t io_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rd
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void io_reset();
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void nes_init();
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//void snes_init();
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void snes_init();
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uint8_t exp0_pullup_test();
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#endif
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@ -383,6 +383,15 @@ uint8_t pinport_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_
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case EXP_DISABLE_: EXP_DISABLE(); break;
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case EXP_SET_: EXP_SET(operand); break;
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//============================
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//HIGH ADDR PORT 8bit WIDE ACCESS
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//opcode: type of operation
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//operand: value to place on bus
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//============================
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case HADDR_ENABLE_: HADDR_ENABLE(); break;
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case HADDR_DISABLE_: HADDR_DISABLE(); break;
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case HADDR_SET_: HADDR_SET(operand); break;
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default:
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//macro doesn't exist or isn't on this PCB version
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return ERR_UNKN_PP_OPCODE;
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@ -478,10 +478,11 @@ void software_AXL_CLK();
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*/
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#define RCC_AHBENR_CTL (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIODEN)
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#define RCC_AHBENR_ADDR RCC_AHBENR_GPIOCEN
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#define RCC_AHBENR_DATA RCC_AHBENR_GPIOBEN
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#define RCC_AHBENR_EXP (RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOBEN)
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#define RCC_AHBENR_CTL (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIODEN)
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#define RCC_AHBENR_ADDR RCC_AHBENR_GPIOCEN
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#define RCC_AHBENR_HADDR (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN)
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#define RCC_AHBENR_DATA RCC_AHBENR_GPIOBEN
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#define RCC_AHBENR_EXP (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN)
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#endif //STM_INL6
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@ -979,7 +980,7 @@ void software_AXL_CLK();
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#define ADDR_EN_CLK() RCC->AHBENR |= RCC_AHBENR_ADDR
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#define ADDR_EN_FF() CTL_OP(AHLbank, AHL); CTL_SET_LO(AHLbank, AHL)
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#define ADDR_ENABLE() ADDR_EN_CLK(); ADDR_EN_FF(); ADDR_OP()
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#define ADDR_ENABLE() DATA_ENABLE(); ADDR_EN_CLK(); ADDR_EN_FF(); ADDR_OP()
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#endif //STM_ADAPTER
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@ -998,7 +999,7 @@ void software_AXL_CLK();
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#define ADDR_SET(hword) ADDRL(hword); ADDRH(hword>>8)
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#define ADDR_EN_FF() CTL_OP(AHLbank, AHL); CTL_SET_LO(AHLbank, AHL)
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#define ADDR_ENABLE() ADDR_EN_FF(); ADDR_OP();
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#define ADDR_ENABLE() DATA_ENABLE(); ADDR_EN_FF(); ADDR_OP();
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#endif //AVR_KAZZO
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@ -1046,7 +1047,7 @@ void software_AXL_CLK();
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#define EXP_ENABLE() ADDR_EN_CLK(); EXP_OP()
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#define EXP_DISABLE() EXP_PU(); EXP_IP()
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//STM_INL6
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//end STM_INL6
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#else //AVR_KAZZO or STM_ADAPTER
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@ -1068,5 +1069,56 @@ void software_AXL_CLK();
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#endif //AVR_KAZZO or STM_ADAPTER
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// ---------------------------------------------------------------------------------------
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// HIGH ADDRESS PORT 8bits A16-23
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//
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// This port is present on all devices
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// Restrictions: CANNOT be used when EXPANSION PORT is enabled
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// CIRAM_A10 & CIRAM /CE cannot be used on CONTROL PORT
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// Directionality: All pins are forced output
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// Driver: All pins are push-pull
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// Write/Output: Byte access only, no bit accesses
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// Read/Input: Not supported
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//
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// INL6 dual purposes A22-23 for CIRAM_A10 & CIRAM_CE respectively
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// EXP1-5, & 7 are mapped to A16-21 respectively
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//
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// AVR_KAZZO & STM_ADATPER use dual purpose the EXPANSION PORT for this PORT
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// EXP1-8 map to A16-23 respectively
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//
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// ---------------------------------------------------------------------------------------
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#ifdef STM_INL6
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//A16-21 are on PB10-15 these also map to EXP1-5, & 7
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//A22-23 are on PA9-10 these also map to CIRAM A10 & CIRAM /CE respectively
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#define A16_21bank GPIOB
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#define A22_23bank GPIOA
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#define HADDR_PU() A16_21bank->PUPDR |= (PUPDR_PU_ALL & 0xFFF00000); A22_23bank->PUPDR |= (PUPDR_PU_ALL & 0x0003C000)
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#define HADDR_IP() A16_21bank->MODER &=~(MODER_OP_ALL & 0xFFF00000); A22_23bank->MODER &=~(MODER_OP_ALL & 0x0003C000)
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#define HADDR_OP() A16_21bank->MODER |= (MODER_OP_ALL & 0xFFF00000); A22_23bank->MODER |= (MODER_OP_ALL & 0x0003C000)
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#define HADDR_SET(val) A16_21bank->ODR = ((A16_21bank->ODR&0x03FF) | (val<<10 & 0xFC00)); A22_23bank->ODR = ((A22_23bank->ODR & 0xF9FF) | (val<<3 & 0x0600))
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#define HADDR_EN_CLK() RCC->AHBENR |= RCC_AHBENR_HADDR
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#define HADDR_ENABLE() HADDR_EN_CLK(); HADDR_OP()
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#define HADDR_DISABLE() HADDR_PU(); HADDR_IP()
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//end STM_INL6
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#else //AVR_KAZZO or STM_ADAPTER
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// ADDR16-23 are behind AXL flipflop
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//clocks must be initialized, Data bus clear
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#define HADDR_SET(val) EXP_SET(val)
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#define HADDR_EN_FF() EXP_EN_FF()
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#define HADDR_ENABLE() EXP_ENABLE()
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#define HADDR_DISABLE() EXP_DISABLE()
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#endif //AVR_KAZZO or STM_ADAPTER
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#endif
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@ -0,0 +1,589 @@
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#include "snes.h"
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//=================================================================================================
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//
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// SNES operations
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// This file includes all the snes functions possible to be called from the snes dictionary.
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//
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// See description of the commands contained here in shared/shared_dictionaries.h
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//
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//=================================================================================================
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/* Desc:Function takes an opcode which was transmitted via USB
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* then decodes it to call designated function.
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* shared_dict_snes.h is used in both host and fw to ensure opcodes/names align
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* Pre: Macros must be defined in firmware pinport.h
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* opcode must be defined in shared_dict_snes.h
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* Post:function call complete.
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* Rtn: SUCCESS if opcode found and completed, error if opcode not present or other problem.
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*/
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uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rdata )
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{
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#define RD_LEN 0
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#define RD0 1
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#define RD1 2
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#define BYTE_LEN 1
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#define HWORD_LEN 2
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switch (opcode) {
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//no return value:
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case SNES_SET_BANK:
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HADDR_SET( operand );
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break;
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case SNES_ROM_WR:
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snes_rom_wr( operand, miscdata );
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break;
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//8bit return values:
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case SNES_ROM_RD:
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rdata[RD_LEN] = BYTE_LEN;
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rdata[RD0] = snes_rom_rd( operand );
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break;
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default:
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//macro doesn't exist
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return ERR_UNKN_SNES_OPCODE;
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}
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return SUCCESS;
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}
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/* Desc:SNES ROM Read without changing high bank
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* /ROMSEL always set low
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* EXP0/RESET not affected
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* Pre: snes_init() setup of io pins
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* Post:address left on bus
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* data bus left clear
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* Rtn: Byte read from ROM at addr
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*/
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uint8_t snes_rom_rd( uint16_t addr )
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{
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uint8_t read; //return value
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//set address bus
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ADDR_SET(addr);
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ROMSEL_LO();
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CSRD_LO();
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//couple more NOP's waiting for data
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//zero nop's returned previous databus value
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NOP(); //one nop got most of the bits right
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NOP(); //two nop got all the bits right
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NOP(); //add third nop for some extra
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NOP(); //one more can't hurt
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//might need to wait longer for some carts...
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//latch data
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DATA_RD(read);
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//return bus to default
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CSRD_HI();
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ROMSEL_HI();
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return read;
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}
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/* Desc:SNES ROM Write
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* /ROMSEL always set low
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* EXP0/RESET unaffected
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* read value from currently selected bank
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* Pre: snes_init() setup of io pins
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* Post:data latched by anything listening on the bus
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* address left on bus
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* Rtn: None
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*/
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void snes_rom_wr( uint16_t addr, uint8_t data )
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{
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ADDR_SET(addr);
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//put data on bus
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DATA_OP();
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DATA_SET(data);
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//PRG R/W LO
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ROMSEL_LO();
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CSWR_LO();
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//give some time
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NOP();
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NOP();
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//latch data to cart memory/mapper
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ROMSEL_HI();
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CSWR_HI();
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//Free data bus
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DATA_IP();
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}
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/* Desc:SNES ROM Page Read with optional USB polling
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* /ROMSEL always low, EXP0/RESET unaffected
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* if poll is true calls usbdrv.h usbPoll fuction
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* this is needed to keep from timing out when double buffering usb data
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* Pre: snes_init() setup of io pins
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* num_bytes can't exceed 256B page boundary
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* Post:address left on bus
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* data bus left clear
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* data buffer filled starting at first to last
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* Rtn: Index of last byte read
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*/
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uint8_t snes_rom_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
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{
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uint8_t i;
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//set address bus
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ADDRH(addrH);
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//set /ROMSEL and /RD
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CSRD_LO();
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ROMSEL_LO();
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//set lower address bits
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ADDRL(first); //doing this prior to entry and right after latching
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//gives longest delay between address out and latching data
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for( i=0; i<=len; i++ ) {
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//testing shows that having this if statement doesn't affect overall dumping speed
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if ( poll == FALSE ) {
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NOP(); //couple more NOP's waiting for data
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NOP(); //one prob good enough considering the if/else
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NOP();
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NOP();
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} else {
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usbPoll(); //Call usbdrv.h usb polling while waiting for data
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NOP();
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NOP();
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NOP();
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}
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//latch data
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DATA_RD(data[i]);
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//set lower address bits
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//ADDRL(++first); THIS broke things, on stm adapter because macro expands it twice!
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first++;
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ADDRL(first);
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}
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//return bus to default
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CSRD_HI();
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ROMSEL_HI();
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//return index of last byte read
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return i;
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}
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// /* Desc: Discrete board PRG-ROM only write, does not write to mapper
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// * PRG-ROM /WE <- EXP0 w/PU
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// * PRG-ROM /OE <- /ROMSEL
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// * PRG-ROM /CE <- GND
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// * PRG-ROM write: /WE & /CE low, /OE high
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// * mapper '161 CLK <- /ROMSEL
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// * mapper '161 /LOAD <- PRG R/W
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// * mapper '161 /LOAD must be low on rising edge of CLK to latch data
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// * This is a /WE controlled write. Address latched on falling edge,
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// * and data latched on rising edge EXP0
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// * Note:addrH bit7 has no effect (ends up on PPU /A13)
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// * /ROMSEL, M2, & PRG R/W signals untouched
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// * Pre: nes_init() setup of io pins
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// * Post:data latched by PRG-ROM, mapper register unaffected
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// * address left on bus
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// * data left on bus, but pullup only
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// * EXP0 left pulled up
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// * Rtn: None
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// */
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// void discrete_exp0_prgrom_wr( uint16_t addr, uint8_t data )
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// {
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// ADDR_SET(addr);
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//
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// DATA_OP();
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// DATA_SET(data);
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//
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// EXP0_OP(); //Tas = 0ns, Tah = 30ns
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// EXP0_LO();
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// EXP0_IP_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns
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// //16Mhz avr clk = 62.5ns period guarantees timing reqts
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// DATA_IP();
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// }
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//
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// //
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// // /* Desc:Emulate NES CPU Read as best possible
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// // * decode A15 from addrH to set /ROMSEL as expected
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// // * float EXP0
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// // * toggle M2 as NES would
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// // * insert some NOP's in to be slow like NES
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// // * Note:not the fastest read operation
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// // * Pre: nes_init() setup of io pins
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// // * Post:address left on bus
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// // * data bus left clear
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// // * EXP0 left floating
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// // * Rtn: Byte read from PRG-ROM at addrHL
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// // */
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// // uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL )
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// // {
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// // uint8_t read; //return value
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// //
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// // //m2 should be low as it aids in disabling WRAM
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// // //this is also m2 state at beginging of CPU cycle
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// // //all these pins should already be in this state, but
|
||||
// // //go ahead and setup just to be sure since we're trying
|
||||
// // //to be as accurate as possible
|
||||
// // _EXP0_FLT(); //this could have been left pulled up
|
||||
// // _M2_LO(); //start of CPU cycle
|
||||
// // _ROMSEL_HI(); //trails M2
|
||||
// // _PRGRW_RD(); //happens just after M2
|
||||
// //
|
||||
// // //set address bus
|
||||
// // ADDR_OUT = addrL;
|
||||
// // _ADDRH_SET(addrH);
|
||||
// //
|
||||
// // //couple NOP's to wait a bit
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// //
|
||||
// // //set M2 and /ROMSEL
|
||||
// // if( addrH >= 0x80 ) { //addressing cart rom space
|
||||
// // _M2_HI();
|
||||
// // _ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
// // } else {
|
||||
// // _M2_HI();
|
||||
// // }
|
||||
// //
|
||||
// // //couple more NOP's waiting for data
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// // NOP();
|
||||
// //
|
||||
// // //latch data
|
||||
// // read = DATA_IN;
|
||||
// //
|
||||
// // //return bus to default
|
||||
// // _M2_LO();
|
||||
// // _ROMSEL_HI();
|
||||
// //
|
||||
// // return read;
|
||||
// // }
|
||||
// //
|
||||
// /* Desc:NES CPU Read without being so slow
|
||||
// * decode A15 from addrH to set /ROMSEL as expected
|
||||
// * float EXP0
|
||||
// * toggle M2 as NES would
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * Post:address left on bus
|
||||
// * data bus left clear
|
||||
// * EXP0 left floating
|
||||
// * Rtn: Byte read from PRG-ROM at addrHL
|
||||
// */
|
||||
// uint8_t nes_cpu_rd( uint16_t addr )
|
||||
// {
|
||||
// uint8_t read; //return value
|
||||
//
|
||||
// //set address bus
|
||||
// ADDR_SET(addr);
|
||||
//
|
||||
// //set M2 and /ROMSEL
|
||||
// MCO_HI();
|
||||
// if( addr >= 0x8000 ) { //addressing cart rom space
|
||||
// ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
// }
|
||||
//
|
||||
// //couple more NOP's waiting for data
|
||||
// //zero nop's returned previous databus value
|
||||
// NOP(); //one nop got most of the bits right
|
||||
// NOP(); //two nop got all the bits right
|
||||
// NOP(); //add third nop for some extra
|
||||
// NOP(); //one more can't hurt
|
||||
// //might need to wait longer for some carts...
|
||||
//
|
||||
// //latch data
|
||||
// DATA_RD(read);
|
||||
//
|
||||
// //return bus to default
|
||||
// MCO_LO();
|
||||
// ROMSEL_HI();
|
||||
//
|
||||
// return read;
|
||||
// }
|
||||
//
|
||||
// /* Desc:NES CPU Write
|
||||
// * Just as you would expect NES's CPU to perform
|
||||
// * A15 decoded to enable /ROMSEL
|
||||
// * This ends up as a M2 and/or /ROMSEL controlled write
|
||||
// * Note:addrH bit7 has no effect (ends up on PPU /A13)
|
||||
// * EXP0 floating
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * Post:data latched by anything listening on the bus
|
||||
// * address left on bus
|
||||
// * data left on bus, but pullup only
|
||||
// * Rtn: None
|
||||
// */
|
||||
// void nes_cpu_wr( uint16_t addr, uint8_t data )
|
||||
// {
|
||||
// //Float EXP0 as it should be in NES
|
||||
// EXP0_IP_FL();
|
||||
//
|
||||
// //need for whole function
|
||||
// //_DATA_OP();
|
||||
//
|
||||
// //set addrL
|
||||
// //ADDR_OUT = addrL;
|
||||
// //latch addrH
|
||||
// //DATA_OUT = addrH;
|
||||
// //_AHL_CLK();
|
||||
// ADDR_SET(addr);
|
||||
//
|
||||
// //PRG R/W LO
|
||||
// PRGRW_LO();
|
||||
//
|
||||
// //put data on bus
|
||||
// DATA_OP();
|
||||
// DATA_SET(data);
|
||||
//
|
||||
// //set M2 and /ROMSEL
|
||||
// MCO_HI();
|
||||
// if( addr >= 0x8000 ) { //addressing cart rom space
|
||||
// ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
// }
|
||||
//
|
||||
// //give some time
|
||||
// NOP();
|
||||
// NOP();
|
||||
//
|
||||
// //latch data to cart memory/mapper
|
||||
// MCO_LO();
|
||||
// ROMSEL_HI();
|
||||
//
|
||||
// //retore PRG R/W to default
|
||||
// PRGRW_HI();
|
||||
//
|
||||
// //Free data bus
|
||||
// DATA_IP();
|
||||
// }
|
||||
//
|
||||
// /* Desc:NES PPU Read
|
||||
// * decode A13 from addrH to set /A13 as expected
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * Post:address left on bus
|
||||
// * data bus left clear
|
||||
// * Rtn: Byte read from CHR-ROM/RAM at addrHL
|
||||
// */
|
||||
// uint8_t nes_ppu_rd( uint16_t addr )
|
||||
// {
|
||||
// uint8_t read; //return value
|
||||
//
|
||||
// //addr with PPU /A13
|
||||
// if (addr < 0x2000) { //below $2000 A13 clear, /A13 set
|
||||
// addr |= PPU_A13N_WORD;
|
||||
// } //above PPU $1FFF, A13 set, /A13 clear
|
||||
//
|
||||
// ADDR_SET( addr );
|
||||
//
|
||||
// //set CHR /RD and /WR
|
||||
// CSRD_LO();
|
||||
//
|
||||
// //couple more NOP's waiting for data
|
||||
// //zero nop's returned previous databus value
|
||||
// NOP(); //one nop got most of the bits right
|
||||
// NOP(); //two nop got all the bits right
|
||||
// NOP(); //add third nop for some extra
|
||||
// NOP(); //one more can't hurt
|
||||
// //might need to wait longer for some carts...
|
||||
//
|
||||
// //latch data
|
||||
// DATA_RD(read);
|
||||
//
|
||||
// //return bus to default
|
||||
// CSRD_HI();
|
||||
//
|
||||
// return read;
|
||||
// }
|
||||
//
|
||||
// /* Desc:NES PPU Write
|
||||
// * decode A13 from addrH to set /A13 as expected
|
||||
// * flash: address clocked falling edge, data rising edge of /WE
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * Post:data written to addrHL
|
||||
// * address left on bus
|
||||
// * data bus left clear
|
||||
// * Rtn: None
|
||||
// */
|
||||
//
|
||||
// void nes_ppu_wr( uint16_t addr, uint8_t data )
|
||||
// {
|
||||
//
|
||||
// //addr with PPU /A13
|
||||
// if (addr < 0x2000) { //below $2000 A13 clear, /A13 set
|
||||
// addr |= PPU_A13N_WORD;
|
||||
// } //above PPU $1FFF, A13 set, /A13 clear
|
||||
//
|
||||
// ADDR_SET( addr );
|
||||
//
|
||||
// //put data on bus
|
||||
// DATA_OP();
|
||||
// DATA_SET(data);
|
||||
//
|
||||
// NOP();
|
||||
//
|
||||
// //set CHR /RD and /WR
|
||||
// CSWR_LO();
|
||||
//
|
||||
// //might need to wait longer for some carts...
|
||||
// NOP(); //one can't hurt
|
||||
//
|
||||
// //latch data to memory
|
||||
// CSWR_HI();
|
||||
//
|
||||
// //clear data bus
|
||||
// DATA_IP();
|
||||
//
|
||||
// }
|
||||
//
|
||||
//
|
||||
// /* Desc:PPU CIRAM A10 NT arrangement sense
|
||||
// * Toggle A11 and A10 and read back CIRAM A10
|
||||
// * report back if vert/horiz/1scnA/1scnB
|
||||
// * reports nesdev defined mirroring
|
||||
// * does not report Nintendo's "Name Table Arrangement"
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * Post:address left on bus
|
||||
// * Rtn: MIR_VERT, MIR_HORIZ, MIR_1SCNA, MIR_1SCNB
|
||||
// * errors not really possible since all combinations
|
||||
// * of CIRAM A10 level designate something valid
|
||||
// */
|
||||
// uint8_t ciram_a10_mirroring( void )
|
||||
// {
|
||||
// uint16_t readV, readH;
|
||||
//
|
||||
// //set A10, clear A11
|
||||
// ADDRH(A10_BYTE);
|
||||
// CIA10_RD(readV);
|
||||
//
|
||||
// //set A11, clear A10
|
||||
// ADDRH(A11_BYTE);
|
||||
// CIA10_RD(readH);
|
||||
//
|
||||
// //if CIRAM A10 was always low -> 1 screen A
|
||||
// if ((readV==0) & (readH==0)) return MIR_1SCNA;
|
||||
// //if CIRAM A10 was always hight -> 1screen B
|
||||
// if ((readV!=0) & (readH!=0)) return MIR_1SCNB;
|
||||
// //if CIRAM A10 toggled with A10 -> Vertical mirroring, horizontal arrangement
|
||||
// if ((readV!=0) & (readH==0)) return MIR_VERT;
|
||||
// //if CIRAM A10 toggled with A11 -> Horizontal mirroring, vertical arrangement
|
||||
// if ((readV==0) & (readH!=0)) return MIR_HORZ;
|
||||
//
|
||||
// //shouldn't be here...
|
||||
// return GEN_FAIL;
|
||||
// }
|
||||
//
|
||||
// /* Desc:NES CPU Page Read with optional USB polling
|
||||
// * decode A15 from addrH to set /ROMSEL as expected
|
||||
// * float EXP0
|
||||
// * toggle M2 as NES would
|
||||
// * if poll is true calls usbdrv.h usbPoll fuction
|
||||
// * this is needed to keep from timing out when double buffering usb data
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * num_bytes can't exceed 256B page boundary
|
||||
// * Post:address left on bus
|
||||
// * data bus left clear
|
||||
// * EXP0 left floating
|
||||
// * data buffer filled starting at first to last
|
||||
// * Rtn: Index of last byte read
|
||||
// */
|
||||
// uint8_t nes_cpu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
|
||||
// {
|
||||
// uint8_t i;
|
||||
//
|
||||
// //set address bus
|
||||
// ADDRH(addrH);
|
||||
//
|
||||
// //set M2 and /ROMSEL
|
||||
// MCO_HI();
|
||||
// if( addrH >= 0x80 ) { //addressing cart rom space
|
||||
// ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
// }
|
||||
//
|
||||
// //set lower address bits
|
||||
// ADDRL(first); //doing this prior to entry and right after latching
|
||||
// //gives longest delay between address out and latching data
|
||||
// for( i=0; i<=len; i++ ) {
|
||||
// //testing shows that having this if statement doesn't affect overall dumping speed
|
||||
// if ( poll == FALSE ) {
|
||||
// NOP(); //couple more NOP's waiting for data
|
||||
// NOP(); //one prob good enough considering the if/else
|
||||
// } else {
|
||||
// usbPoll(); //Call usbdrv.h usb polling while waiting for data
|
||||
// }
|
||||
// //latch data
|
||||
// DATA_RD(data[i]);
|
||||
// //set lower address bits
|
||||
// //ADDRL(++first); THIS broke things, on stm adapter because macro expands it twice!
|
||||
// first++;
|
||||
// ADDRL(first);
|
||||
// }
|
||||
//
|
||||
// //return bus to default
|
||||
// MCO_LO();
|
||||
// ROMSEL_HI();
|
||||
//
|
||||
// //return index of last byte read
|
||||
// return i;
|
||||
// }
|
||||
//
|
||||
// /* Desc:NES PPU Page Read with optional USB polling
|
||||
// * decode A13 from addrH to set /A13 as expected
|
||||
// * if poll is true calls usbdrv.h usbPoll fuction
|
||||
// * this is needed to keep from timing out when double buffering usb data
|
||||
// * Pre: nes_init() setup of io pins
|
||||
// * num_bytes can't exceed 256B page boundary
|
||||
// * Post:address left on bus
|
||||
// * data bus left clear
|
||||
// * data buffer filled starting at first for len number of bytes
|
||||
// * Rtn: Index of last byte read
|
||||
// */
|
||||
// uint8_t nes_ppu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
|
||||
// {
|
||||
// uint8_t i;
|
||||
//
|
||||
// if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
||||
// //ADDRH(addrH | PPU_A13N_BYTE);
|
||||
// //Don't do weird stuff like above! logic inside macro expansions can have weird effects!!
|
||||
// addrH |= PPU_A13N_BYTE;
|
||||
// ADDRH(addrH);
|
||||
// } else { //above PPU $1FFF, A13 set, /A13 clear
|
||||
// ADDRH(addrH);
|
||||
// }
|
||||
//
|
||||
// //set CHR /RD and /WR
|
||||
// CSRD_LO();
|
||||
//
|
||||
// //set lower address bits
|
||||
// ADDRL(first); //doing this prior to entry and right after latching
|
||||
// //gives longest delay between address out and latching data
|
||||
//
|
||||
// for( i=0; i<=len; i++ ) {
|
||||
// //couple more NOP's waiting for data
|
||||
// if ( poll == FALSE ) {
|
||||
// NOP(); //one prob good enough considering the if/else
|
||||
// NOP();
|
||||
// } else {
|
||||
// usbPoll();
|
||||
// }
|
||||
// //latch data
|
||||
// DATA_RD(data[i]);
|
||||
// //set lower address bits
|
||||
// first ++;
|
||||
// ADDRL(first);
|
||||
// }
|
||||
//
|
||||
// //return bus to default
|
||||
// CSRD_HI();
|
||||
//
|
||||
// //return index of last byte read
|
||||
// return i;
|
||||
// }
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
#ifndef _snes_h
|
||||
#define _snes_h
|
||||
|
||||
#include "pinport.h"
|
||||
#include "buffer.h" //TODO remove this junk when get rid of FALSE
|
||||
#include "shared_dictionaries.h"
|
||||
#include "shared_errors.h"
|
||||
|
||||
uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rdata );
|
||||
uint8_t snes_rom_rd( uint16_t addr );
|
||||
void snes_rom_wr( uint16_t addr, uint8_t data );
|
||||
uint8_t snes_rom_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll );
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -113,6 +113,10 @@ uint16_t usbFunctionSetup(uint8_t data[8]) {
|
|||
rv[RETURN_ERR_IDX] = nes_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break; //end of NES
|
||||
|
||||
case DICT_SNES:
|
||||
rv[RETURN_ERR_IDX] = snes_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
|
||||
break; //end of NES
|
||||
|
||||
|
||||
case DICT_BUFFER:
|
||||
//just give buffer.c the setup packet and let it figure things out for itself
|
||||
|
|
@ -120,10 +124,6 @@ uint16_t usbFunctionSetup(uint8_t data[8]) {
|
|||
break; //end of BUFFER
|
||||
|
||||
/*
|
||||
case DICT_SNES:
|
||||
//break; //end of SNES
|
||||
|
||||
|
||||
case DICT_USB:
|
||||
//currently just a simple way to read back usbFunctionWrite status SUCCESS/ERROR
|
||||
//if there are future status' to read back may have to create some functions
|
||||
|
|
|
|||
|
|
@ -15,13 +15,13 @@
|
|||
#include "pinport.h"
|
||||
#include "io.h"
|
||||
#include "nes.h"
|
||||
#include "snes.h"
|
||||
#include "buffer.h"
|
||||
#include "types.h"
|
||||
#include "shared_usb.h"
|
||||
#include "shared_errors.h"
|
||||
#include "shared_dictionaries.h"
|
||||
|
||||
//#include "snes.h"
|
||||
|
||||
#define ENDPOINT_BIT 0x80 //Bit 7 of bmRequest type determines endpoint
|
||||
#define ENDPOINT_IN 0x80 //In: device-to-host.
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@ local cart = {}
|
|||
-- import required modules
|
||||
local dict = require "scripts.app.dict"
|
||||
local nes = require "scripts.app.nes"
|
||||
local snes = require "scripts.app.snes"
|
||||
|
||||
-- file constants
|
||||
|
||||
|
|
@ -48,14 +49,26 @@ local function detect_console( debug )
|
|||
|
||||
-- //if couldn't detect NES/FC check for SNES cartridge
|
||||
-- //want to keep from outputting on EXP bus if NES cart was found
|
||||
-- if ( cart->console == UNKNOWN ) {
|
||||
-- //only way I can think of is if memory is enabled by certain addresses and control signals
|
||||
-- snes_init( transfer );
|
||||
-- if ( snes_mem_visible( transfer, 0x00, 0xFFFC )) {
|
||||
-- //CHECK for memory visible near NES reset vector
|
||||
-- debug("SNES memories detected");
|
||||
-- cart->console = SNES_CART;
|
||||
-- }
|
||||
if cart_console == nil then
|
||||
|
||||
--currently detect SNES cartridge by reading reset vector
|
||||
--ensuring it's valid by range and differing between banks
|
||||
dict.io("SNES_INIT")
|
||||
|
||||
local bank0vect = snes.read_reset_vector( 0, debug ) --actual reset vector
|
||||
local bank1vect = snes.read_reset_vector( 1, debug )
|
||||
--bank 0 and bank 1 would have same reset vector on a NES cart
|
||||
--these probably differ on a SNES if there's more than 32/64KB of ROM.
|
||||
|
||||
if bank0vect ~= bank1vect then
|
||||
if (bank0vect >= 0x8000) and (bank0vect < 0xFFFA) then
|
||||
if debug then print("valid SNES reset vector found that differs between bank0 & bank1") end
|
||||
cart_console = "SNES"
|
||||
end
|
||||
else
|
||||
if debug then print("invalid SNES reset vector or same vector found on bank0 & bank1") end
|
||||
end
|
||||
|
||||
-- //now it's possible that rom is there, but data is 0xFF so above test would fail
|
||||
-- //one option would be to drive bus low for short period and see if bus can be
|
||||
-- //driven low. This could damage pin drivers though, best to create command in
|
||||
|
|
@ -66,6 +79,7 @@ local function detect_console( debug )
|
|||
--
|
||||
-- //playable SNES carts should have data somewhere in reset vector...
|
||||
-- }
|
||||
end
|
||||
--
|
||||
-- //always end with resetting i/o
|
||||
dict.io("IO_RESET")
|
||||
|
|
|
|||
|
|
@ -319,6 +319,61 @@ local function nes( opcode, operand, misc, data )
|
|||
end
|
||||
|
||||
|
||||
end
|
||||
|
||||
|
||||
-- external call for snes dictionary
|
||||
local function snes( opcode, operand, misc, data )
|
||||
|
||||
if not op_snes[opcode] then
|
||||
print("ERROR undefined opcode:", opcode, "must be defined in shared_dict_snes.h")
|
||||
return nil
|
||||
end
|
||||
|
||||
if not operand then
|
||||
operand = 0
|
||||
elseif type(operand) == "string" then
|
||||
if not op_snes[operand] then
|
||||
print("ERROR undefined operand:", operand, "must be defined in shared_dict_snes.h")
|
||||
return nil
|
||||
end
|
||||
--decode string operands into
|
||||
operand = op_snes[operand]
|
||||
end
|
||||
|
||||
if not misc then misc = 0 end
|
||||
|
||||
local wLength, ep = default_rlen_1_in(op_snes[opcode.."rlen"])
|
||||
|
||||
local count
|
||||
count, data = usb_vend_xfr(
|
||||
-- ep, dictionary wValue[misc:opcode] wIndex wLength data
|
||||
ep, dict["DICT_SNES"], ( misc<<8 | op_snes[opcode]), operand, wLength, data)
|
||||
--print(count)
|
||||
local error_code, data_len
|
||||
if ep == USB_IN then
|
||||
error_code = data:byte(RETURN_ERR_IDX)
|
||||
data_len = data:byte(RETURN_LEN_IDX)
|
||||
end
|
||||
--print("error:", error_code, "data_len:", data_len)
|
||||
|
||||
assert ( (error_code == err_codes["SUCCESS"]), "ERROR!!! device error code:", error_code)
|
||||
--if error_code ~= err_codes["SUCCESS"] then
|
||||
-- print("ERROR!!! device error code:", error_code)
|
||||
--end
|
||||
|
||||
if data_len and data_len ~= (wLength - RETURN_LEN_IDX) then
|
||||
print("WARNING!! Device's return data length:", data_len, "did not match expected:", wLength-RETURN_LEN_IDX)
|
||||
end
|
||||
|
||||
--process the return data string and return it to calling function
|
||||
if data_len then
|
||||
return string_to_int( data:sub(RETURN_DATA, data_len+RETURN_DATA), data_len)
|
||||
else
|
||||
return nil
|
||||
end
|
||||
|
||||
|
||||
end
|
||||
|
||||
local function buffer_payload_in( wLength, buff_num )
|
||||
|
|
@ -510,13 +565,14 @@ create_dict_tables( op_buffer, "../shared/shared_dict_buffer.h")
|
|||
create_dict_tables( op_io, "../shared/shared_dict_io.h")
|
||||
create_dict_tables( op_operation, "../shared/shared_dict_operation.h")
|
||||
create_dict_tables( op_nes, "../shared/shared_dict_nes.h")
|
||||
--create_dict_tables( op_snes, "../shared/shared_dict_snes.h")
|
||||
create_dict_tables( op_snes, "../shared/shared_dict_snes.h")
|
||||
create_dict_tables( err_codes, "../shared/shared_errors.h")
|
||||
|
||||
-- functions other modules are able to call
|
||||
dict.pinport = pinport
|
||||
dict.io = io
|
||||
dict.nes = nes
|
||||
dict.snes = snes
|
||||
dict.buffer = buffer
|
||||
dict.buffer_payload_in = buffer_payload_in
|
||||
dict.buffer_payload_out = buffer_payload_out
|
||||
|
|
|
|||
|
|
@ -232,6 +232,108 @@ local function dump_nes( file, debug )
|
|||
end
|
||||
|
||||
|
||||
local function dump_snes( file, mapping, debug )
|
||||
|
||||
local buff0 = 0
|
||||
local buff1 = 1
|
||||
local cur_buff_status = 0
|
||||
local data = nil --lua stores data in strings
|
||||
|
||||
if mapping ~= "LOROM" then
|
||||
print("currently only support LOROM SNES mapping!!!")
|
||||
end
|
||||
|
||||
if debug then print("dumping cart") end
|
||||
|
||||
--start with reset and init
|
||||
dict.io("IO_RESET")
|
||||
dict.io("SNES_INIT")
|
||||
|
||||
--setup buffers and manager
|
||||
dict.operation("SET_OPERATION", op_buffer["RESET"] )
|
||||
--reset buffers first
|
||||
dict.buffer("RAW_BUFFER_RESET")
|
||||
|
||||
--need to allocate some buffers for dumping
|
||||
--2x 128Byte buffers
|
||||
local num_buffers = 2
|
||||
local buff_size = 128
|
||||
print("allocating buffers")
|
||||
assert(buffers.allocate( num_buffers, buff_size ), "fail to allocate buffers")
|
||||
|
||||
--set buffer elements as needed
|
||||
--set reload which gets added to page_num after each buffer read
|
||||
--set reload to 256 = 1 when translated to page_num (done in allocate buffers funct)
|
||||
--set page_num to non-zero if offset arg sent
|
||||
--set mem_type and part_num to designate how to get/write data
|
||||
print("setting map n part")
|
||||
dict.buffer("SET_MEM_N_PART", (op_buffer["SNESROM"]<<8 | op_buffer["MASKROM"]), buff0 )
|
||||
dict.buffer("SET_MEM_N_PART", (op_buffer["SNESROM"]<<8 | op_buffer["MASKROM"]), buff1 )
|
||||
|
||||
--set multiple and add_mult only when flashing
|
||||
--set mapper, map_var, and function to designate read/write algo
|
||||
|
||||
print("setting map n mapvar")
|
||||
dict.buffer("SET_MAP_N_MAPVAR", (op_buffer[mapping]<<8 | op_buffer["NOVAR"]), buff0 )
|
||||
dict.buffer("SET_MAP_N_MAPVAR", (op_buffer[mapping]<<8 | op_buffer["NOVAR"]), buff1 )
|
||||
|
||||
-- //tell buffers what function to use for dumping
|
||||
-- //TODO when start implementing other mappers
|
||||
|
||||
--debugging print out buffer elements
|
||||
--print("\nget operation:")
|
||||
--dict.operation("GET_OPERATION" )
|
||||
--print("\n\ngetting cur_buff status")
|
||||
--dict.buffer("GET_CUR_BUFF_STATUS" )
|
||||
--print("\n\ngetting elements")
|
||||
--dict.buffer("GET_PRI_ELEMENTS", nil, buff0 )
|
||||
--dict.buffer("GET_PRI_ELEMENTS", nil, buff1 )
|
||||
--dict.buffer("GET_SEC_ELEMENTS", nil, buff0 )
|
||||
--dict.buffer("GET_SEC_ELEMENTS", nil, buff1 )
|
||||
--dict.buffer("GET_PAGE_NUM", nil, buff0 )
|
||||
--dict.buffer("GET_PAGE_NUM", nil, buff1 )
|
||||
|
||||
print("\n\nsetting operation STARTDUMP");
|
||||
--inform buffer manager to start dumping operation now that buffers are initialized
|
||||
dict.operation("SET_OPERATION", op_buffer["STARTDUMP"] )
|
||||
|
||||
--need these calls to delay things a bit to let first buffer dump complete..
|
||||
--wait for first buffer to finish dumping before calling payload
|
||||
buffers.status_wait({buff0}, {"DUMPED"})
|
||||
|
||||
print("starting first payload");
|
||||
--now just need to call series of payload IN transfers to retrieve data
|
||||
for i=1, (2048*1024/buff_size) do
|
||||
file:write( dict.buffer_payload_in( buff_size ))
|
||||
end
|
||||
|
||||
print("payload done");
|
||||
--buffer manager updates from USB_UNLOADING -> DUMPING -> DUMPED
|
||||
--while one buffer is unloading, it sends next buffer off to dump
|
||||
--payout opcode updates from DUMPED -> USB_LOADING
|
||||
--so end result is buff0 will get sent off to dump extra data that's not needed
|
||||
--but we never call payload on it, so buff1 never moves from USB_UNLOADING
|
||||
--but it has to be done unloading if we sent a subsequent setup packet
|
||||
--buffers.status_wait({buff0, buff1}, {"DUMPED","USB_UNLOADING"})
|
||||
--in reality I don't think this wait is needed. Because we've already gotten our data if
|
||||
--we're at this point..
|
||||
--what we really need to do is set the buffer's status' to a reset state
|
||||
--that way we can give them new instructions before restarting DUMP of CHR portion
|
||||
--best way can think of doing this is a operation "RESET" which updates buffer status,
|
||||
--without deallocating them. In reality should be able to do this by setting operation to reset.
|
||||
--and having STARTDUMP/FLASH initialize buffer status' as well.
|
||||
dict.operation("SET_OPERATION", op_buffer["RESET"] )
|
||||
dict.buffer("RAW_BUFFER_RESET")
|
||||
|
||||
--close file in main
|
||||
--reset io at end
|
||||
dict.operation("SET_OPERATION", op_buffer["RESET"] )
|
||||
dict.buffer("RAW_BUFFER_RESET")
|
||||
dict.io("IO_RESET")
|
||||
|
||||
return true
|
||||
end
|
||||
|
||||
-- global variables so other modules can use them
|
||||
|
||||
|
||||
|
|
@ -240,6 +342,7 @@ end
|
|||
|
||||
-- functions other modules are able to call
|
||||
dump.dump_nes = dump_nes
|
||||
dump.dump_snes = dump_snes
|
||||
|
||||
-- return the module's table
|
||||
return dump
|
||||
|
|
|
|||
|
|
@ -0,0 +1,106 @@
|
|||
|
||||
-- create the module's table
|
||||
local snes = {}
|
||||
|
||||
-- import required modules
|
||||
local dict = require "scripts.app.dict"
|
||||
|
||||
-- file constants
|
||||
local RESET_VECT_HI = 0xFFFD
|
||||
local RESET_VECT_LO = 0xFFFC
|
||||
|
||||
-- local functions
|
||||
|
||||
-- Desc:read reset vector from passed in bank
|
||||
-- Pre: snes_init() been called to setup i/o
|
||||
-- Post:Address left on bus memories disabled
|
||||
-- Rtn: reset vector that was found
|
||||
local function read_reset_vector( bank, debug )
|
||||
|
||||
--ensure cart is in play mode
|
||||
dict.pinport("CTL_SET_HI", "SNES_RST")
|
||||
|
||||
--first set SNES bank A16-23
|
||||
dict.snes("SNES_SET_BANK", bank)
|
||||
|
||||
--read reset vector high byte
|
||||
vector = dict.snes("SNES_ROM_RD", RESET_VECT_HI)
|
||||
--shift high byte of vector to where it belongs
|
||||
vector = vector << 8
|
||||
--read low byte of vector
|
||||
vector = vector | dict.snes("SNES_ROM_RD", RESET_VECT_LO)
|
||||
|
||||
if debug then print("SNES bank:", bank, "reset vector", string.format("$%x", vector) ) end
|
||||
|
||||
return vector
|
||||
end
|
||||
|
||||
-- Desc: attempt to read flash rom ID
|
||||
-- Pre: snes_init() been called to setup i/o
|
||||
-- Post:Address left on bus memories disabled
|
||||
-- Rtn: true if flash ID found
|
||||
local function read_flashID( debug )
|
||||
|
||||
local rv
|
||||
--enter software mode A11 is highest address bit that needs to be valid
|
||||
--datasheet not exactly explicit, A11 might not need to be valid
|
||||
--part has A-1 (negative 1) since it's in byte mode, meaning the part's A11 is actually A12
|
||||
--WR $AAA:AA $555:55 $AAA:AA
|
||||
dict.snes("SNES_SET_BANK", 0x00)
|
||||
|
||||
--put cart in program mode
|
||||
dict.pinport("CTL_SET_LO", "SNES_RST")
|
||||
|
||||
dict.snes("SNES_ROM_WR", 0x0AAA, 0xAA)
|
||||
dict.snes("SNES_ROM_WR", 0x0555, 0x55)
|
||||
dict.snes("SNES_ROM_WR", 0x0AAA, 0x90)
|
||||
--read manf ID
|
||||
rv = dict.snes("SNES_ROM_RD", 0x0000)
|
||||
if debug then print("attempted read SNES ROM manf ID:", string.format("%X", rv)) end
|
||||
-- if ( rv[RV_DATA0_IDX] != SST_MANF_ID ) {
|
||||
-- return GEN_FAIL;
|
||||
-- //no need for software exit since failed to enter
|
||||
-- }
|
||||
--
|
||||
--read prod ID
|
||||
rv = dict.snes("SNES_ROM_RD", 0x0002)
|
||||
if debug then print("attempted read SNES ROM prod ID:", string.format("%X", rv)) end
|
||||
rv = dict.snes("SNES_ROM_RD", 0x001C)
|
||||
if debug then print("attempted read SNES density ID: ", string.format("%X", rv)) end
|
||||
rv = dict.snes("SNES_ROM_RD", 0x001E)
|
||||
if debug then print("attempted read SNES boot sect ID:", string.format("%X", rv)) end
|
||||
-- if ( (rv[RV_DATA0_IDX] == SST_PROD_128)
|
||||
-- || (rv[RV_DATA0_IDX] == SST_PROD_256)
|
||||
-- || (rv[RV_DATA0_IDX] == SST_PROD_512) ) {
|
||||
-- //found expected manf and prod ID
|
||||
-- flash->manf = SST_MANF_ID;
|
||||
-- flash->part = rv[RV_DATA0_IDX];
|
||||
-- flash->wr_dict = DICT_NES;
|
||||
-- flash->wr_opcode = NES_PPU_WR;
|
||||
-- }
|
||||
--
|
||||
--exit software
|
||||
-- dict.nes("NES_PPU_WR", 0x0000, 0xF0)
|
||||
dict.snes("SNES_ROM_WR", 0x0000, 0xF0)
|
||||
--
|
||||
|
||||
--exit program mode
|
||||
dict.pinport("CTL_SET_HI", "SNES_RST")
|
||||
|
||||
--return true
|
||||
|
||||
end
|
||||
|
||||
-- global variables so other modules can use them
|
||||
|
||||
|
||||
-- call functions desired to run when script is called/imported
|
||||
|
||||
|
||||
-- functions other modules are able to call
|
||||
snes.read_reset_vector = read_reset_vector
|
||||
snes.read_flashID = read_flashID
|
||||
|
||||
-- return the module's table
|
||||
return snes
|
||||
|
||||
|
|
@ -155,6 +155,10 @@
|
|||
//operand LSB mapper variant
|
||||
#define NOVAR 0
|
||||
|
||||
|
||||
#define LOROM 0
|
||||
#define HIROM 1
|
||||
|
||||
//set function
|
||||
//miscdata: buffer number
|
||||
//operMSB: (might be needed if this is a ponter..?) or might need more than one function def..
|
||||
|
|
|
|||
|
|
@ -78,6 +78,7 @@
|
|||
// PC8 "EXP0" NES EXP0, cart-console /RESET
|
||||
#define C8_ 8
|
||||
#define EXP0_ 8
|
||||
#define SNES_RST_ 8
|
||||
// PC9 "LED" kazzos tied this to NES EXP9, INL6 connects to CIC CLK
|
||||
#define C9_ 9
|
||||
#define LED_ 9
|
||||
|
|
@ -169,5 +170,13 @@
|
|||
#define EXP_DISABLE_ 19
|
||||
#define EXP_SET_ 20
|
||||
|
||||
//============================
|
||||
//HIGH ADDR PORT 8bit WIDE ACCESS
|
||||
//opcode: type of operation
|
||||
//operand: value to place on bus
|
||||
//============================
|
||||
#define HADDR_ENABLE_ 21
|
||||
#define HADDR_DISABLE_ 22
|
||||
#define HADDR_SET_ 23
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -17,80 +17,18 @@
|
|||
//=============================================================================================
|
||||
|
||||
|
||||
// OPCODES with no operand and no return value besides SUCCESS/ERROR_CODE
|
||||
//set A16-23 aka bank number
|
||||
#define SNES_SET_BANK 0x00
|
||||
|
||||
//read from current bank at provided address
|
||||
//SNES reset is unaffected
|
||||
#define SNES_ROM_RD 0x01 //RL=3
|
||||
|
||||
//write from current bank at provided address
|
||||
//SNES reset is unaffected
|
||||
#define SNES_ROM_WR 0x02
|
||||
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND and no return value besides SUCCESS/ERROR_CODE
|
||||
//=============================================================================================
|
||||
// Detect this opcode/operand setup with opcode between the following defines:
|
||||
#define SNES_OPCODE_24BOP_MIN 0x00
|
||||
#define SNES_OPCODE_24BOP_MAX 0x7F
|
||||
//
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
|
||||
//SNES has 24bit address bus which is max operands we can send
|
||||
//So have to get a little creative for writing to 24bit address
|
||||
//prob easiest to just keep last latched value of A23-16
|
||||
|
||||
//write to SNES in program mode (/RESET low)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL always goes low
|
||||
//program writes don't allow access to SRAM
|
||||
//program access aligns ROM linearly and is independent of Hi/Lo switch
|
||||
#define SNES_A15_A0_PRGM_WR 0x00
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL always goes low
|
||||
//play writes allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_A15_A0_PLAY_WR 0x01
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL not affected
|
||||
//play writes allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_A15_A0_NO_ROMSEL_PLAY_WR 0x02
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND 8bit RETURN VALUE plus SUCCESS/ERROR_CODE
|
||||
//=============================================================================================
|
||||
// Detect this opcode/operand setup with opcode between the following defines:
|
||||
#define SNES_OPCODE_24BOP_8BRV_MIN 0x80
|
||||
#define SNES_OPCODE_24BOP_8BRV_MAX 0xFF
|
||||
//
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
//can supply entire 24bit address
|
||||
|
||||
//write to SNES in program mode (/RESET low)
|
||||
//SNES /ROMSEL always goes low
|
||||
//program reads don't allow access to SRAM
|
||||
//program access aligns ROM linearly and is independent of Hi/Lo switch
|
||||
#define SNES_PRGM_RD 0x80
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//SNES /ROMSEL always goes low
|
||||
//play reads allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_PLAY_RD 0x81
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//SNES /ROMSEL not active
|
||||
//play reads allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_NO_ROMSEL_PLAY_RD 0x82
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -65,8 +65,8 @@
|
|||
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
//#define DICT_SNES 4
|
||||
//#include "shared_dict_snes.h"
|
||||
#define DICT_SNES 4
|
||||
#include "shared_dict_snes.h"
|
||||
//snes dictionary contains commands
|
||||
//These commands rely on io initialization from io dictionary prior to calling
|
||||
//This library is intended to contain all SNES related opcodes/commands
|
||||
|
|
|
|||
|
|
@ -18,8 +18,8 @@
|
|||
//
|
||||
////reserved libusb erro 165
|
||||
//
|
||||
//#define ERR_UNKN_SNES_OPCODE 170
|
||||
//
|
||||
#define ERR_UNKN_SNES_OPCODE 170
|
||||
|
||||
#define ERR_UNKN_BUFF_OPCODE 180
|
||||
#define ERR_BUFN_DOES_NOT_EXIST 181
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue