diff --git a/firmware/DFU_release/INLretro6_PCBv2_0_FWv2_02.dfu b/firmware/DFU_release/INLretro6_PCBv2_0_FWv2_02.dfu
new file mode 100644
index 0000000..e51900f
Binary files /dev/null and b/firmware/DFU_release/INLretro6_PCBv2_0_FWv2_02.dfu differ
diff --git a/firmware/release/avr_kazzo_FWv2_02.hex b/firmware/release/avr_kazzo_FWv2_02.hex
new file mode 100644
index 0000000..f0c4b03
--- /dev/null
+++ b/firmware/release/avr_kazzo_FWv2_02.hex
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diff --git a/firmware/release/inlretro_stm_INL6_PCBv2_0_FWv2_02.hex b/firmware/release/inlretro_stm_INL6_PCBv2_0_FWv2_02.hex
new file mode 100644
index 0000000..20b89bd
--- /dev/null
+++ b/firmware/release/inlretro_stm_INL6_PCBv2_0_FWv2_02.hex
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diff --git a/firmware/source/dump.c b/firmware/source/dump.c
index c8cd90e..1b4a60a 100644
--- a/firmware/source/dump.c
+++ b/firmware/source/dump.c
@@ -10,13 +10,9 @@ uint8_t dump_buff( buffer *buff ) {
 
 	uint8_t addrH = buff->page_num;	//A15:8  while accessing page
 	uint8_t	bank;
-//warn	uint8_t addrX;	//A23:16 while accessing page
 
-	//TODO use mapper to set mapper controlled address bits
-
-	//use mem_type to set addrH/X as needed for dump loop
-	//also use to get read function pointer
 	switch ( buff->mem_type ) {
+	//	#ifdef NES_CONN
 		case NESCPU_4KB:
 			//mapper lower nibble specifies NES CPU A12-15
 			if (buff->mapper > 0x0F) { 
@@ -58,55 +54,29 @@ uint8_t dump_buff( buffer *buff ) {
 			buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
 								buff->last_idx, ~FALSE );
 			break;
+	//	#endif
 
+	//	#ifdef SNES_CONN
 		case SNESROM_PAGE:	//ROMSEL is always taken low
 			//mapper byte specifies SNES CPU A15-8
 			addrH |= (buff->mapper); //no shift needed
-			buff->cur_byte = snes_rom_page_rd_poll( buff->data, addrH, buff->id, 
+			buff->cur_byte = snes_page_rd_poll( buff->data, addrH, 0, buff->id, 
 							//id contains MSb of page when <256B buffer
 							buff->last_idx, ~FALSE );
 			break;
 
+		case SNESSYS_PAGE:	//ROMSEL stays high
+			//mapper byte specifies SNES CPU A15-8
+			addrH |= (buff->mapper); //no shift needed
+			buff->cur_byte = snes_page_rd_poll( buff->data, addrH, 1, buff->id, 
+							//id contains MSb of page when <256B buffer
+							buff->last_idx, ~FALSE );
+			break;
+	//	#endif
 
+	//	#ifdef NES_CONN
 		case PRGROM:
 			addrH |= 0x80;	//$8000
-			if (buff->mapper == MMC1) {
-				//write bank value to bank table
-				//page_num shift by 6 bits A15 >> A9(1)
-				bank = (buff->page_num)>>6;
-				bank &= 0x0F;		//only 4 bits in PRG
-				//LSb doesn't matter in 32KB mode
-				mmc1_wr(0x8000, 0x10, 1);	//write bank to PRG-ROM bank register
-				mmc1_wr(0xE000, bank, 0);	//write bank to PRG-ROM bank register
-				//TODO SXROM/SUROM require writting PRG-ROM MSb of address to CHR registers
-			}
-			if (buff->mapper == UxROM) {
-				//addrH &= 0b1011 1111 A14 must always be low
-				addrH &= 0xBF;
-				//write bank value to bank table
-				//page_num shift by 6 bits A14 >> A8(0)
-				bank = (buff->page_num)>>6;
-				//Nomolos bank table @ CC84
-				//nes_cpu_wr( (0xCC84+bank), bank );
-				//Owlia bank table @ CC84
-				//nes_cpu_wr( (0xE473+bank), bank );
-				//Rushnattack
-				//nes_cpu_wr( (0x8000+bank), bank );
-				//twindragons
-				//nes_cpu_wr( (0xC000+bank), bank );
-				//h1
-				//nes_cpu_wr( (0xFFC0+bank), bank );
-				//AFB
-				nes_cpu_wr( (0xFD69+bank), bank );
-
-				buff->cur_byte = nes_cpu_page_rd_poll( buff->data, addrH, buff->id, 
-								//id contains MSb of page when <256B buffer
-								buff->last_idx, ~FALSE );
-				break;
-			}
-			//if (buff->mapper == MMC3) {
-			//	THIS IS HANDLED from the host side using NESCPU_4KB
-			//}
 			if (buff->mapper == MAP30) {
 				//addrH &= 0b1011 1111 A14 must always be low
 				addrH &= 0xBF;
@@ -121,18 +91,6 @@ uint8_t dump_buff( buffer *buff ) {
 								buff->last_idx, ~FALSE );
 				break;
 			}
-			//if ((buff->mapper == BxROM) || (buff->mapper == CDREAM)) {
-			//	//write bank value to bank table
-			//	//page_num shift by 7 bits A15 >> A8(0)
-			//	bank = (buff->page_num)>>7;
-			//	//Lizard bank table @ FF94
-			//	nes_cpu_wr( (0xFF94+bank), bank );
-			//	//HH85
-			//	//nes_cpu_wr( (0xFFE0+bank), bank );
-			//	//Mojon bank table @ FF94
-			//	//nes_cpu_wr( 0x800C, 0x00);	//select first bank (only one with table)
-			//	//nes_cpu_wr( (0xCC43+bank), bank );	//then select desired bank
-			//}
 			if (buff->mapper == A53) {
 				//write bank value to bank table
 				//page_num shift by 7 bits A15 >> A8(0)
@@ -159,44 +117,6 @@ uint8_t dump_buff( buffer *buff ) {
 			break;
 
 		case CHRROM:		//$0000
-			//if (buff->mapper == NROM) {
-			//	buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
-			//						buff->last_idx, ~FALSE );
-			//}
-
-			//if (buff->mapper == MMC3) {
-			//	THIS IS HANDLED from the host side using NESPPU_4KB
-			//}
-
-			//if (buff->mapper == CNROM) {
-			//	//select bank
-			//	//8KB banks $0000-1FFF
-			//	//page_num shift by 5 bits A13 >> A8(0)
-			//	bank = (buff->page_num)>>5;
-
-			//	//write bank to register
-			//	//TODO account for bus conflicts
-			//	nes_cpu_wr(0x8000, bank);
-			//	
-			//	addrH &= 0x1F;	//only A12-8 are directly addressable
-			//	buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
-			//						buff->last_idx, ~FALSE );
-			//}
-
-			//if (buff->mapper == CDREAM) {
-			//	//select bank
-			//	//8KB banks $0000-1FFF
-			//	//page_num shift by 5 bits A13 >> A8(0)
-			//	bank = (buff->page_num)>>5;
-
-			//	//write bank to register
-			//	//TODO account for bus conflicts
-			//	nes_cpu_wr(0xFFFF, bank<<4);
-			//	
-			//	addrH &= 0x1F;	//only A12-8 are directly addressable
-			//	buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
-			//						buff->last_idx, ~FALSE );
-			//}
 
 			if (buff->mapper == DPROM) {
 				//select bank
@@ -211,28 +131,16 @@ uint8_t dump_buff( buffer *buff ) {
 				buff->cur_byte = nes_dualport_page_rd_poll( buff->data, addrH, buff->id,
 									buff->last_idx, ~FALSE );
 			}
-
-			if (buff->mapper == MMC1) {
-				//write bank value to bank table
-				//page_num shift by 4 bits A12 >> A8(0)
-				bank = (buff->page_num)>>4;
-				bank &= 0x1F;		//only 5 bits in CHR regs
-				//LSb doesn't matter in 32KB mode
-				mmc1_wr(0x8000, 0x10, 1);	//set to 4KB bank mode
-				mmc1_wr(0xA000, bank, 0);	//write bank to CHR-ROM bank register
-				//TODO SXROM/SUROM require writting PRG-ROM MSb of address to CHR registers
-				
-				addrH &= 0x0F;	//only A11-8 are directly addressable
-				buff->cur_byte = nes_ppu_page_rd_poll( buff->data, addrH, buff->id,
-									buff->last_idx, ~FALSE );
-			}
-
 			break;
+
 		case PRGRAM:
 			addrH |= 0x60;	//$6000
 			buff->cur_byte = nes_cpu_page_rd_poll( buff->data, addrH, buff->id,
 								buff->last_idx, ~FALSE );
 			break;
+	//	#endif
+
+	//	#ifdef SNES_CONN
 		case SNESROM:
 			if (buff->mapper == LOROM) {
 				addrH |= 0x80;	//$8000 LOROM space
@@ -251,12 +159,12 @@ uint8_t dump_buff( buffer *buff ) {
 				bank = ((((buff->page_num)>>8) | 0x40) & 0x7F);
 			}
 			HADDR_SET( bank );
-			buff->cur_byte = snes_rom_page_rd_poll( buff->data, addrH, buff->id, 
+			buff->cur_byte = snes_page_rd_poll( buff->data, addrH, 0, buff->id, 
 									//id contains MSb of page when <256B buffer
 									buff->last_idx, ~FALSE );
-		case SNESRAM:
-//warn			addrX = ((buff->page_num)>>8);
 			break;
+	//	#endif
+
 		default:
 			return ERR_BUFF_UNSUP_MEM_TYPE;
 	}
diff --git a/firmware/source/flash.c b/firmware/source/flash.c
index 7bf7425..7a0ba97 100644
--- a/firmware/source/flash.c
+++ b/firmware/source/flash.c
@@ -20,89 +20,44 @@ uint8_t	write_page( uint8_t addrH, buffer *buff, write_funcptr wr_func )
 	return SUCCESS;
 } 
 
-uint8_t	write_page_old( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
+//only used by cninja currently..
+uint8_t	write_page_cninja( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	while ( cur <= buff->last_idx ) {
 		//write unlock sequence
 		wr_func( unlock1, 0xAA );
 		wr_func( unlock2, 0x55 );
 		wr_func( unlock1, 0xA0 );
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
-	
 		} while( read != rd_func((addrH<<8)|n) );
-
-		//retry if write failed
-		//this helped but still seeing similar fails to dumps
-//		if (read == buff->data[n]) {
-	    		n++;
-	    		cur++;
-//			LED_IP_PU();	
-//			LED_LO();
-//		} else {
-//			nes_cpu_wr(0x5000, 0x81); //outer reg select mode
-//			nes_cpu_wr(0x8000, bank);	  //outer bank
-//			nes_cpu_wr(0x5000, 0x00); //chr reg select act like cnrom
-//			LED_OP();
-//			LED_HI();
-//		}
-
 	}
-
 	buff->cur_byte = n;
-
 	return SUCCESS;
-
 } 
 
-uint8_t	write_page_bank( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
+//only used by MM2 currently
+uint8_t	write_page_mm2( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	while ( cur <= buff->last_idx ) {
-
-		//select first bank for unlock sequence
-		//needs to be written to bank table!
-//		nes_cpu_wr( (0xCC84), 0x00 );
-//		nes_cpu_wr( (0xE473), 0x00 );
-	//	nes_cpu_wr( (0xC000), 0x00 );
 		nes_cpu_wr( (0xFD69), 0x00 );
-
-		//wr_func( 0x5555, 0xAA );
 		wr_func( unlock1, 0xAA );
-		//wr_func( 0x2AAA, 0x55 );
 		wr_func( unlock2, 0x55 );
-		//wr_func( 0x5555, 0xA0 );
 		wr_func( unlock1, 0xA0 );
-
-		//now need to select bank for the actual write!
-		//but this write can't be applied to the PRG-ROM 
-	//	nes_cpu_wr( (0xCC84+bank), bank );
-	//	nes_cpu_wr( (0xE473+bank), bank );
-	//	nes_cpu_wr( (0x8000+bank), bank );
-		//nes_cpu_wr( (0xC000+bank), bank );
-	//	nes_cpu_wr( (0xFFC0+bank), bank );
 		nes_cpu_wr( (0xFD69+bank), bank );
-
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
-	
 		} while( read != rd_func((addrH<<8)|n) );
-
-		//retry if write failed
-		//this helped but still seeing similar fails to dumps
 		if (read == buff->data[n]) {
 	    		n++;
 	    		cur++;
@@ -112,26 +67,19 @@ uint8_t	write_page_bank( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t
 			LED_OP();
 			LED_HI();
 		}
-
 	}
-
 	buff->cur_byte = n;
-
 	return SUCCESS;
-
 } 
 
-
 uint8_t	write_page_bank_map30( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	while ( cur <= buff->last_idx ) {
 
 		//select first bank for unlock sequence
-
 		//wr_func( 0x5555, 0xAA );
 		nes_cpu_wr( 0xC000, 0x01 );
 		wr_func( unlock1, 0xAA );
@@ -144,17 +92,12 @@ uint8_t	write_page_bank_map30( uint8_t bank, uint8_t addrH, uint16_t unlock1, ui
 
 		//now need to select bank for the actual write!
 		nes_cpu_wr( 0xC000, bank );
-
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
 	
 		} while( read != rd_func((addrH<<8)|n) );
-
-		//retry if write failed
-		//this helped but still seeing similar fails to dumps
 		if (read == buff->data[n]) {
 	    		n++;
 	    		cur++;
@@ -166,78 +109,21 @@ uint8_t	write_page_bank_map30( uint8_t bank, uint8_t addrH, uint16_t unlock1, ui
 		}
 
 	}
-
 	buff->cur_byte = n;
-
 	return SUCCESS;
-
 } 
 
-uint8_t	write_page_mmc1( uint8_t bank, uint8_t addrH, uint16_t unlock1, uint16_t unlock2, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
-{
-	uint16_t cur = buff->cur_byte;
-	uint8_t	n = buff->cur_byte;
-	uint8_t read;
-
-	while ( cur <= buff->last_idx ) {
-
-		mmc1_wr(0x8000, 0x10, 0);		//32KB mode
-		//IDK why, but somehow only the first byte gets programmed when ROM A14=1
-		//so somehow it's getting out of 32KB mode for follow on bytes..
-		//even though we reset to 32KB mode after the corrupting final write
-
-		wr_func( unlock1, 0xAA );
-		wr_func( unlock2, 0x55 );
-		wr_func( unlock1, 0xA0 );
-		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
-		//writes to flash are to $8000-FFFF so any register could have been corrupted and shift register may be off
-		//In reality MMC1 should have blocked all subsequent writes, so maybe only the CHR reg2 got corrupted..?
-		mmc1_wr(0x8000, 0x10, 1);		//32KB mode
-		mmc1_wr(0xE000, bank, 0);	//reset shift register, and bank register
-
-		do {
-			usbPoll();
-			read = rd_func((addrH<<8)|n);
-	
-		} while( read != rd_func((addrH<<8)|n) );
-
-		//retry if write failed
-		//this helped but still seeing similar fails to dumps
-		if (read == buff->data[n]) {
-          		n++;
-          		cur++;
-			LED_IP_PU();	
-			LED_LO();
-		} else {
-			mmc1_wr(0x8000, 0x10, 1);		//32KB mode
-			mmc1_wr(0xE000, bank, 0);	//reset shift register, and bank register
-			LED_OP();
-			LED_HI();
-		}
-
-	}
-
-	buff->cur_byte = n;
-
-	return SUCCESS;
-
-} 
 
 uint8_t	write_page_a53( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	//enter unlock bypass mode
 	wr_func( 0x8AAA, 0xAA );
 	wr_func( 0x8555, 0x55 );
 	wr_func( 0x8AAA, 0x20 );
-
 	while ( cur <= buff->last_idx ) {
-
-
 		//TODO FIX THIS!  It shouldn't be needed!
 		//but for some reason the mapper is loosing it's setting for $5000 register to 
 		//permit flash writes.  Many writes go through, but at somepoint it gets lost..
@@ -247,18 +133,13 @@ uint8_t	write_page_a53( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr
 		//AVR didn't need this patch so maybe is a speed issue
 		//stmadapter didn't have problems either..
 		//added time delay before m2 rising edge and it didn't change anything for stm6
-
 	//	curaddresswrite( 0xA0 );	//gained ~3KBps (59.13KBps) inl6 with v3.0 proto
 		wr_func( ((addrH<<8)| n), 0xA0  );
-
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
-	
 		} while( read != rd_func((addrH<<8)|n) );
-
 		//retry if write failed
 		//this helped but still seeing similar fails to dumps
 		if (read == buff->data[n]) {
@@ -274,20 +155,14 @@ uint8_t	write_page_a53( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr
 			LED_OP();
 			LED_HI();
 		}
-
 	}
-
 	buff->cur_byte = n;
-
 	//exit unlock bypass mode
 	wr_func( 0x8000, 0x90 );
 	wr_func( 0x8000, 0x00 );
 	//reset the flash chip, supposed to exit too
 	wr_func( 0x8000, 0xF0 );
-
-
 	return SUCCESS;
-
 } 
 
 uint8_t	write_page_tssop( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
@@ -295,26 +170,18 @@ uint8_t	write_page_tssop( uint8_t bank, uint8_t addrH, buffer *buff, write_funcp
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	//enter unlock bypass mode
 	wr_func( 0x8AAA, 0xAA );
 	wr_func( 0x8555, 0x55 );
 	wr_func( 0x8AAA, 0x20 );
-
 	while ( cur <= buff->last_idx ) {
-
-
 	//	curaddresswrite( 0xA0 );	//gained ~3KBps (59.13KBps) inl6 with v3.0 proto
 		wr_func( ((addrH<<8)| n), 0xA0  );
-
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
-	
 		} while( read != rd_func((addrH<<8)|n) );
-
 		//retry if write failed
 		//this helped but still seeing similar fails to dumps
 		if (read == buff->data[n]) {
@@ -330,173 +197,32 @@ uint8_t	write_page_tssop( uint8_t bank, uint8_t addrH, buffer *buff, write_funcp
 			LED_OP();
 			LED_HI();
 		}
-
 	}
-
 	buff->cur_byte = n;
-
 	//exit unlock bypass mode
 	wr_func( 0x8000, 0x90 );
 	wr_func( 0x8000, 0x00 );
 	//reset the flash chip, supposed to exit too
 	wr_func( 0x8000, 0xF0 );
-
-
 	return SUCCESS;
-
 } 
 
 
-uint8_t	write_page_chr( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
-{
-	uint16_t cur = buff->cur_byte;
-	uint8_t	n = buff->cur_byte;
-	uint8_t read;
-
-	while ( cur <= buff->last_idx ) {
-		//write unlock sequence
-		wr_func( 0x1555, 0xAA );
-		wr_func( 0x0AAA, 0x55 );
-		wr_func( 0x1555, 0xA0 );
-		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
-		do {
-			usbPoll();
-			read = rd_func((addrH<<8)|n);
-	
-		} while( read != rd_func((addrH<<8)|n) );
-		//TODO verify byte is value that was trying to be flashed
-		//move on to next byte
-		//n++;
-		//cur++;
-		if (read == buff->data[n]) {
-			n++;
-			cur++;
-			LED_IP_PU();	
-			LED_LO();
-		} else {
-			LED_OP();
-			LED_HI();
-		}
-
-	}
-
-	buff->cur_byte = n;
-
-	return SUCCESS;
-
-} 
-
-uint8_t	write_page_chr_cnrom( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
-{
-	uint16_t cur = buff->cur_byte;
-	uint8_t	n = buff->cur_byte;
-	uint8_t read;
-
-	while ( cur <= buff->last_idx ) {
-		//write unlock sequence
-		nes_cpu_wr( 0x8000, 0x02 );
-		wr_func( 0x1555, 0xAA );
-		nes_cpu_wr( 0x8000, 0x01 );
-		wr_func( 0x0AAA, 0x55 );
-		nes_cpu_wr( 0x8000, 0x02 );
-		wr_func( 0x1555, 0xA0 );
-		nes_cpu_wr( 0x8000, bank );
-		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
-		do {
-			usbPoll();
-			nes_cpu_wr( 0x8000, bank );
-			read = rd_func((addrH<<8)|n);
-	
-		} while( read != rd_func((addrH<<8)|n) );
-		//TODO verify byte is value that was trying to be flashed
-		//move on to next byte
-		//n++;
-		//cur++;
-		if (read == buff->data[n]) {
-		//	n++;
-		//	cur++;
-			LED_IP_PU();	
-			LED_LO();
-		} else {
-			LED_OP();
-			LED_HI();
-		}
-
-	}
-
-	buff->cur_byte = n;
-
-	return SUCCESS;
-
-} 
-
-uint8_t	write_page_chr_cdream( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
-{
-	uint16_t cur = buff->cur_byte;
-	uint8_t	n = buff->cur_byte;
-	uint8_t read;
-
-	while ( cur <= buff->last_idx ) {
-		//write unlock sequence
-		nes_cpu_wr(0x8000, 0x20);
-		wr_func( 0x1555, 0xAA );
-		nes_cpu_wr(0x8000, 0x10);
-		wr_func( 0x0AAA, 0x55 );
-		nes_cpu_wr(0x8000, 0x20);
-		wr_func( 0x1555, 0xA0 );
-		nes_cpu_wr(0x8000, bank<<4);
-		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
-		do {
-			usbPoll();
-			read = rd_func((addrH<<8)|n);
-	
-		} while( read != rd_func((addrH<<8)|n) );
-		//TODO verify byte is value that was trying to be flashed
-		//move on to next byte
-		//n++;
-		//cur++;
-		if (read == buff->data[n]) {
-			n++;
-			cur++;
-			LED_IP_PU();	
-			LED_LO();
-		} else {
-			LED_OP();
-			LED_HI();
-		}
-
-	}
-
-	buff->cur_byte = n;
-
-	return SUCCESS;
-
-} 
-
 uint8_t	write_page_dualport( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 	//enter unlock bypass mode
 	wr_func( 0x0AAA, 0xAA );
 	wr_func( 0x0555, 0x55 );
 	wr_func( 0x0AAA, 0x20 );
-
 	while ( cur <= buff->last_idx ) {
-
 		wr_func( ((addrH<<8)| n), 0xA0  );
-
 		wr_func( ((addrH<<8)| n), buff->data[n] );
-	
 		do {
 			usbPoll();
 			read = rd_func((addrH<<8)|n);
-	
 		} while( read != rd_func((addrH<<8)|n) );
 		//TODO verify byte is value that was trying to be flashed
 		//move on to next byte
@@ -511,21 +237,14 @@ uint8_t	write_page_dualport( uint8_t bank, uint8_t addrH, buffer *buff, write_fu
 			LED_OP();
 			LED_HI();
 		}
-
 	}
-
 	buff->cur_byte = n;
-
-
 	//exit unlock bypass mode
 	wr_func( 0x0000, 0x90 );
 	wr_func( 0x0000, 0x00 );
 	//reset the flash chip, supposed to exit too
 	wr_func( 0x0000, 0xF0 );
-
-
 	return SUCCESS;
-
 } 
 
 //#define PRGM_MODE() swim_wotf(SWIM_HS, 0x500F, 0x40)
@@ -535,71 +254,45 @@ uint8_t	write_page_dualport( uint8_t bank, uint8_t addrH, buffer *buff, write_fu
 #define PRGM_MODE() NOP()
 #define PLAY_MODE() NOP()
 
-uint8_t	write_page_snes( uint8_t bank, uint8_t addrH, buffer *buff, write_funcptr wr_func, read_funcptr rd_func )
+uint8_t	write_page_snes( uint8_t bank, uint8_t addrH, buffer *buff, write_snes_funcptr wr_func, read_snes_funcptr rd_func )
 {
 	uint16_t cur = buff->cur_byte;
 	uint8_t	n = buff->cur_byte;
 	uint8_t read;
-
 #ifdef AVR_CORE
 		wdt_reset();	
 #endif
-
-
 	//set to program mode for first entry
 	//EXP0_LO();
 	//swim_wotf(SWIM_HS, 0x500F, 0x40)
 	PRGM_MODE();
 
 //; TODO I don't think all these NOPs are actually needed, but they work and don't seem to significantly affect program time on stm32
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
 	//enter unlock bypass mode
-	wr_func( 0x8AAA, 0xAA );
-	wr_func( 0x8555, 0x55 );
-	wr_func( 0x8AAA, 0x20 );
-
-
+	wr_func( 0x8AAA, 0xAA, 0 );
+	wr_func( 0x8555, 0x55, 0 );
+	wr_func( 0x8AAA, 0x20, 0 );
 	while ( cur <= buff->last_idx ) {
 		//write unlock sequence
-
 		//unlocked	wr_func( 0x0AAA, 0xAA );
 		//unlocked	wr_func( 0x0555, 0x55 );
-
 		//wr_func( 0x0000, 0xA0 );
-		snes_rom_wr_cur_addr( 0xA0 );	//gained ~3KBps (59.13KBps) inl6 with v3.0 proto
-
-		wr_func( ((addrH<<8)| n), buff->data[n] );
+		snes_wr_cur_addr( 0xA0, 0 );	//gained ~3KBps (59.13KBps) inl6 with v3.0 proto
+		wr_func( ((addrH<<8)| n), buff->data[n], 0 );
 		//wr_func( ((addrH<<8)| n), cur_data );  //didn't actually speed up
-
 		//Targetting 2MByte 16mbit flash which doesn't have buffered writes
 		//currently have average flash speed of 21.05KBps going to start removing some of these NOPs
 		//and optimizing flash routine to get time down.
-	
 		//exit program mode
 	//	EXP0_HI();
 		PLAY_MODE();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
 		//pre-fetch next byte of data
 		//cur_data = buff->data[n+1];
 #ifdef AVR_CORE
 		wdt_reset();	
 #endif
-
 		//wait for byte to flash
 	//	do {
 	//		usbPoll();
@@ -610,73 +303,33 @@ uint8_t	write_page_snes( uint8_t bank, uint8_t addrH, buffer *buff, write_funcpt
 		//this can cause things to hang on failed programs..
 		//need a smarter flash polling algo, kind of a pain because we don't have
 		//a good way to toggle /OE or /CE quickly on v3 SNES boards
-
-
 		usbPoll();
-		read = rd_func((addrH<<8)|n);
+		read = rd_func((addrH<<8)|n, 0);
 		//prepare for upcoming write cycle, or allow for a polling read
 		//EXP0_LO();
 		PRGM_MODE();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
 		//First check if already outputting final data
 		if (read != buff->data[n] )  {
 			//if not, lets see if toggle is occuring
 			//EXP0_HI();
 			PLAY_MODE();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-			while( read != rd_func((addrH<<8)|n) ){
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
+			while( read != rd_func((addrH<<8)|n, 0) ){
 				//EXP0_LO();
 				PRGM_MODE();
-				NOP(); NOP(); NOP(); NOP();
-				NOP(); NOP(); NOP(); NOP();
-				NOP(); NOP(); NOP(); NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
+				NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
 				//EXP0_HI();
 				PLAY_MODE();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-				read = rd_func((addrH<<8)|n);
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
+				read = rd_func((addrH<<8)|n, 0);
 			}
 			//prepare for upcoming write cycle
 			//EXP0_LO();
 			PRGM_MODE();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
-	NOP();
+	NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP();
 		}
-
 //		//IDK why, but AVR will exit early sometimes
 //		//without this second check, ~20 errors per 32KByte on SNES v3.0
 //		//All error bytes are 0xFF instead of true data
@@ -689,7 +342,6 @@ uint8_t	write_page_snes( uint8_t bank, uint8_t addrH, buffer *buff, write_funcpt
 //		//Ahh this is the issue, adding the code below only adds delay which gives flash
 //		//enough time to complete write.
 
-
 		//retry if write failed
 		//this helped but still seeing similar fails to dumps
 		n++;
@@ -709,17 +361,15 @@ uint8_t	write_page_snes( uint8_t bank, uint8_t addrH, buffer *buff, write_funcpt
 	buff->cur_byte = n;
 
 	//exit unlock bypass mode
-	wr_func( 0x8000, 0x90 );
-	wr_func( 0x8000, 0x00 );
+	wr_func( 0x8000, 0x90, 0 );
+	wr_func( 0x8000, 0x00, 0 );
 	//reset the flash chip, supposed to exit too
-	wr_func( 0x8000, 0xF0 );
+	wr_func( 0x8000, 0xF0, 0 );
 
 	//exit program mode
 	//EXP0_HI();
 	PLAY_MODE();
-
 	return SUCCESS;
-
 } 
 
 /* Desc:Flash buffer contents on to cartridge memory
@@ -734,54 +384,32 @@ uint8_t flash_buff( buffer *buff ) {
 	uint8_t addrH = buff->page_num;	//A15:8  while accessing page
 	uint8_t	bank;
 
-	//First need to initialize mapper register bits
-	//Perhaps this only needs to be done on first buffer though..?
-	//Actually think this is best handled from buffer.c in operation == STARTFLASH
-
-	//TODO use mapper to set mapper controlled address bits
-
-	//need to calculate current bank and addrH
-
-	//TODO set unlock addresses based on what works for that mapper and how it's banks are initialized
-
-	//use mem_type to set addrH/X as needed for dump loop
-	//also use to get read function pointer
 	switch ( buff->mem_type ) {
+//		#ifdef NES_CONN
 		case PRGROM:		//$8000
+
+			//Latest method used here!
+			//leave the host responsible for init & banking
+			//we just need to call a page write algo and give it mmc3_prgrom_flash_wr function
+			//think of this only as an 8KB ROM
+			//ie MMC3 flash writes are always $8000-9FFF, but the host arranges this
+			
 			if (buff->mapper == NROM) {
-				//write_page_old( 0, (0x80 | addrH), 0x5555, 0x2AAA, buff, discrete_exp0_prgrom_wr, nes_cpu_rd );
+				//used by other 32KB PRG bank discrete mappers like BNROM, CNROM, & color dreams
 				write_page( (0x80+addrH), buff, nrom_prgrom_flash_wr);
 			}
 			if (buff->mapper == MMC1) {
-				//write bank value
-				//page_num shift by 6 bits A15 >> A9(1)
-				bank = (buff->page_num)>>6;	//LSbit doesn't matter in 32KB mode
-				bank &= 0x0F;		//only 4 bits in PRG register
-				mmc1_wr(0x8000, 0x10, 1);	//ensure 32KB mode
-				mmc1_wr(0xE000, bank, 0);		//write bank to PRG-ROM bank register
-				//TODO SXROM/SUROM require writting PRG-ROM MSb of address to CHR registers
-				write_page_mmc1( bank, (0x80 | addrH), 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
+				write_page( (0x80+addrH), buff, mmc1_prgrom_flash_wr);
 			}
 			if (buff->mapper == UxROM) {
-				//addrH &= 0b1011 1111 A14 must always be low
-				addrH &= 0x3F;
-				addrH |= 0x80;	//A15 doesn't apply to exp0 write, but needed for read back
-				//write bank value
-				//page_num shift by 6 bits A14 >> A8(0)
-				bank = buff->page_num >> 6;
-				//bank gets written inside flash algo
-				write_page_bank( bank, addrH, 0x5555, 0x2AAA, buff, discrete_exp0_prgrom_wr, nes_cpu_rd );
+				write_page( (0x80+addrH), buff, unrom_prgrom_flash_wr);
 			}
-
 			if (buff->mapper == MMC3) {
-				//Latest method used here!
-				//leave the host responsible for init & banking
-				//we just need to call a page write algo and give it mmc3_prgrom_flash_wr function
-				//think of this only as an 8KB ROM
-				//MMC3 flash writes are always $8000-9FFF, but the host arranges this
 				write_page( (0x80+addrH), buff, mmc3_prgrom_flash_wr);
 			}
-
+			if (buff->mapper == MMC4) {
+				write_page( (0x80+addrH), buff, mmc4_prgrom_sop_flash_wr);
+			}
 			if (buff->mapper == MM2) {
 				//addrH &= 0b1011 1111 A14 must always be low
 				addrH &= 0x3F;
@@ -790,7 +418,7 @@ uint8_t flash_buff( buffer *buff ) {
 				//page_num shift by 6 bits A14 >> A8(0)
 				bank = buff->page_num >> 6;
 				//bank gets written inside flash algo
-				write_page_bank( bank, addrH, 0x5555, 0x2AAA, buff, disc_push_exp0_prgrom_wr, nes_cpu_rd );
+				write_page_mm2( bank, addrH, 0x5555, 0x2AAA, buff, disc_push_exp0_prgrom_wr, nes_cpu_rd );
 			}
 			if (buff->mapper == MAP30) {
 				//addrH &= 0b1011 1111 A14 must always be low
@@ -802,31 +430,16 @@ uint8_t flash_buff( buffer *buff ) {
 				//bank gets written inside flash algo
 				write_page_bank_map30( bank, addrH, 0x9555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
 			}
-			//if ((buff->mapper == BxROM) || (buff->mapper == CDREAM)) {
-			//new method uses same algo as NROM, host handles all the banking!
-			//	//write bank value
-			//	//page_num shift by 7 bits A15 >> A8(0)
-			//	bank = buff->page_num >> 7;
-			//	//Lizard banktable location
-			//	nes_cpu_wr( (0xFF94+bank), bank );
-			//	//hh85
-			//	//nes_cpu_wr( (0xFFE0+bank), bank );
-			//	//Mojontales
-			//	//nes_cpu_wr( 0x800C, 0x00);	//select first bank (only bank with table)
-			//	//nes_cpu_wr( (0xCC43+bank), bank );	//then select desired bank
-			//	write_page_old( 0, (0x80 | addrH), 0x5555, 0x2AAA, buff, discrete_exp0_prgrom_wr, nes_cpu_rd );
-			//}
 			if (buff->mapper == CNINJA) {
 				//addrH &= 0b1001 1111 A14-13 must always be low
 				addrH &= 0x1F;
 				addrH |= 0x80;
-
 				//write bank value
 				//page_num shift by 5 bits A13 >> A8(0)
 				bank = buff->page_num >> 5;
 				nes_cpu_wr( (0x6000), 0xA5 );	//select desired bank
 				nes_cpu_wr( (0xFFFF), bank );	//select desired bank
-				write_page_old( 0, addrH, 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
+				write_page_cninja( 0, addrH, 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
 			}
 			if (buff->mapper == A53) {
 				//write bank value to bank table
@@ -860,36 +473,24 @@ uint8_t flash_buff( buffer *buff ) {
 				write_page_tssop( bank, (0x80 | addrH), buff, nes_cpu_wr, nes_cpu_rd );
 			}
 			break;
+
 		case CHRROM:		//$0000
 			if (buff->mapper == NROM) {
-				//write_page_chr( 0, addrH, buff, nes_ppu_wr, nes_ppu_rd );
 				write_page( addrH, buff, nrom_chrrom_flash_wr);
 			}
-
+			if (buff->mapper == MMC1) {
+				write_page( addrH, buff, mmc1_chrrom_flash_wr);
+			}
 			if (buff->mapper == CNROM) {
-				//cur_bank and bank_table must be set in nes.c prior to calling
 				write_page( addrH, buff, cnrom_chrrom_flash_wr);
 			}
 			if (buff->mapper == MMC3) {
-				//Latest method used here!
-				//leave the host responsible for init & banking
-				//we just need to call a page write algo and give it mmc3_prgrom_flash_wr function
-				//think of this only as an 8KB ROM
-				//MMC3 flash writes are always $8000-9FFF
 				write_page( addrH, buff, mmc3_chrrom_flash_wr);
 			}
+			if (buff->mapper == MMC4) {
+				write_page( addrH, buff, mmc4_chrrom_flash_wr);
+			}
 			if (buff->mapper == CDREAM) {
-//				//select bank
-//				//8KB banks $0000-1FFF
-//				//page_num shift by 5 bits A13 >> A8(0)
-//				bank = (buff->page_num)>>5;
-//
-//				//write bank to register
-//				//done inside write routine
-//				//nes_cpu_wr(0x8000, bank<<4);
-//				
-//				addrH &= 0x1F;	//only A12-8 are directly addressable
-//				write_page_chr_cdream( bank, addrH, buff, nes_ppu_wr, nes_ppu_rd );
 				write_page( addrH, buff, cdream_chrrom_flash_wr);
 			}
 			if (buff->mapper == DPROM) {
@@ -897,10 +498,8 @@ uint8_t flash_buff( buffer *buff ) {
 				//8KB banks $0000-1FFF
 				//page_num shift by 5 bits A13 >> A8(0)
 				bank = (buff->page_num)>>5;
-
 				//write bank to register
 				nes_ppu_wr(0x3FFF, bank);
-				
 				addrH &= 0x1F;	//only A12-8 are directly addressable
 				write_page_dualport( 0, addrH, buff, nes_dualport_wr, nes_dualport_rd );
 			}
@@ -909,7 +508,9 @@ uint8_t flash_buff( buffer *buff ) {
 		case PRGRAM:
 			write_page( addrH+0x60, buff, nes_cpu_wr);
 			break;
+		//#endif
 
+		//#ifdef SNES_CONN
 		case SNESROM:
 			if (buff->mapper == LOROM_5VOLT) {
 				//LOROM banks start at $XX:8000
@@ -938,7 +539,7 @@ uint8_t flash_buff( buffer *buff ) {
 				//clear any reset state
 				//EXP0_HI();
 			HADDR_SET( bank );
-			write_page_snes( 0, addrH, buff, snes_rom_wr, snes_rom_rd );
+			write_page_snes( 0, addrH, buff, snes_wr, snes_rd );
 			}
 			if (buff->mapper == HIROM) {
 				//need to split page_num
@@ -948,11 +549,13 @@ uint8_t flash_buff( buffer *buff ) {
 				//A23 ~page_num[14] (bank CO starts first half, bank 40 starts second)
 				bank = ((((buff->page_num)>>8) | 0x40) & 0x7F);
 			HADDR_SET( bank );
-			write_page_snes( 0, addrH, buff, snes_rom_wr, snes_rom_rd );
+			write_page_snes( 0, addrH, buff, snes_wr, snes_rd );
 			}
 		case SNESRAM:
 //warn			addrX = ((buff->page_num)>>8);
 			break;
+	//	#endif
+
 		default:
 			return ERR_BUFF_UNSUP_MEM_TYPE;
 	}
diff --git a/firmware/source/nes.c b/firmware/source/nes.c
index 5de010a..0df46d5 100644
--- a/firmware/source/nes.c
+++ b/firmware/source/nes.c
@@ -68,6 +68,15 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
 		case NROM_CHR_FLASH_WR:	
 			nrom_chrrom_flash_wr( operand, miscdata );
 			break;
+		case MMC1_PRG_FLASH_WR:	
+			mmc1_prgrom_flash_wr( operand, miscdata );
+			break;
+		case MMC1_CHR_FLASH_WR:	
+			mmc1_chrrom_flash_wr( operand, miscdata );
+			break;
+		case UNROM_PRG_FLASH_WR:	
+			unrom_prgrom_flash_wr( operand, miscdata );
+			break;
 		case CNROM_CHR_FLASH_WR:	
 			cnrom_chrrom_flash_wr( operand, miscdata );
 			break;
@@ -77,6 +86,12 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
 		case MMC3_CHR_FLASH_WR:	
 			mmc3_chrrom_flash_wr( operand, miscdata );
 			break;
+		case MMC4_PRG_SOP_FLASH_WR:	
+			mmc4_prgrom_sop_flash_wr( operand, miscdata );
+			break;
+		case MMC4_CHR_FLASH_WR:	
+			mmc4_chrrom_flash_wr( operand, miscdata );
+			break;
 		case CDREAM_CHR_FLASH_WR:	
 			cdream_chrrom_flash_wr( operand, miscdata );
 			break;
@@ -809,7 +824,7 @@ uint8_t nes_dualport_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first,
 
 
 
-/* Desc:NES MMC1 Write
+/* Desc:NES MMC1 Mapper Register Write
  * 	write to entirety of MMC1 register
  * 	address selects register that's written to
  * 	address must be >= $8000 where registers are located
@@ -896,6 +911,109 @@ void nrom_chrrom_flash_wr( uint16_t addr, uint8_t data )
 }
 
 
+/* Desc:NES MMC1 PRG-ROM FLASH Write
+ * Pre: nes_init() setup of io pins
+ * 	MMC1 must be properly inialized for flashing 
+ * 	32KB mode with current bank selected
+ * 	addr must be between $8000-FFFF as prescribed by init
+ * Post:Byte written and ready for another write
+ * Rtn:	None
+ */
+void mmc1_prgrom_flash_wr( uint16_t addr, uint8_t data )
+{
+
+	uint8_t rv;
+
+	//make a generic write to mapper reg so the last write will block all subsequent writes
+	mmc1_wr(0xC000, 0x05, 0); //just write to random CHR ROM register
+	
+	//unlock and write data
+	//all these writes will be block by MMC1 mapper register due to valid write above that ends with a write
+	nes_cpu_wr(0x5555, 0xAA);
+	nes_cpu_wr(0xAAAA, 0x55);
+	nes_cpu_wr(0x5555, 0xA0);
+	nes_cpu_wr(addr, data);
+
+	do {
+		rv = nes_cpu_rd(addr);
+		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
+	} while (rv != nes_cpu_rd(addr));
+	//TODO handle timeout
+
+	return;
+}
+
+
+/* Desc:NES MMC1 CHR-ROM FLASH Write
+ * Pre: nes_init() setup of io pins
+ * 	cur_bank global var must be set to desired mapper register value
+ * Post:Byte written and ready for another write
+ * Rtn:	None
+ */
+void mmc1_chrrom_flash_wr( uint16_t addr, uint8_t data )
+{
+
+	uint8_t rv;
+
+	//set banks for unlock commands
+	mmc1_wr(0xA000, 0x02, 0);
+	//PT1 always set to 0x05 for $5555 command
+	
+	//send unlock command
+	nes_ppu_wr(0x1555, 0xAA);
+	nes_ppu_wr(0x0AAA, 0x55);
+	nes_ppu_wr(0x1555, 0xA0);
+
+	//select desired bank for write
+	mmc1_wr(0xA000, cur_bank, 0);
+	//write the data
+	nes_ppu_wr(addr, data);
+
+	do {
+		rv = nes_ppu_rd(addr);
+		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
+	} while (rv != nes_ppu_rd(addr));
+
+	return;
+}
+
+
+
+
+/* Desc:NES UNROM PRG-ROM FLASH Write
+ * Pre: nes_init() setup of io pins
+ * 	cur_bank global var must be set to desired mapper register value
+ * 	bank_table global var must be set to base address of the bank table
+ * Post:Byte written and ready for another write
+ * Rtn:	None
+ */
+void unrom_prgrom_flash_wr( uint16_t addr, uint8_t data )
+{
+
+	uint8_t rv;
+
+	//set A14 low for lower bank so to satisfy unlock commands
+	nes_cpu_wr(bank_table, 0x00);
+
+	//unlock the flash
+	discrete_exp0_prgrom_wr(0x5555, 0xAA);
+	discrete_exp0_prgrom_wr(0x2AAA, 0x55);
+	discrete_exp0_prgrom_wr(0x5555, 0xA0);
+
+	//select desired bank and write data
+	nes_cpu_wr(bank_table+cur_bank, cur_bank);
+	discrete_exp0_prgrom_wr(addr, data);
+
+	do {
+		rv = nes_cpu_rd(addr);
+		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
+	} while (rv != nes_cpu_rd(addr));
+
+	return;
+}
+
+
+
 /* Desc:NES CNROM CHR-ROM FLASH Write
  * Pre: nes_init() setup of io pins
  * 	cur_bank global var must be set to desired mapper register value
@@ -993,6 +1111,93 @@ void mmc3_chrrom_flash_wr( uint16_t addr, uint8_t data )
 }
 
 
+/* Desc:NES MMC4 PRG-ROM FLASH Write
+ * Pre: nes_init() setup of io pins
+ * 	MMC4 must be properly inialized for flashing
+ * 	addr must be between $8000-BFFF as prescribed by init
+ * 	desired bank must already be selected
+ * 	cur_bank must be set to desired bank for recovery
+ * Post:Byte written and ready for another write
+ * Rtn:	None
+ */
+void mmc4_prgrom_sop_flash_wr( uint16_t addr, uint8_t data )
+{
+
+	uint8_t rv;
+
+	//unlock and write data SOP-44 flash
+	nes_cpu_wr(0xFAAA, 0xAA);
+	nes_cpu_wr(0xF555, 0x55);
+	nes_cpu_wr(0xFAAA, 0xA0);
+	nes_cpu_wr(addr, data);		//corrupts bank register if addr $A000-AFFF
+
+	//recover bank register as data write would have corrupted
+	nes_cpu_wr(0xA000, cur_bank);
+
+	do {
+		rv = nes_cpu_rd(addr);
+		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
+	} while (rv != nes_cpu_rd(addr));
+	//TODO handle timeout
+
+	return;
+}
+
+
+/* Desc:NES MMC4 CHR-ROM FLASH Write
+ * Pre: nes_init() setup of io pins
+ * 	cur_bank global var must be set to desired mapper register value
+ * Post:Byte written and ready for another write
+ * Rtn:	None
+ */
+void mmc4_chrrom_flash_wr( uint16_t addr, uint8_t data )
+{
+
+	uint8_t rv;
+//--set bank for unlock command
+//dict.nes("NES_CPU_WR", 0xB000, 0x0A)    --4KB @ PPU $0000 -> $2AAA cmd & writes
+//dict.nes("NES_CPU_WR", 0xC000, 0x0A)    --4KB @ PPU $0000
+//
+//--send unlock command
+//dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+//dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+//dict.nes("NES_PPU_WR", 0x1555, 0xA0)
+//
+//--select desired bank
+//dict.nes("NES_CPU_WR", 0xB000, bank)    --4KB @ PPU $0000 -> $2AAA cmd & writes
+//dict.nes("NES_CPU_WR", 0xC000, bank)    --4KB @ PPU $0000
+//--write data
+//dict.nes("NES_PPU_WR", addr, value)
+
+	//set banks for unlock commands
+	nes_cpu_wr(0xB000, 0x0A);
+	nes_cpu_wr(0xC000, 0x0A);
+
+	//PT1 always set to 0x05 for $5555 command
+	
+	//send unlock command
+	nes_ppu_wr(0x1555, 0xAA);
+	nes_ppu_wr(0x0AAA, 0x55);
+	nes_ppu_wr(0x1555, 0xA0);
+
+	//select desired bank for write
+	nes_cpu_wr(0xB000, cur_bank);
+	nes_cpu_wr(0xC000, cur_bank);
+
+	//write the data
+	nes_ppu_wr(addr, data);
+
+	do {
+		rv = nes_ppu_rd(addr);
+		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
+	} while (rv != nes_ppu_rd(addr));
+
+	return;
+}
+
+
+
+
 /* Desc:NES ColorDreams CHR-ROM FLASH Write
  * Pre: nes_init() setup of io pins
  * 	cur_bank global var must be set to desired mapper register value
@@ -1032,8 +1237,3 @@ void cdream_chrrom_flash_wr( uint16_t addr, uint8_t data )
 
 	return;
 }
-
-
-
-
-
diff --git a/firmware/source/nes.h b/firmware/source/nes.h
index d0ceaff..ebc2a89 100644
--- a/firmware/source/nes.h
+++ b/firmware/source/nes.h
@@ -27,9 +27,14 @@ void	mmc1_wr( uint16_t addr, uint8_t data, uint8_t reset );
 
 void 	nrom_prgrom_flash_wr( uint16_t addr, uint8_t data );
 void 	nrom_chrrom_flash_wr( uint16_t addr, uint8_t data );
+void 	mmc1_prgrom_flash_wr( uint16_t addr, uint8_t data );
+void	mmc1_chrrom_flash_wr( uint16_t addr, uint8_t data );
+void 	unrom_prgrom_flash_wr( uint16_t addr, uint8_t data );
 void 	cnrom_chrrom_flash_wr( uint16_t addr, uint8_t data );
 void	mmc3_prgrom_flash_wr( uint16_t addr, uint8_t data );
 void	mmc3_chrrom_flash_wr( uint16_t addr, uint8_t data );
+void 	mmc4_prgrom_sop_flash_wr( uint16_t addr, uint8_t data );
+void 	mmc4_chrrom_flash_wr( uint16_t addr, uint8_t data );
 void 	cdream_chrrom_flash_wr( uint16_t addr, uint8_t data );
 
 
diff --git a/firmware/source/snes.c b/firmware/source/snes.c
index 1ba205d..8667dff 100644
--- a/firmware/source/snes.c
+++ b/firmware/source/snes.c
@@ -33,7 +33,10 @@ uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *
 			HADDR_SET( operand );
 			break;
 		case SNES_ROM_WR:	
-			snes_rom_wr( operand, miscdata );
+			snes_wr( operand, miscdata, 0 );	//last arg is romsel state
+			break;
+		case SNES_SYS_WR:	
+			snes_wr( operand, miscdata, 1 );	//last arg is romsel state
 			break;
 		case FLASH_WR_5V:	
 			snes_5v_flash_wr( operand, miscdata );
@@ -45,7 +48,11 @@ uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *
 		//8bit return values:
 		case SNES_ROM_RD:
 			rdata[RD_LEN] = BYTE_LEN;
-			rdata[RD0] = snes_rom_rd( operand );
+			rdata[RD0] = snes_rd( operand, 0 );	//last arg is romsel state
+			break;
+		case SNES_SYS_RD:
+			rdata[RD_LEN] = BYTE_LEN;
+			rdata[RD0] = snes_rd( operand, 1 );	//last arg is romsel state
 			break;
 		default:
 			 //macro doesn't exist
@@ -57,7 +64,7 @@ uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *
 }
 
 /* Desc:SNES ROM Read without changing high bank
- * 	/ROMSEL always set low
+ * 	/ROMSEL set based on romsel arg
  * 	EXP0/RESET not affected
  * 	NOTE: this will access addresses when /ROMSEL isn't low on the console
  * Pre: snes_init() setup of io pins
@@ -65,14 +72,16 @@ uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *
  * 	data bus left clear
  * Rtn:	Byte read from ROM at addr
  */
-uint8_t	snes_rom_rd( uint16_t addr )
+uint8_t	snes_rd( uint16_t addr, uint8_t romsel )
 {
 	uint8_t	read;	//return value
 
 	//set address bus
 	ADDR_SET(addr);
 	
-	ROMSEL_LO();
+	if (romsel==0)
+		ROMSEL_LO();
+
 	CSRD_LO();
 
 	//couple more NOP's waiting for data
@@ -110,7 +119,7 @@ uint8_t	snes_rom_rd( uint16_t addr )
 }
 
 /* Desc:SNES ROM Write
- * 	/ROMSEL always set low
+ * 	/ROMSEL set based on romsel arg
  * 	EXP0/RESET unaffected
  * 	write value to currently selected bank
  * 	NOTE: this will access addresses when /ROMSEL isn't low on the console
@@ -119,7 +128,7 @@ uint8_t	snes_rom_rd( uint16_t addr )
  * 	address left on bus
  * Rtn:	None
  */
-void	snes_rom_wr( uint16_t addr, uint8_t data )
+void	snes_wr( uint16_t addr, uint8_t data, uint8_t romsel )
 {
 
 	ADDR_SET(addr);
@@ -132,7 +141,8 @@ void	snes_rom_wr( uint16_t addr, uint8_t data )
 	//level shifter on v3.0 boards
 	CSWR_LO();
 	//Then set romsel as this enables output of level shifter
-	ROMSEL_LO();
+	if (romsel==0)
+		ROMSEL_LO();
 	//Doing the other order creates bus conflict between ROMSEL low -> WR low
 
 	//give some time
@@ -142,8 +152,10 @@ void	snes_rom_wr( uint16_t addr, uint8_t data )
 	//swaping /WR /ROMSEL order above helped greatly
 	//but still had 2 byte fails adding NOPS
 	NOP();		//4x total NOPs passed all bytes v3.0 SNES and inl6
-	//NOP();
-	//NOP();	//6x total NOPs passed all bytes
+	NOP();
+	NOP();	//6x total NOPs passed all bytes
+	NOP();
+	NOP();
 	
 
 	//latch data to cart memory/mapper
@@ -155,7 +167,7 @@ void	snes_rom_wr( uint16_t addr, uint8_t data )
 }
 
 /* Desc:SNES ROM Write to current address
- * 	/ROMSEL always set low
+ * 	/ROMSEL set based on romsel arg
  * 	EXP0/RESET unaffected
  * 	write value to currently selected bank, and current address
  * 	Mostly used when address is don't care
@@ -164,7 +176,7 @@ void	snes_rom_wr( uint16_t addr, uint8_t data )
  * 	address left on bus
  * Rtn:	None
  */
-void	snes_rom_wr_cur_addr( uint8_t data )
+void	snes_wr_cur_addr( uint8_t data, uint8_t romsel)
 {
 
 //	ADDR_SET(addr);
@@ -177,7 +189,8 @@ void	snes_rom_wr_cur_addr( uint8_t data )
 	//level shifter on v3.0 boards
 	CSWR_LO();
 	//Then set romsel as this enables output of level shifter
-	ROMSEL_LO();
+	if (romsel==0)
+		ROMSEL_LO();
 	//Doing the other order creates bus conflict between ROMSEL low -> WR low
 
 	//give some time
@@ -197,8 +210,10 @@ void	snes_rom_wr_cur_addr( uint8_t data )
 	//Free data bus
 	DATA_IP();
 }
+
+
 /* Desc:SNES ROM Page Read with optional USB polling
- * 	/ROMSEL always low, EXP0/RESET unaffected
+ * 	/ROMSEL based on romsel arg, EXP0/RESET unaffected
  *	if poll is true calls usbdrv.h usbPoll fuction
  *	this is needed to keep from timing out when double buffering usb data
  * Pre: snes_init() setup of io pins
@@ -208,7 +223,7 @@ void	snes_rom_wr_cur_addr( uint8_t data )
  *	data buffer filled starting at first to last
  * Rtn:	Index of last byte read
  */
-uint8_t snes_rom_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
+uint8_t snes_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t romsel, uint8_t first, uint8_t len, uint8_t poll )
 {
 	uint8_t i;
 
@@ -217,7 +232,10 @@ uint8_t snes_rom_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint
 	
 	//set /ROMSEL and /RD
 	CSRD_LO();
-	ROMSEL_LO();
+
+	if (romsel==0) {
+		ROMSEL_LO();
+	}
 
 	//set lower address bits
 	ADDRL(first);		//doing this prior to entry and right after latching
@@ -276,15 +294,15 @@ void snes_5v_flash_wr( uint16_t addr, uint8_t data )
 	uint8_t rv;
 
 	//unlock and write data
-	snes_rom_wr(0x5555, 0xAA);
-	snes_rom_wr(0x2AAA, 0x55);
-	snes_rom_wr(0x5555, 0xA0);
-	snes_rom_wr(addr, data);
+	snes_wr(0x5555, 0xAA, 0);
+	snes_wr(0x2AAA, 0x55, 0);
+	snes_wr(0x5555, 0xA0, 0);
+	snes_wr(addr, data, 0);
 
 	do {
-		rv = snes_rom_rd(addr);
+		rv = snes_rd(addr, 0);
 		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
-	} while (rv != snes_rom_rd(addr));
+	} while (rv != snes_rd(addr, 0));
 
 	return;
 }
@@ -304,15 +322,15 @@ void snes_3v_flash_wr( uint16_t addr, uint8_t data )
 	uint8_t rv;
 
 	//unlock and write data
-	snes_rom_wr(0x8AAA, 0xAA);
-	snes_rom_wr(0x8555, 0x55);
-	snes_rom_wr(0x8AAA, 0xA0);
-	snes_rom_wr(addr, data);
+	snes_wr(0x8AAA, 0xAA, 0);
+	snes_wr(0x8555, 0x55, 0);
+	snes_wr(0x8AAA, 0xA0, 0);
+	snes_wr(addr, data, 0);
 
 	do {
-		rv = snes_rom_rd(addr);
+		rv = snes_rd(addr, 0);
 		usbPoll();	//orignal kazzo needs this frequently to slurp up incoming data
-	} while (rv != snes_rom_rd(addr));
+	} while (rv != snes_rd(addr, 0));
 
 	return;
 }
diff --git a/firmware/source/snes.h b/firmware/source/snes.h
index f8f5472..92a95a2 100644
--- a/firmware/source/snes.h
+++ b/firmware/source/snes.h
@@ -7,10 +7,10 @@
 #include "shared_errors.h"
 
 uint8_t snes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rdata );
-uint8_t	snes_rom_rd( uint16_t addr );
-void	snes_rom_wr( uint16_t addr, uint8_t data );
-void	snes_rom_wr_cur_addr( uint8_t data );
-uint8_t snes_rom_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll );
+uint8_t	snes_rd( uint16_t addr, uint8_t romsel );
+void	snes_wr( uint16_t addr, uint8_t data, uint8_t romsel );
+void	snes_wr_cur_addr( uint8_t data, uint8_t romsel );
+uint8_t snes_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t romsel, uint8_t first, uint8_t len, uint8_t poll );
 
 void 	snes_5v_flash_wr( uint16_t addr, uint8_t data );
 void 	snes_3v_flash_wr( uint16_t addr, uint8_t data );
diff --git a/firmware/source/types.h b/firmware/source/types.h
index a6aab91..9f705c4 100644
--- a/firmware/source/types.h
+++ b/firmware/source/types.h
@@ -16,6 +16,8 @@ typedef struct setup_packet{
 //typedef	uint8_t	(*read_funcptr)		( uint8_t addrH, uint8_t addrL );
 typedef	void	(*write_funcptr) 	( uint16_t addr, uint8_t data );
 typedef	uint8_t	(*read_funcptr)		( uint16_t addr );
+typedef	void	(*write_snes_funcptr) 	( uint16_t addr, uint8_t data, uint8_t romsel );
+typedef	uint8_t	(*read_snes_funcptr)	( uint16_t addr, uint8_t romsel );
 
 
 //~16 bytes per buffer...
diff --git a/host/scripts/app/nes.lua b/host/scripts/app/nes.lua
index 3e4f3ff..93ce0f6 100644
--- a/host/scripts/app/nes.lua
+++ b/host/scripts/app/nes.lua
@@ -156,12 +156,13 @@ local function detect_mapper_mirroring (debug)
 		elseif readV ~= 0 and readH ~= 0 then
 			if debug then print("1screen B mirroring sensed") end
 			return "1SCNB"
+
 		elseif readV ~= 0 and readH == 0 then
 			if debug then print("vertical mirroring sensed") end
 			return "VERT"
 		elseif readV == 0 and readH ~= 0 then
 			if debug then print("horizontal mirroring sensed") end
-			return "HORIZ"
+			return "HORZ"
 		end
 		--]]
 
diff --git a/host/scripts/inlretro.lua b/host/scripts/inlretro.lua
index 663ffcf..8f66240 100644
--- a/host/scripts/inlretro.lua
+++ b/host/scripts/inlretro.lua
@@ -64,10 +64,12 @@ function main ()
 -- =====================================================
 	--cart/mapper specific scripts
 	--local curcart = require "scripts.nes.nrom"
-	--local curcart = require "scripts.nes.cnrom"
 	--local curcart = require "scripts.nes.mmc1"
-	local curcart = require "scripts.nes.mmc3"
 	--local curcart = require "scripts.nes.unrom"
+	--local curcart = require "scripts.nes.cnrom"
+	local curcart = require "scripts.nes.mmc3"
+	--local curcart = require "scripts.nes.mmc2"
+	--local curcart = require "scripts.nes.mmc4"
 	--local curcart = require "scripts.nes.mm2"
 	--local curcart = require "scripts.nes.mapper30"
 	--local curcart = require "scripts.nes.bnrom"
@@ -76,10 +78,12 @@ function main ()
 	--local curcart = require "scripts.nes.action53"
 	--local curcart = require "scripts.nes.action53_tsop"
 	--local curcart = require "scripts.nes.easyNSF"
+	--local curcart = require "scripts.nes.fme7"
 	--local curcart = require "scripts.nes.dualport"
 	--local curcart = require "scripts.snes.v3"  --and GAMEBOY for now
 	--local curcart = require "scripts.snes.lorom_5volt"  --catskull design
 	--local curcart = require "scripts.snes.v2proto"
+	--local curcart = require "scripts.snes.v2proto_hirom"  --quickly becoming the master SNES script...
 	
 -- =====================================================
 -- USERS: set cart_console to the  to point to the mapper script you would like to use here.
@@ -123,7 +127,7 @@ function main ()
 --
 
 	--BOOTLOADER TEST
-	--print("jumping...")
+--	print("jumping...")
 
 	--jump to 0xDEADBEEF
 	--dict.bootload("LOAD_ADDRH", 0xDEAD)	
@@ -132,9 +136,13 @@ function main ()
 --	dict.bootload("JUMP_ADDR",  0xCAC5)	
 --	dict.bootload("LOAD_ADDRH", 0x0800)	
 --	dict.bootload("JUMP_ADDR",  0x00C1)	
+--
+--	dict.bootload("LOAD_ADDRH", 0x2000)	
+--	dict.bootload("JUMP_ADDR",  0x0430)	
 
-	--dict.bootload("JUMP_BL")	
-	--print("jumped")
+--	dict.bootload("JUMP_BL")	
+--	dict.bootload("JUMP_TEST")	
+--	print("jumped")
 
 --	debug = true
 --	rv = cart.detect(debug)
@@ -272,20 +280,6 @@ function main ()
 
 			--DUALPORT
 			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/ddug2.bin", "ignore/verifyout.bin")
-			--MMC1
-			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/BB_sgrom.prg", "ignore/verifyout.bin")
-			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/Zelda2.bin", "ignore/verifyout.bin")
-			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/Zelda2_doubleprg.bin", "ignore/verifyout.bin")
-			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/alfonzoMMC1.bin", "ignore/verifyout.bin")
-
-			--UxROM
-			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/AFB_128.prg", "ignore/verifyout.bin")
-			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/nomolosFINAL.prg", "ignore/verifyout.bin")
-			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/owlia_revb.prg", "ignore/verifyout.bin")
-			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/rushnattack.prg", "ignore/verifyout.bin")
-			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/TDfix.prg", "ignore/verifyout.bin")
-
-
 			--MM2
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/mm2_i0.prg", "ignore/verifyout.bin")
 			--curcart.process( true, true, false, false, false, "ignore/dump.bin", "ignore/mm2_i0.prg", "ignore/verifyout.bin")
@@ -324,6 +318,7 @@ function main ()
 			--have a better idea of what works best and minimizing firmware compilation and updates
 
 			--NROM
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/M0_P32K_C8K.bin", "ignore/verifyout.bin")
 			--curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/ddug2.bin", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/NTB_RE.bin", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/MM_demo.bin", "ignore/verifyout.bin")
@@ -331,13 +326,37 @@ function main ()
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/DEMO.bin", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/NES_hb_present.bin", "ignore/verifyout.bin")
 
+			--MMC1
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/P256K.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/BB_sgrom.prg", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/Zelda2.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/Zelda2_doubleprg.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/alfonzoMMC1.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, false, false, false, nil, nil, nil, true, false, "ignore/ramdump.bin", "ignore/zelda2_pauliscool.bin")
+
+
+			--UxROM
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/AFB_128.prg", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/nomolosFINAL.prg", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/owlia_revb.prg", "ignore/verifyout.bin")
+			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/rushnattack.prg", "ignore/verifyout.bin")
+			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/TDfix.prg", "ignore/verifyout.bin")
+
 			--CNROM
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/galf.bin", "ignore/verifyout.bin")
 
 			--MMC3
+			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/P512K_C256K.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/P256K_C128K.bin", "ignore/verifyout.bin")
 			--curcart.process( true, true, true, false, true, "ignore/dump.bin", "ignore/kirby.nes", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/kirby.bin", "ignore/verifyout.bin", false, false, "ignore/ramdump.bin", "ignore/ramwrite.bin")
-			curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/kirby.bin", "ignore/verifyout.bin", true, true, "ignore/ramdump.bin", "ignore/kirby3xSave.bin")
+			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/kirby.bin", "ignore/verifyout.bin", true, true, "ignore/ramdump.bin", "ignore/kirby3xSave.bin")
+
+			--MMC2
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/punchout.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, false, false, false, "ignore/dump.bin", "ignore/P256K_C128K.bin", "ignore/verifyout.bin")
+			--MMC4
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/fe.bin", "ignore/verifyout.bin")
 
 			--COLOR DREAMS
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/multicart_mojontalesFINAL.prg", "ignore/verifyout.bin")
@@ -347,6 +366,12 @@ function main ()
 			--curcart.process( true, true, true, true, true, "ignore/dump.bin", "ignore/lizard_v2.prg", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/hh85.prg", "ignore/verifyout.bin")
 
+			--FME7
+			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/P256K_C256K.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/gimmick.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/barcode_prgx2.bin", "ignore/verifyout.bin")
+
+			--curcart.process( true, false, false, false, false, nil, nil, nil, true, true, "ignore/ramdump.bin", "ignore/kirby3xSave.bin")
 		--[[
 			--FLASHING:
 			--erase cart
@@ -383,11 +408,16 @@ function main ()
 			
 			--SNES
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/MMXdump.bin", "ignore/verifyout.bin")
-			curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/smw.sfc", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, false, "ignore/dump.bin", "ignore/smw.sfc", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/SF2.bin", "ignore/verifyout.bin")
+			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/dkc.bin", "ignore/verifyout.bin")
+			--curcart.process( true, true, false, false, false, "ignore/dump.bin", "ignore/dkc_orig.bin", "ignore/verifyout.bin")
+			--curcart.process( false, false, false, false, false, "ignore/dump.bin", "ignore/smw.sfc", "ignore/verifyout.bin", true, true, "ignore/ramdump.bin", "ignore/smw_lauren.bin")
 			--curcart.process( true, true, false, false, false, "ignore/dump.bin", "ignore/hsbm_4Mbit_Lo.sfc", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/hsbm_4Mbit_Lo.sfc", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/hsbm_4Mbit_Hi.sfc", "ignore/verifyout.bin")
 			--curcart.process( true, false, true, true, true, "ignore/dump.bin", "ignore/hsbm_32Mbit_Hi.sfc", "ignore/verifyout.bin")
+			--curcart.process( false, false, false, false, false, nil, nil, nil, true, true, "ignore/ramdump.bin", "ignore/dkc_paul.bin")
 
 
 --			--old SNES code
diff --git a/host/scripts/nes/bnrom.lua b/host/scripts/nes/bnrom.lua
index ae6e842..bcd9d6f 100644
--- a/host/scripts/nes/bnrom.lua
+++ b/host/scripts/nes/bnrom.lua
@@ -226,11 +226,9 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 		nes.detect_mapper_mirroring(true)
 		nes.ppu_ram_sense(0x1000, true)
-
 		print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))	
-		--nes.read_flashID_prgrom_exp0(true)
-		prgrom_manf_id(true)
 
+		prgrom_manf_id(true)
 	end
 
 --dump the cart to dumpfile
@@ -251,7 +249,7 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 --erase the cart
 	if erase then
 
-		print("\nerasing BxROM");
+		print("\nErasing", mapname);
 
 		print("erasing PRG-ROM");
 		dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
@@ -283,7 +281,7 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 		--needs done to make board compatible with rom
 
 		--write bank table to all banks of cartridge
-		wr_bank_table(banktable_base, 16)
+		wr_bank_table(banktable_base, prg_size/32) --32KB per bank
 		--TODO need to verify where bank table belongs and properly determine number of banks
 
 		--flash cart
diff --git a/host/scripts/nes/fme7.lua b/host/scripts/nes/fme7.lua
new file mode 100644
index 0000000..d296899
--- /dev/null
+++ b/host/scripts/nes/fme7.lua
@@ -0,0 +1,727 @@
+
+-- create the module's table
+local fme7 = {}
+
+-- import required modules
+local dict = require "scripts.app.dict"
+local nes = require "scripts.app.nes"
+local dump = require "scripts.app.dump"
+local flash = require "scripts.app.flash"
+
+-- file constants
+local mapname = "FME7"
+
+-- local functions
+
+--disables WRAM, selects Vertical mirroring
+--sets up CHR-ROM flash PT0 for DATA, Commands: $5555->$1555  $2AAA->$1AAA 
+--sets up PRG-ROM flash DATA: $8000-9FFF, Commands: $5555->D555  $2AAA->$AAAA
+--leaves $8000 control reg selected to IRQ value selected so $A000 writes don't affect banking
+local function init_mapper( debug )
+
+
+	--for save data safety start by disable WRAM, and map PRG-ROM to $6000
+	dict.nes("NES_CPU_WR", 0x8000, 0x08)
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--RAM disabled, ROM first bank mapped to $6000
+	
+	--set mirroring
+	dict.nes("NES_CPU_WR", 0x8000, 0x0C)
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--00-vert 01-horz 10-NT0 11-NT1
+
+	--Bank $0 - PPU $0000-$03FF
+	--Bank $1 - PPU $0400-$07FF
+	--Bank $2 - PPU $0800-$0BFF
+	--Bank $3 - PPU $0C00-$0FFF
+	--Bank $4 - PPU $1000-$13FF
+	--Bank $5 - PPU $1400-$17FF
+	--Bank $6 - PPU $1800-$1BFF
+	--Bank $7 - PPU $1C00-$1FFF
+
+	--For CHR-ROM flash writes, use lower 4KB (PT0) for writting data & upper 4KB (PT1) for commands
+	dict.nes("NES_CPU_WR", 0x8000, 0x00)
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--1KB @ PPU $0000
+
+	dict.nes("NES_CPU_WR", 0x8000, 0x01)
+	dict.nes("NES_CPU_WR", 0xA000, 0x01)	--1KB @ PPU $0400
+
+	dict.nes("NES_CPU_WR", 0x8000, 0x02)
+	dict.nes("NES_CPU_WR", 0xA000, 0x02)	--1KB @ PPU $0800
+
+	dict.nes("NES_CPU_WR", 0x8000, 0x03)
+	dict.nes("NES_CPU_WR", 0xA000, 0x03)	--1KB @ PPU $0C00
+
+	--use lower half of PT1 for $5555 commands
+	dict.nes("NES_CPU_WR", 0x8000, 0x04)
+	dict.nes("NES_CPU_WR", 0xA000, 0x15)	--1KB @ PPU $1000
+	
+	dict.nes("NES_CPU_WR", 0x8000, 0x05)
+	dict.nes("NES_CPU_WR", 0xA000, 0x15)	--1KB @ PPU $1400
+
+	--use upper half of PT1 for $2AAA commands
+	dict.nes("NES_CPU_WR", 0x8000, 0x06)
+	dict.nes("NES_CPU_WR", 0xA000, 0x0A)	--1KB @ PPU $1800
+
+	dict.nes("NES_CPU_WR", 0x8000, 0x07)
+	dict.nes("NES_CPU_WR", 0xA000, 0x0A)	--1KB @ PPU $1C00
+
+
+	--For PRG-ROM flash writes:
+	--mode 0: $C000-FFFF fixed to last 16KByte
+	--        reg6 controls $8000-9FFF ($C000-DFFF in mode 1)
+	--        reg7 controls $A000-BFFF (regardless of mode)
+	--Don't want to write data to $8000-9FFF because those are the bank regs
+	--Writting data to $A000-BFFF is okay as that will only affect mirroring and WRAM ctl
+	
+	--$5555 commands can be written to $D555 (A14 set, A13 clear)
+	--$2AAA commands must be written through reg6/7 ($8000-BFFF) to clear A14 & set A13
+	--	reg7 ($A000-BFFF) is ideal because it won't affect banking, just mirror/WRAM
+	--	actually $2AAA is even, so it'll only affect mirroring which is ideal
+	--DATA writes can occur at $8000-9FFF, but care must be taken to maintain banking.
+	--	Setting $8000 to a CHR bank prevents DATA writes from changing PRG banks
+	--	The DATA write will change the bank select if it's written to an even address though
+	--	To cover this, simply select the CHR bank again with $8000 reg after the data write
+	--	Those DATA writes can also corrupt the PRG/CHR modes, so just always follow
+	--	DATA writes by writting 0x00 to $8000
+
+	--$5555 commands written to $D555
+	--$2AAA commands written to $AAAA
+	dict.nes("NES_CPU_WR", 0x8000, 0x0A)
+	dict.nes("NES_CPU_WR", 0xA000, 0x01)	--8KB @ CPU $A000
+	dict.nes("NES_CPU_WR", 0x8000, 0x0B)
+	dict.nes("NES_CPU_WR", 0xA000, 0x02)	--8KB @ CPU $C000
+
+	--DATA writes written to $8000-9FFF
+	dict.nes("NES_CPU_WR", 0x8000, 0x09)
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--8KB @ CPU $8000
+
+	--dict.nes("NES_CPU_WR", 0x8000, 0x08)
+	--dict.nes("NES_CPU_WR", 0xA000, 0x00)	--8KB @ CPU $6000
+
+	--set $8000 bank select register to IRQ ctl reg so $A000 writes don't change banking
+	dict.nes("NES_CPU_WR", 0x8000, 0x0E)
+
+end
+
+
+--test the mapper's mirroring modes to verify working properly
+--can be used to help identify board: returns true if pass, false if failed
+local function mirror_test( debug )
+
+	--put mapper in known state (mirror bits cleared)
+	init_mapper() 
+
+	--Vertical
+	dict.nes("NES_CPU_WR", 0x8000, 0x0C)
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--00-vert 01-horz 10-NT0 11-NT1
+	if (nes.detect_mapper_mirroring(false) ~= "VERT") then
+		print(mapname, " vert mirror test fail")
+		return false
+	end
+
+	--Horizontal
+	dict.nes("NES_CPU_WR", 0x8000, 0x0C)
+	dict.nes("NES_CPU_WR", 0xA000, 0x01)	--00-vert 01-horz 10-NT0 11-NT1
+	if (nes.detect_mapper_mirroring(false) ~= "HORZ") then
+		print(mapname, " horz mirror test fail")
+		return false
+	end
+
+	--NT0
+	dict.nes("NES_CPU_WR", 0x8000, 0x0C)
+	dict.nes("NES_CPU_WR", 0xA000, 0x02)	--00-vert 01-horz 10-NT0 11-NT1
+	if (nes.detect_mapper_mirroring(false) ~= "1SCNA") then
+		print(mapname, " NT0 mirror test fail")
+		return false
+	end
+
+	--NT1
+	dict.nes("NES_CPU_WR", 0x8000, 0x0C)
+	dict.nes("NES_CPU_WR", 0xA000, 0x03)	--00-vert 01-horz 10-NT0 11-NT1
+	if (nes.detect_mapper_mirroring(false) ~= "1SCNB") then
+		print(mapname, " NT1 mirror test fail")
+		return false
+	end
+
+	--passed all tests
+	if(debug) then print(mapname, " mirror test passed") end
+	return true
+end
+
+--read PRG-ROM flash ID
+local function prgrom_manf_id( debug )
+
+	init_mapper()
+
+	if debug then print("reading PRG-ROM manf ID") end
+	--A0-A14 are all directly addressable in CNROM mode
+	--and mapper writes don't affect PRG banking
+	dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+	dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+	dict.nes("NES_CPU_WR", 0xD555, 0x90)
+	rv = dict.nes("NES_CPU_RD", 0x8000)
+	if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
+	rv = dict.nes("NES_CPU_RD", 0x8001)
+	if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
+
+	--exit software
+	dict.nes("NES_CPU_WR", 0x8000, 0xF0)
+
+end
+
+--read CHR-ROM flash ID
+local function chrrom_manf_id( debug )
+
+	init_mapper()
+
+	if debug then print("reading CHR-ROM manf ID") end
+	--A0-A14 are all directly addressable in CNROM mode
+	--and mapper writes don't affect PRG banking
+	dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+	dict.nes("NES_PPU_WR", 0x1AAA, 0x55)
+	dict.nes("NES_PPU_WR", 0x1555, 0x90)
+	rv = dict.nes("NES_PPU_RD", 0x0000)
+	if debug then print("attempted read CHR-ROM manf ID:", string.format("%X", rv)) end
+	rv = dict.nes("NES_PPU_RD", 0x0001)
+	if debug then print("attempted read CHR-ROM prod ID:", string.format("%X", rv)) end
+
+	--exit software
+	dict.nes("NES_PPU_WR", 0x8000, 0xF0)
+
+end
+
+
+--dump the PRG ROM
+local function dump_prgrom( file, rom_size_KB, debug )
+
+	--PRG-ROM dump 16KB at a time through FME7 reg9&A
+	local KB_per_read = 16
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x08	-- $8000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
+
+		--select desired bank(s) to dump
+		dict.nes("NES_CPU_WR", 0x8000, 0x09)
+		--the bank is half the size of KB per read so must multiply by 2
+		dict.nes("NES_CPU_WR", 0xA000, read_count*2)	--8KB @ CPU $8000
+
+		dict.nes("NES_CPU_WR", 0x8000, 0x0A)
+		--the bank is half the size of KB per read so must multiply by 2 and add 1 for second 8KB
+		dict.nes("NES_CPU_WR", 0xA000, read_count*2+1)	--8KB @ CPU $A000
+
+		--16 = number of KB to dump per loop
+		--0x08 = starting read address A12-15 -> $8000
+		--NESCPU_4KB designate mapper independent read of NES CPU address space
+		--mapper must be 0-15 to designate A12-15
+		--dump.dumptofile( file, 16, 0x08, "NESCPU_4KB", true )
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+--dump the CHR ROM
+local function dump_chrrom( file, rom_size_KB, debug )
+
+	local KB_per_read = 2	--dump one half PT at a time so only need 2 reg writes
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x00	-- $0000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump CHR part ", read_count, " of ", num_reads) end
+		dict.nes("NES_CPU_WR", 0x8000, 0x00)
+		--the bank is half the size of KB per read so must multiply by 2
+		dict.nes("NES_CPU_WR", 0xA000, (read_count*2))	--1KB @ PPU $0000
+
+		dict.nes("NES_CPU_WR", 0x8000, 0x01)
+		--the bank is half the size of KB per read so must multiply by 2 and add 1 for second 1KB
+		dict.nes("NES_CPU_WR", 0xA000, (read_count*2+1))--1KB @ PPU $0800
+
+		--4 = number of KB to dump per loop
+		--0x00 = starting read address A10-13 -> $0000
+		--mapper must be 0x00 or 0x04-0x3C to designate A10-13
+		--	bits 7, 6, 1, & 0 CAN NOT BE SET!
+		--	0x04 would designate that A10 is set -> $0400 (the second 1KB PT bank)
+		--	0x20 would designate that A13 is set -> $2000 (first name table)
+		dump.dumptofile( file, KB_per_read, addr_base, "NESPPU_1KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--dump the WRAM, assumes the WRAM was enabled/disabled as desired prior to calling
+local function dump_wram( file, rom_size_KB, debug )
+
+	local KB_per_read = 8
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x06	-- $6000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump WRAM part ", read_count, " of ", num_reads) end
+
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--write a single byte to PRG-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first bank $8000-9FFF
+local function wr_prg_flash_byte(addr, value, debug)
+
+	if (addr < 0x8000 or addr > 0x9FFF) then
+		print("\n  ERROR! flash write to PRG-ROM", string.format("$%X", addr), "must be $8000-9FFF \n\n")
+		return
+	end
+
+	--send unlock command and write byte
+	dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+	dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+	dict.nes("NES_CPU_WR", 0xD555, 0xA0)
+	dict.nes("NES_CPU_WR", addr, value)
+
+	--recover by setting $8000 reg select back to a IRQ reg
+	dict.nes("NES_CPU_WR", 0x8000, 0x0E)
+
+	local rv = dict.nes("NES_CPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_CPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--write a single byte to CHR-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first 2 banks $0000-0FFF
+local function wr_chr_flash_byte(addr, value, debug)
+
+	if (addr < 0x0000 or addr > 0x0FFF) then
+		print("\n  ERROR! flash write to CHR-ROM", string.format("$%X", addr), "must be $0000-0FFF \n\n")
+		return
+	end
+
+	--send unlock command and write byte
+	dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+	dict.nes("NES_PPU_WR", 0x1AAA, 0x55)
+	dict.nes("NES_PPU_WR", 0x1555, 0xA0)
+	dict.nes("NES_PPU_WR", addr, value)
+
+	local rv = dict.nes("NES_PPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_PPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--host flash one bank at a time...
+--this is controlled from the host side one bank at a time
+--but requires mapper specific firmware flashing functions
+--there is super slow version commented out that doesn't require mapper specific firmware code
+local function flash_prgrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	--test some bytes
+	--wr_prg_flash_byte(0x0000, 0xA5, true)
+	--wr_prg_flash_byte(0x0FFF, 0x5A, true)
+
+	print("\nProgramming PRG-ROM flash")
+
+
+	local base_addr = 0x8000 --writes occur $8000-9FFF
+	local bank_size = 8*1024 --FME7 8KByte per PRG bank
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %8 == 0) then
+			print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--write the current bank to the mapper register
+		--DATA writes written to $8000-9FFF
+		dict.nes("NES_CPU_WR", 0x8000, 0x09)
+		dict.nes("NES_CPU_WR", 0xA000, cur_bank)	--8KB @ CPU $8000
+
+		--set $8000 bank select back to a IRQ register
+		--keeps from having the PRG bank changing when writting data
+		dict.nes("NES_CPU_WR", 0x8000, 0x0E)
+
+
+		--program the entire bank's worth of data
+
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			--wr_prg_flash_byte(base_addr+byte_num, data, false)   --0.7KBps
+
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			--MMC3 function works on FME7 just fine
+			--dict.nes("MMC3_PRG_FLASH_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			--NEXT STEP: firmware write page/bank function can use function pointer for the function above
+			--	this may cause issues with more complex algos
+			--	sometimes cur bank is needed 
+			--	for this to work, need to have function post conditions meet the preconditions
+			--	that way host intervention is only needed for bank controls
+			--	Is there a way to allow for double buffering though..?
+			--	YES!  just think of the bank as a complete memory
+			--	this greatly simplifies things and is exactly where we want to go
+			--	This is completed below outside the byte while loop @ 39KBps
+
+			if (verify) then
+				readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		--FAST!  13sec for 512KB = 39KBps
+		--MMC3 functions work perfectly for FME7
+		flash.write_file( file, 8, "MMC3", "PRGROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming PRG-ROM flash")
+
+end
+
+
+--slow host flash one byte at a time...
+--this is controlled from the host side byte by byte making it slow
+--but doesn't require specific firmware mapper flashing functions
+local function flash_chrrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	--test some bytes
+	--wr_chr_flash_byte(0x0000, 0xA5, true)
+	--wr_chr_flash_byte(0x0FFF, 0x5A, true)
+	
+	print("\nProgramming CHR-ROM flash")
+
+	local base_addr = 0x0000
+	local bank_size = 4*1024 --FME7 1KByte per lower CHR bank and we're using 4 of them..
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %8 == 0) then
+			print("writting CHR bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--write the current bank to the mapper register
+		--DATA writes written to $0000-0FFF
+		dict.nes("NES_CPU_WR", 0x8000, 0x00)
+		dict.nes("NES_CPU_WR", 0xA000, (cur_bank*4))	--1KB @ PPU $0000
+		dict.nes("NES_CPU_WR", 0x8000, 0x01)
+		dict.nes("NES_CPU_WR", 0xA000, (cur_bank*4+1))	--1KB @ PPU $0400
+		dict.nes("NES_CPU_WR", 0x8000, 0x02)
+		dict.nes("NES_CPU_WR", 0xA000, (cur_bank*4+2))	--1KB @ PPU $0800
+		dict.nes("NES_CPU_WR", 0x8000, 0x03)
+		dict.nes("NES_CPU_WR", 0xA000, (cur_bank*4+3))	--1KB @ PPU $0C00
+
+		--program the entire bank's worth of data
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			--wr_chr_flash_byte(base_addr+byte_num, data, false)  --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			dict.nes("MMC3_CHR_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
+			--FASTEST have the firmware handle flashing a bank's worth of data
+			--control the init and banking from the host side
+
+			if (verify) then
+				readdata = dict.nes("NES_PPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a "banks" worth of data, actually 2x banks of 2KB each
+		--FAST!  13sec for 512KB = 39KBps
+		flash.write_file( file, 4, "MMC3", "CHRROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming CHR-ROM flash")
+end
+
+
+--Cart should be in reset state upon calling this function 
+local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile, dumpram, writeram, ramdumpfile, ramwritefile)
+
+	local rv = nil
+	local file 
+	local prg_size = 256
+	local chr_size = 256
+	local wram_size = 8
+
+--initialize device i/o for NES
+	dict.io("IO_RESET")
+	dict.io("NES_INIT")
+
+--test cart by reading manf/prod ID
+	if test then
+		print("Testing ", mapname)
+
+		init_mapper()
+
+		--verify mirroring is behaving as expected
+		mirror_test(true)
+
+		nes.ppu_ram_sense(0x1000, true)
+		print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))	
+
+		--attempt to read PRG-ROM flash ID
+		prgrom_manf_id(true)
+		--attempt to read CHR-ROM flash ID
+		chrrom_manf_id(true)
+	end
+
+--dump the ram to file 
+	if dumpram then
+
+		print("\nDumping WRAM...")
+
+		init_mapper()
+		
+		--enable RAM at $6000
+		dict.nes("NES_CPU_WR", 0x8000, 0x08)
+		dict.nes("NES_CPU_WR", 0xA000, 0xC0)	--RAM enable, RAM mapped to $6000
+
+		file = assert(io.open(ramdumpfile, "wb"))
+
+		--dump cart into file
+		dump_wram(file, wram_size, false)
+
+		--for save data safety start by disable WRAM, and map PRG-ROM to $6000
+		dict.nes("NES_CPU_WR", 0x8000, 0x08)
+		dict.nes("NES_CPU_WR", 0xA000, 0x00)	--RAM disabled, ROM first bank mapped to $6000
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping WRAM")
+	end
+
+
+
+--dump the cart to dumpfile
+	if read then
+
+		print("\nDumping PRG & CHR ROMs...")
+
+		init_mapper()
+
+		file = assert(io.open(dumpfile, "wb"))
+
+		--dump cart into file
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping PRG & CHR ROMs")
+	end
+
+
+--erase the cart
+	if erase then
+
+		print("\nerasing ", mapname)
+
+		init_mapper()
+
+		print("erasing PRG-ROM");
+		dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+		dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+		dict.nes("NES_CPU_WR", 0xD555, 0x80)
+		dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+		dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+		dict.nes("NES_CPU_WR", 0xD555, 0x10)
+		rv = dict.nes("NES_CPU_RD", 0x8000)
+
+		local i = 0
+
+		--TODO create some function to pass the read value 
+		--that's smart enough to figure out if the board is actually erasing or not
+		while ( rv ~= 0xFF ) do
+			rv = dict.nes("NES_CPU_RD", 0x8000)
+			i = i + 1
+		end
+		print(i, "naks, done erasing prg.");
+
+
+		--TODO erase CHR-ROM only if present
+		init_mapper()
+
+		print("erasing CHR-ROM");
+		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+		dict.nes("NES_PPU_WR", 0x1AAA, 0x55)
+		dict.nes("NES_PPU_WR", 0x1555, 0x80)
+		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+		dict.nes("NES_PPU_WR", 0x1AAA, 0x55)
+		dict.nes("NES_PPU_WR", 0x1555, 0x10)
+		rv = dict.nes("NES_PPU_RD", 0x0000)
+
+		local i = 0
+
+		--TODO create some function to pass the read value 
+		--that's smart enough to figure out if the board is actually erasing or not
+		while ( rv ~= 0xFF ) do
+			rv = dict.nes("NES_PPU_RD", 0x8000)
+			i = i + 1
+		end
+		print(i, "naks, done erasing chr.");
+
+
+	end
+
+--write to wram on the cart
+	if writeram then
+
+		print("\nWritting to WRAM...")
+
+		init_mapper()
+		
+		--enable RAM at $6000
+		dict.nes("NES_CPU_WR", 0x8000, 0x08)
+		dict.nes("NES_CPU_WR", 0xA000, 0xC0)	--RAM enable, RAM mapped to $6000
+
+		file = assert(io.open(ramwritefile, "rb"))
+
+		flash.write_file( file, wram_size, "NOVAR", "PRGRAM", false )
+
+		--for save data safety start by disable WRAM, and map PRG-ROM to $6000
+		dict.nes("NES_CPU_WR", 0x8000, 0x08)
+		dict.nes("NES_CPU_WR", 0xA000, 0x00)	--RAM disabled, ROM first bank mapped to $6000
+
+		--close file
+		assert(file:close())
+
+		print("DONE Writting WRAM")
+	end
+
+--program flashfile to the cart
+	if program then
+
+		--open file
+		file = assert(io.open(flashfile, "rb"))
+		--determine if auto-doubling, deinterleaving, etc, 
+		--needs done to make board compatible with rom
+
+		flash_prgrom(file, prg_size, true)
+		flash_chrrom(file, chr_size, true)
+
+		--close file
+		assert(file:close())
+
+	end
+
+--verify flashfile is on the cart
+	if verify then
+		--for now let's just dump the file and verify manually
+		print("\nPost dumping PRG & CHR ROMs...")
+
+		init_mapper()
+
+		file = assert(io.open(verifyfile, "wb"))
+
+		--dump cart into file
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
+
+		--close file
+		assert(file:close())
+
+		print("DONE post dumping PRG & CHR ROMs")
+	end
+
+	dict.io("IO_RESET")
+end
+
+
+-- global variables so other modules can use them
+
+
+-- call functions desired to run when script is called/imported
+
+
+-- functions other modules are able to call
+fme7.process = process
+
+-- return the module's table
+return fme7
diff --git a/host/scripts/nes/mmc1.lua b/host/scripts/nes/mmc1.lua
index 02578c7..5e939d4 100644
--- a/host/scripts/nes/mmc1.lua
+++ b/host/scripts/nes/mmc1.lua
@@ -9,6 +9,7 @@ local dump = require "scripts.app.dump"
 local flash = require "scripts.app.flash"
 
 -- file constants
+local mapname = "MMC1"
 
 -- local functions
 
@@ -18,20 +19,25 @@ local function init_mapper( debug )
 	dict.nes("NES_CPU_RD", 0x8000)
 	--reset MMC1 shift register with D7 set
 	dict.nes("NES_CPU_WR", 0x8000, 0x80)
+	--this reset also effectively sets the control reg to 0x0C:
+	--	prg mode 3: last 16KB fixed
+	--	chr mode 0: single 8KB bank
+	--	mirroring 0: 1 screen NT0
 
 --	mmc1_write(0x8000, 0x10);       //32KB mode, prg bank @ $8000-FFFF, 4KB CHR mode
 	dict.nes("NES_MMC1_WR", 0x8000, 0x10)
 --	//note the mapper will constantly reset to this when writing to PRG-ROM
 --	//PRG-ROM A18-A14
 
---	mmc1_write(0xE000, 0x00);       //16KB bank @ $8000
-	dict.nes("NES_MMC1_WR", 0xE000, 0x00)
---	//CHR-ROM A16-12 (A14-12 are required to be valid)
+	--select first PRG-ROM bank, disable save RAM
+	dict.nes("NES_MMC1_WR", 0xE000, 0x10)	--LSBit ignored in 32KB mode
+						--bit4 RAM enable 0-enabled 1-disabled
+
+--	//CHR-ROM A16-12 (A14-12 are required to be valid)
+--	bit4 (CHR A16) is /CE pin for WRAM on SNROM
+	dict.nes("NES_MMC1_WR", 0xA000, 0x12) --4KB bank @ PT0  $2AAA cmd and writes
+	dict.nes("NES_MMC1_WR", 0xC000, 0x15) --4KB bank @ PT1  $5555 cmd fixed
 
---	mmc1_write(0xA000, 0x02);       //4KB bank @ PT0  $2AAA cmd and writes
-	dict.nes("NES_MMC1_WR", 0xA000, 0x02)
---	mmc1_write(0xC000, 0x05);       //4KB bank @ PT1  $5555 cmd fixed
-	dict.nes("NES_MMC1_WR", 0xC000, 0x05)
 end
 
 
@@ -139,13 +145,358 @@ end
 
 
 
+--dump the PRG ROM
+local function dump_prgrom( file, rom_size_KB, debug )
+
+	--PRG-ROM dump 32KB at a time in 32KB bank mode
+	local KB_per_read = 32
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x08	-- $8000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
+
+		--select desired bank(s) to dump
+		dict.nes("NES_MMC1_WR", 0xE000, read_count<<1)	--LSBit ignored in 32KB mode
+
+		--16 = number of KB to dump per loop
+		--0x08 = starting read address A12-15 -> $8000
+		--NESCPU_4KB designate mapper independent read of NES CPU address space
+		--mapper must be 0-15 to designate A12-15
+		--dump.dumptofile( file, 16, 0x08, "NESCPU_4KB", true )
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+--dump the CHR ROM
+local function dump_chrrom( file, rom_size_KB, debug )
+
+	local KB_per_read = 8	--dump both PT
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x00	-- $0000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump CHR part ", read_count, " of ", num_reads) end
+
+		dict.nes("NES_MMC1_WR", 0xA000, read_count*2) --4KB bank at $0000
+		dict.nes("NES_MMC1_WR", 0xC000, read_count*2+1) --4KB bank at $1000
+
+		--4 = number of KB to dump per loop
+		--0x00 = starting read address A10-13 -> $0000
+		--mapper must be 0x00 or 0x04-0x3C to designate A10-13
+		--	bits 7, 6, 1, & 0 CAN NOT BE SET!
+		--	0x04 would designate that A10 is set -> $0400 (the second 1KB PT bank)
+		--	0x20 would designate that A13 is set -> $2000 (first name table)
+		dump.dumptofile( file, KB_per_read, addr_base, "NESPPU_1KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--dump the WRAM, assumes the WRAM was enabled/disabled as desired prior to calling
+local function dump_wram( file, rom_size_KB, debug )
+
+	local KB_per_read = 8
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x06	-- $6000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump WRAM part ", read_count, " of ", num_reads) end
+
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--write a single byte to PRG-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first bank $8000-FFFF
+local function wr_prg_flash_byte(addr, value, bank, debug)
+
+	if (addr < 0x8000 or addr > 0xFFFF) then
+		print("\n  ERROR! flash write to PRG-ROM", string.format("$%X", addr), "must be $8000-FFFF \n\n")
+		return
+	end
+
+--mmc1_wr(0x8000, 0x10, 0);               //32KB mode
+--//IDK why, but somehow only the first byte gets programmed when ROM A14=1
+--//so somehow it's getting out of 32KB mode for follow on bytes..
+--//even though we reset to 32KB mode after the corrupting final write
+--
+--wr_func( unlock1, 0xAA );
+--wr_func( unlock2, 0x55 );
+--wr_func( unlock1, 0xA0 );
+--wr_func( ((addrH<<8)| n), buff->data[n] );
+--//writes to flash are to $8000-FFFF so any register could have been corrupted and shift register may be off
+--//In reality MMC1 should have blocked all subsequent writes, so maybe only the CHR reg2 got corrupted..?                mmc1_wr(0x8000, 0x10, 1);               //32KB mode
+--mmc1_wr(0xE000, bank, 0);       //reset shift register, and bank register
+
+	--MMC1 ignores all but the first write
+	--dict.nes("NES_CPU_RD", 0x8000)
+--	dict.nes("NES_CPU_WR", 0x8000, 0x80) --reset MMC1 shift register with D7 set
+
+	--dict.nes("NES_MMC1_WR", 0x8000, 0x10) --32KB mode, prg bank @ $8000-FFFF, 4KB CHR mode
+	--doing this after the write doesn't work for some reason....
+	--I think the reason this works is because the last instruction is a write (and it's valid)
+	--so the next 4 writes are blocked by the MMC1 including the reset
+	dict.nes("NES_MMC1_WR", 0xC000, 0x05)	--this seems to work as well which makes sense based on above..
+	--so now all follow on writes will be blocked until there is a read
+
+	--send unlock command and write byte
+	dict.nes("NES_CPU_WR", 0xD555, 0xAA)	--this will reset the MMC1..?, 
+						--but not if it was blocked by a previous write
+	dict.nes("NES_CPU_WR", 0xAAAA, 0x55)	--blocked
+	dict.nes("NES_CPU_WR", 0xD555, 0xA0)	--blocked
+	dict.nes("NES_CPU_WR", addr, value)	--blocked
+
+--	dict.nes("NES_CPU_RD", 0x8000)	--must read before resetting
+--	dict.nes("NES_CPU_WR", 0x8000, 0x80) --reset MMC1 shift register with D7 set
+--	dict.nes("NES_MMC1_WR", 0x8000, 0x10) --32KB mode, prg bank @ $8000-FFFF, 4KB CHR mode
+--	dict.nes("NES_MMC1_WR", 0xE000, bank<<1) --32KB mode, prg bank @ $8000-FFFF, 4KB CHR mode
+
+	local rv = dict.nes("NES_CPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_CPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--write a single byte to CHR-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first bank $0000-0FFF
+local function wr_chr_flash_byte(addr, value, bank, debug)
+
+	if (addr < 0x0000 or addr > 0x0FFF) then
+		print("\n  ERROR! flash write to CHR-ROM", string.format("$%X", addr), "must be $0000-0FFF \n\n")
+		return
+	end
+
+	--set banks for unlock commands
+	dict.nes("NES_MMC1_WR", 0xA000, 0x02) --4KB bank @ PT0  $2AAA cmd and writes (always write data to PT0)
+	--dict.nes("NES_MMC1_WR", 0xC000, 0x05) --4KB bank @ PT1  $5555 cmd fixed (never changed)
+
+	--send unlock command and write byte
+	dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+	dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+	dict.nes("NES_PPU_WR", 0x1555, 0xA0)
+
+	--select desired bank for write
+	dict.nes("NES_MMC1_WR", 0xA000, bank) --4KB bank @ PT0  $2AAA cmd and writes (always write data to PT0)
+	dict.nes("NES_PPU_WR", addr, value)
+
+	local rv = dict.nes("NES_PPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_PPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--host flash one bank at a time...
+--this is controlled from the host side one bank at a time
+--but requires mapper specific firmware flashing functions
+--there is super slow version commented out that doesn't require mapper specific firmware code
+local function flash_prgrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	--test some bytes
+	--wr_prg_flash_byte(0x0000, 0xA5, true)
+	--wr_prg_flash_byte(0x0FFF, 0x5A, true)
+
+	print("\nProgramming PRG-ROM flash")
+	--initial testing of MMC3 with no specific MMC3 flash firmware functions 6min per 256KByte = 0.7KBps
+
+
+	local base_addr = 0x8000 --writes occur $8000-9FFF
+	local bank_size = 32*1024 --MMC1 32KByte bank mode
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank % 2 == 0) then
+			print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--write the current bank to the mapper register
+		dict.nes("NES_MMC1_WR", 0xE000, cur_bank<<1)	--LSBit ignored in 32KB mode
+
+		--program the entire bank's worth of data
+
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			--wr_prg_flash_byte(base_addr+byte_num, data, cur_bank, false)   --0.7KBps
+
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			--dict.nes("MMC1_PRG_FLASH_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			--NEXT STEP: firmware write page/bank function can use function pointer for the function above
+			--	this may cause issues with more complex algos
+			--	sometimes cur bank is needed 
+			--	for this to work, need to have function post conditions meet the preconditions
+			--	that way host intervention is only needed for bank controls
+			--	Is there a way to allow for double buffering though..?
+			--	YES!  just think of the bank as a complete memory
+			--	this greatly simplifies things and is exactly where we want to go
+			--	This is completed below outside the byte while loop @ 39KBps
+
+			--local verify = true
+			if (verify) then
+				readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming PRG-ROM flash")
+
+end
+
+
+--slow host flash one byte at a time...
+--this is controlled from the host side byte by byte making it slow
+--but doesn't require specific firmware mapper flashing functions
+local function flash_chrrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	print("\nProgramming CHR-ROM flash")
+
+	--test some bytes
+	--wr_chr_flash_byte(0x0000, 0xA5, 0, true)
+	--wr_chr_flash_byte(0x0FFF, 0x5A, 0, true)
+	
+
+	local base_addr = 0x0000
+	local bank_size = 4*1024 --MMC1 always write to PT0
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %8 == 0) then
+			print("writting CHR bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--select bank to flash
+		dict.nes("SET_CUR_BANK", cur_bank) 
+		if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
+		--this only updates the firmware nes.c global
+		--which it will use when calling mmc1_chrrom_flash_wr
+
+		--program the entire bank's worth of data
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			--wr_chr_flash_byte(base_addr+byte_num, data, cur_bank, false)  --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			dict.nes("MMC1_CHR_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
+			--FASTEST have the firmware handle flashing a bank's worth of data
+			--control the init and banking from the host side
+
+			if (verify) then
+				readdata = dict.nes("NES_PPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a "banks" worth of data, actually 2x banks of 2KB each
+		--FAST!  13sec for 512KB = 39KBps
+		flash.write_file( file, bank_size/1024, mapname, "CHRROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming CHR-ROM flash")
+end
+
+
+
 
 --Cart should be in reset state upon calling this function 
 --this function processes all user requests for this specific board/mapper
-local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile)
+local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile, dumpram, writeram, ramdumpfile, ramwritefile)
 
 	local rv = nil
 	local file 
+	local prg_size = 256
+	local chr_size = 128
+	local wram_size = 8
 
 --initialize device i/o for NES
 	dict.io("IO_RESET")
@@ -153,6 +504,7 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 --test cart by reading manf/prod ID
 	if test then
+		print("Testing ", mapname)
 
 		--verify mirroring is behaving as expected
 		mirror_test(true)
@@ -166,27 +518,63 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 		chrrom_manf_id(true)
 	end
 
+
+--dump the ram to file 
+	if dumpram then
+		print("\nDumping WRAM...")
+
+		init_mapper()
+		
+		--enable save ram
+		dict.nes("NES_MMC1_WR", 0xE000, 0x00)	--bit4 RAM enable 0-enabled 1-disabled
+	
+		--bit4 (CHR A16) is /CE pin for WRAM on SNROM
+		dict.nes("NES_MMC1_WR", 0xA000, 0x02) --4KB bank @ PT0  $2AAA cmd and writes
+		dict.nes("NES_MMC1_WR", 0xC000, 0x05) --4KB bank @ PT1  $5555 cmd fixed
+
+		file = assert(io.open(ramdumpfile, "wb"))
+
+		--dump cart into file
+		dump_wram(file, wram_size, false)
+
+		--for save data safety disable WRAM, and deny writes
+		dict.nes("NES_MMC1_WR", 0xE000, 0x10)	--bit4 RAM enable 0-enabled 1-disabled
+	
+		--bit4 (CHR A16) is /CE pin for WRAM on SNROM
+		dict.nes("NES_MMC1_WR", 0xA000, 0x12) --4KB bank @ PT0  $2AAA cmd and writes
+		dict.nes("NES_MMC1_WR", 0xC000, 0x15) --4KB bank @ PT1  $5555 cmd fixed
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping WRAM")
+	end
+
+
+
 --dump the cart to dumpfile
 	if read then
-		init_mapper()	--32KB PRG-ROM banks
+		print("\nDumping PRG & CHR ROMs...")
+
+		init_mapper()
 
 		file = assert(io.open(dumpfile, "wb"))
 
 		--dump cart into file
-		dump.dumptofile( file, 256, "MMC1", "PRGROM", true )
-		dump.dumptofile( file, 128, "MMC1", "CHRROM", true )
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
 
 		--close file
 		assert(file:close())
+
+		print("DONE Dumping PRG & CHR ROMs")
 	end
 
 
 --erase the cart
 	if erase then
 
-		init_mapper()
-
-		print("\nerasing MMC1");
+		print("\nerasing ", mapname)
 
 		print("erasing PRG-ROM");
 		dict.nes("NES_CPU_WR", 0xD555, 0xAA)
@@ -209,30 +597,63 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 
 		--TODO erase CHR-ROM only if present
-		init_mapper()
+		if (chr_size ~= 0) then
+			init_mapper()
 
-		print("erasing CHR-ROM");
-		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
-		dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
-		dict.nes("NES_PPU_WR", 0x1555, 0x80)
-		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
-		dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
-		dict.nes("NES_PPU_WR", 0x1555, 0x10)
-		rv = dict.nes("NES_PPU_RD", 0x8000)
-
-		local i = 0
-
-		--TODO create some function to pass the read value 
-		--that's smart enough to figure out if the board is actually erasing or not
-		while ( rv ~= 0xFF ) do
+			print("erasing CHR-ROM");
+			dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+			dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+			dict.nes("NES_PPU_WR", 0x1555, 0x80)
+			dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+			dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+			dict.nes("NES_PPU_WR", 0x1555, 0x10)
 			rv = dict.nes("NES_PPU_RD", 0x8000)
-			i = i + 1
+
+			local i = 0
+
+			--TODO create some function to pass the read value 
+			--that's smart enough to figure out if the board is actually erasing or not
+			while ( rv ~= 0xFF ) do
+				rv = dict.nes("NES_PPU_RD", 0x8000)
+				i = i + 1
+			end
+			print(i, "naks, done erasing chr.");
 		end
-		print(i, "naks, done erasing chr.");
 
 
 	end
 
+--write to wram on the cart
+	if writeram then
+
+		print("\nWritting to WRAM...")
+
+		init_mapper()
+		
+		--enable save ram
+		dict.nes("NES_MMC1_WR", 0xE000, 0x00)	--bit4 RAM enable 0-enabled 1-disabled
+	
+		--bit4 (CHR A16) is /CE pin for WRAM on SNROM
+		dict.nes("NES_MMC1_WR", 0xA000, 0x02) --4KB bank @ PT0  $2AAA cmd and writes
+		dict.nes("NES_MMC1_WR", 0xC000, 0x05) --4KB bank @ PT1  $5555 cmd fixed
+
+		file = assert(io.open(ramwritefile, "rb"))
+
+		flash.write_file( file, wram_size, "NOVAR", "PRGRAM", false )
+
+		--for save data safety disable WRAM, and deny writes
+		dict.nes("NES_MMC1_WR", 0xE000, 0x10)	--bit4 RAM enable 0-enabled 1-disabled
+	
+		--bit4 (CHR A16) is /CE pin for WRAM on SNROM
+		dict.nes("NES_MMC1_WR", 0xA000, 0x12) --4KB bank @ PT0  $2AAA cmd and writes
+		dict.nes("NES_MMC1_WR", 0xC000, 0x15) --4KB bank @ PT1  $5555 cmd fixed
+
+		--close file
+		assert(file:close())
+
+		print("DONE Writting WRAM")
+	end
+
 
 --program flashfile to the cart
 	if program then
@@ -243,8 +664,9 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 		--needs done to make board compatible with rom
 
 		--flash cart
-		flash.write_file( file, 256, "MMC1", "PRGROM", true )
-		flash.write_file( file, 128, "MMC1", "CHRROM", true )
+		flash_prgrom(file, prg_size, false)
+		flash_chrrom(file, chr_size, false)
+
 		--close file
 		assert(file:close())
 
@@ -253,15 +675,20 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 --verify flashfile is on the cart
 	if verify then
 		--for now let's just dump the file and verify manually
+		print("\nPost dumping PRG & CHR ROMs...")
+
+		init_mapper()
 
 		file = assert(io.open(verifyfile, "wb"))
 
 		--dump cart into file
-		dump.dumptofile( file, 256, "MMC1", "PRGROM", true )
-		dump.dumptofile( file, 128, "MMC1", "CHRROM", true )
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
 
 		--close file
 		assert(file:close())
+
+		print("DONE post dumping PRG & CHR ROMs")
 	end
 
 	dict.io("IO_RESET")
diff --git a/host/scripts/nes/mmc3.lua b/host/scripts/nes/mmc3.lua
index f0acb12..cea5351 100644
--- a/host/scripts/nes/mmc3.lua
+++ b/host/scripts/nes/mmc3.lua
@@ -192,7 +192,7 @@ local function dump_prgrom( file, rom_size_KB, debug )
 		--select desired bank(s) to dump
 		dict.nes("NES_CPU_WR", 0x8000, 0x06)
 		--the bank is half the size of KB per read so must multiply by 2
-		dict.nes("NES_CPU_WR", 0x8001, read_count*2)	--1KB @ CPU $8000
+		dict.nes("NES_CPU_WR", 0x8001, read_count*2)	--8KB @ CPU $8000
 
 		dict.nes("NES_CPU_WR", 0x8000, 0x07)
 		--the bank is half the size of KB per read so must multiply by 2 and add 1 for second 8KB
@@ -534,7 +534,6 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 --dump the ram to file 
 	if dumpram then
-
 		print("\nDumping WRAM...")
 
 		init_mapper()
@@ -560,7 +559,6 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 --dump the cart to dumpfile
 	if read then
-
 		print("\nDumping PRG & CHR ROMs...")
 
 		init_mapper()
diff --git a/host/scripts/nes/mmc4.lua b/host/scripts/nes/mmc4.lua
new file mode 100644
index 0000000..7d6d93a
--- /dev/null
+++ b/host/scripts/nes/mmc4.lua
@@ -0,0 +1,651 @@
+
+-- create the module's table
+local mmc4 = {}
+
+-- import required modules
+local dict = require "scripts.app.dict"
+local nes = require "scripts.app.nes"
+local dump = require "scripts.app.dump"
+local flash = require "scripts.app.flash"
+
+-- file constants
+local mapname = "MMC4"
+
+-- local functions
+
+--disables WRAM, selects Vertical mirroring
+--sets up CHR-ROM flash PT0 for DATA, Commands: $5555->$1555  $2AAA->$1AAA 
+--sets up PRG-ROM flash DATA: $8000-9FFF, Commands: $5555->D555  $2AAA->$AAAA
+--leaves $8000 control reg selected to IRQ value selected so $A000 writes don't affect banking
+local function init_mapper( debug )
+
+
+	--RAM is always enabled..
+	
+	--set mirroring
+	dict.nes("NES_CPU_WR", 0xF000, 0x00)	--bit0: 0-vert 1-horz 
+
+
+	--For CHR-ROM flash writes, use lower 4KB (PT0) for writting data & upper 4KB (PT1) for commands
+	dict.nes("NES_CPU_WR", 0xB000, 0x02)	--4KB @ PPU $0000 -> $2AAA cmd & writes
+	dict.nes("NES_CPU_WR", 0xC000, 0x02)	--4KB @ PPU $0000
+	dict.nes("NES_CPU_WR", 0xD000, 0x05)	--4KB @ PPU $1000 -> $5555 cmd
+	dict.nes("NES_CPU_WR", 0xE000, 0x05)	--4KB @ PPU $1000
+
+
+	--can use upper 16KB $D555 for $5555 commands
+	--need lower bank for $AAAA commands and writes
+	dict.nes("NES_CPU_WR", 0xA000, 0x00)	--16KB @ CPU $8000
+
+end
+
+
+--test the mapper's mirroring modes to verify working properly
+--can be used to help identify board: returns true if pass, false if failed
+local function mirror_test( debug )
+
+	--put mapper in known state (mirror bits cleared)
+	init_mapper() 
+
+	--Vertical
+	--dict.nes("NES_CPU_WR", 0xF000, 0x00)	--bit0: 0-vert 1-horz 
+	if (nes.detect_mapper_mirroring(false) ~= "VERT") then
+		print(mapname, " vert mirror test fail")
+		return false
+	end
+
+	--Horizontal
+	dict.nes("NES_CPU_WR", 0xF000, 0x01)	--bit0: 0-vert 1-horz 
+	if (nes.detect_mapper_mirroring(false) ~= "HORZ") then
+		print(mapname, " horz mirror test fail")
+		return false
+	end
+
+	--passed all tests
+	if(debug) then print(mapname, " mirror test passed") end
+	return true
+end
+
+--read PRG-ROM flash ID
+local function prgrom_manf_id( debug )
+
+	init_mapper()
+
+	if debug then print("reading PRG-ROM manf ID") end
+	--SOP
+	dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
+	dict.nes("NES_CPU_WR", 0xF555, 0x55)
+	dict.nes("NES_CPU_WR", 0xFAAA, 0x90)
+	--PLCC
+	--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+	--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+	--dict.nes("NES_CPU_WR", 0xD555, 0x90)
+	rv = dict.nes("NES_CPU_RD", 0x8000) --0xC2 = MXIC
+	if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
+	rv = dict.nes("NES_CPU_RD", 0x8002) --SOP 0x23/0xAB 512KB top/bottom
+					    --SOP 0x51/0x57 256KB top/bottom
+					    --SOP 0xD6/0x58 1MB top/bottom
+	if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
+
+	--exit software
+	dict.nes("NES_CPU_WR", 0x8000, 0xF0)
+
+end
+
+--read CHR-ROM flash ID
+local function chrrom_manf_id( debug )
+
+	init_mapper()
+
+	if debug then print("reading CHR-ROM manf ID") end
+	--A0-A14 are all directly addressable in CNROM mode
+	--and mapper writes don't affect PRG banking
+	dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+	dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+	dict.nes("NES_PPU_WR", 0x1555, 0x90)
+	rv = dict.nes("NES_PPU_RD", 0x0000)
+	if debug then print("attempted read CHR-ROM manf ID:", string.format("%X", rv)) end
+	rv = dict.nes("NES_PPU_RD", 0x0001)
+	if debug then print("attempted read CHR-ROM prod ID:", string.format("%X", rv)) end
+
+	--exit software
+	dict.nes("NES_PPU_WR", 0x8000, 0xF0)
+
+end
+
+
+--dump the PRG ROM
+local function dump_prgrom( file, rom_size_KB, debug )
+
+	--PRG-ROM dump 16KB at a time
+	local KB_per_read = 16
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x80	-- $8000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
+
+		--select desired bank(s) to dump
+		dict.nes("NES_CPU_WR", 0xA000, read_count)	--16KB @ CPU $8000
+
+		--16 = number of KB to dump per loop
+		--0x08 = starting read address A12-15 -> $8000
+		--NESCPU_4KB designate mapper independent read of NES CPU address space
+		--mapper must be 0-15 to designate A12-15
+		--dump.dumptofile( file, 16, 0x08, "NESCPU_4KB", true )
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_PAGE", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+--dump the CHR ROM
+local function dump_chrrom( file, rom_size_KB, debug )
+
+	local KB_per_read = 8	--dump both PT at once
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x00	-- $0000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump CHR part ", read_count, " of ", num_reads) end
+		--the bank is half the size of KB per read so must multiply by 2
+		dict.nes("NES_CPU_WR", 0xB000, (read_count*2))	--4KB @ PPU $0000
+		dict.nes("NES_CPU_WR", 0xC000, (read_count*2))	--4KB @ PPU $0000
+
+		--the bank is half the size of KB per read so must multiply by 2 and add 1 for second 1KB
+		dict.nes("NES_CPU_WR", 0xD000, (read_count*2+1))--4KB @ PPU $1000
+		dict.nes("NES_CPU_WR", 0xE000, (read_count*2+1))--4KB @ PPU $1000
+
+		--4 = number of KB to dump per loop
+		--0x00 = starting read address A10-13 -> $0000
+		--mapper must be 0x00 or 0x04-0x3C to designate A10-13
+		--	bits 7, 6, 1, & 0 CAN NOT BE SET!
+		--	0x04 would designate that A10 is set -> $0400 (the second 1KB PT bank)
+		--	0x20 would designate that A13 is set -> $2000 (first name table)
+		dump.dumptofile( file, KB_per_read, addr_base, "NESPPU_PAGE", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--dump the WRAM, assumes the WRAM was enabled/disabled as desired prior to calling
+local function dump_wram( file, rom_size_KB, debug )
+
+	local KB_per_read = 8
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x06	-- $6000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump WRAM part ", read_count, " of ", num_reads) end
+
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+--write a single byte to PRG-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first bank $8000-BFFF
+local function wr_prg_flash_byte(addr, value, bank, debug)
+
+	if (addr < 0x8000 or addr > 0xBFFF) then
+		print("\n  ERROR! flash write to PRG-ROM", string.format("$%X", addr), "must be $8000-BFFF \n\n")
+		return
+	end
+
+	--select bank
+	dict.nes("NES_CPU_WR", 0xA000, bank)
+
+	--send unlock command and write byte
+	--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+	--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+	--dict.nes("NES_CPU_WR", 0xD555, 0xA0)
+	dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
+	dict.nes("NES_CPU_WR", 0xF555, 0x55)
+	dict.nes("NES_CPU_WR", 0xFAAA, 0xA0)
+	dict.nes("NES_CPU_WR", addr, value)	--if this write was $A000-AFFF it will also corrupt the bank
+
+	--recover bank
+	dict.nes("NES_CPU_WR", 0xA000, bank)
+
+	local rv = dict.nes("NES_CPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_CPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--write a single byte to CHR-ROM flash
+--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
+--REQ: addr must be in the first 2 banks $0000-0FFF
+local function wr_chr_flash_byte(addr, value, bank, debug)
+
+	if (addr < 0x0000 or addr > 0x0FFF) then
+		print("\n  ERROR! flash write to CHR-ROM", string.format("$%X", addr), "must be $0000-0FFF \n\n")
+		return
+	end
+
+	--set bank for unlock command
+	dict.nes("NES_CPU_WR", 0xB000, 0x0A)	--4KB @ PPU $0000 -> $2AAA cmd & writes
+	dict.nes("NES_CPU_WR", 0xC000, 0x0A)	--4KB @ PPU $0000
+
+	--send unlock command
+	dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+	dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+	dict.nes("NES_PPU_WR", 0x1555, 0xA0)
+
+	--select desired bank
+	dict.nes("NES_CPU_WR", 0xB000, bank)	--4KB @ PPU $0000 -> $2AAA cmd & writes
+	dict.nes("NES_CPU_WR", 0xC000, bank)	--4KB @ PPU $0000
+
+	--write data
+	dict.nes("NES_PPU_WR", addr, value)
+
+	local rv = dict.nes("NES_PPU_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.nes("NES_PPU_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--host flash one bank at a time...
+--this is controlled from the host side one bank at a time
+--but requires mapper specific firmware flashing functions
+--there is super slow version commented out that doesn't require mapper specific firmware code
+local function flash_prgrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	--test some bytes
+--	wr_prg_flash_byte(0x8000, 0xA5, 0, true)
+--	wr_prg_flash_byte(0xBFFF, 0x5A, 0, true)
+--	wr_prg_flash_byte(0x8000, 0x15, 1, true)
+--	wr_prg_flash_byte(0xBFFF, 0x1A, 1, true)
+--	wr_prg_flash_byte(0x8000, 0xF5, 0xF, true)
+--	wr_prg_flash_byte(0xBFFF, 0xFA, 0xF, true)
+
+	print("\nProgramming PRG-ROM flash")
+
+
+	local base_addr = 0x8000 --writes occur $8000-BFFF
+	local bank_size = 16*1024 --MMC4 16KByte per PRG bank
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %8 == 0) then
+			print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--select desired bank, needed for first write
+		dict.nes("NES_CPU_WR", 0xA000, cur_bank)	--16KB @ CPU $8000
+		--set cur_bank for recovery and subsequent bytes
+		dict.nes("SET_CUR_BANK", cur_bank) 
+		if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
+
+		--program the entire bank's worth of data
+
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			--wr_prg_flash_byte(base_addr+byte_num, data, cur_bank, false)   --0.7KBps
+
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			--MMC3 function works on FME7 just fine
+			dict.nes("MMC4_PRG_SOP_FLASH_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			--NEXT STEP: firmware write page/bank function can use function pointer for the function above
+			--	this may cause issues with more complex algos
+			--	sometimes cur bank is needed 
+			--	for this to work, need to have function post conditions meet the preconditions
+			--	that way host intervention is only needed for bank controls
+			--	Is there a way to allow for double buffering though..?
+			--	YES!  just think of the bank as a complete memory
+			--	this greatly simplifies things and is exactly where we want to go
+			--	This is completed below outside the byte while loop @ 39KBps
+
+			if (verify) then
+				readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		--FAST!  but needs firmware specific functions and flash control
+		flash.write_file( file, bank_size/1024, "MMC4", "PRGROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming PRG-ROM flash")
+
+end
+
+
+--slow host flash one byte at a time...
+--this is controlled from the host side byte by byte making it slow
+--but doesn't require specific firmware mapper flashing functions
+local function flash_chrrom(file, rom_size_KB, debug)
+
+	init_mapper()
+
+	--test some bytes
+	--wr_chr_flash_byte(0x0000, 0xA5, 0, true)
+	--wr_chr_flash_byte(0x0FFF, 0x5A, 0, true)
+	
+	print("\nProgramming CHR-ROM flash")
+
+	local base_addr = 0x0000
+	local bank_size = 4*1024 --MMC4 4KByte CHR bank
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %8 == 0) then
+			print("writting CHR bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--set cur_bank so firmware can select desired bank during the write
+		dict.nes("SET_CUR_BANK", cur_bank) 
+		if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
+
+		--program the entire bank's worth of data
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	mapper specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
+			wr_chr_flash_byte(base_addr+byte_num, data, cur_bank, false)  --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
+			--dict.nes("MMC4_CHR_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
+			--FASTEST have the firmware handle flashing a bank's worth of data
+			--control the init and banking from the host side
+
+			if (verify) then
+				readdata = dict.nes("NES_PPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a "banks" worth of data, actually 2x banks of 2KB each
+		--FAST!  13sec for 512KB = 39KBps
+		flash.write_file( file, bank_size/1024, "MMC4", "CHRROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming CHR-ROM flash")
+end
+
+
+--Cart should be in reset state upon calling this function 
+local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile, dumpram, writeram, ramdumpfile, ramwritefile)
+
+	local rv = nil
+	local file 
+	local prg_size = 256
+	local chr_size = 128
+	local wram_size = 8
+
+--initialize device i/o for NES
+	dict.io("IO_RESET")
+	dict.io("NES_INIT")
+
+--test cart by reading manf/prod ID
+	if test then
+		print("Testing ", mapname)
+
+		init_mapper()
+
+		--verify mirroring is behaving as expected
+		mirror_test(true)
+
+		nes.ppu_ram_sense(0x1000, true)
+		print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))	
+
+		--attempt to read PRG-ROM flash ID
+		prgrom_manf_id(true)
+		--attempt to read CHR-ROM flash ID
+		chrrom_manf_id(true)
+	end
+
+--dump the ram to file 
+	if dumpram then
+
+		print("\nDumping WRAM...")
+
+		init_mapper()
+		
+		--SRAM always enabled
+
+		file = assert(io.open(ramdumpfile, "wb"))
+
+		--dump cart into file
+		dump_wram(file, wram_size, false)
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping WRAM")
+	end
+
+
+
+--dump the cart to dumpfile
+	if read then
+
+		print("\nDumping PRG & CHR ROMs...")
+
+		init_mapper()
+
+		file = assert(io.open(dumpfile, "wb"))
+
+		--dump cart into file
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping PRG & CHR ROMs")
+	end
+
+
+--erase the cart
+	if erase then
+
+		print("\nerasing ", mapname)
+
+		init_mapper()
+
+		--PLCC
+		--print("erasing PRG-ROM");
+		--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+		--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+		--dict.nes("NES_CPU_WR", 0xD555, 0x80)
+		--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
+		--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
+		--dict.nes("NES_CPU_WR", 0xD555, 0x10)
+
+		--SOP
+		print("erasing PRG-ROM SOP-44 flash takes a couple sec...");
+		dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
+		dict.nes("NES_CPU_WR", 0xF555, 0x55)
+		dict.nes("NES_CPU_WR", 0xFAAA, 0x80)
+		dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
+		dict.nes("NES_CPU_WR", 0xF555, 0x55)
+		dict.nes("NES_CPU_WR", 0xFAAA, 0x10)
+		rv = dict.nes("NES_CPU_RD", 0x8000)
+
+		local i = 0
+
+		--TODO create some function to pass the read value 
+		--that's smart enough to figure out if the board is actually erasing or not
+		while ( rv ~= 0xFF ) do
+			rv = dict.nes("NES_CPU_RD", 0x8000)
+			i = i + 1
+		end
+		print(i, "naks, done erasing prg.");
+
+
+		--TODO erase CHR-ROM only if present
+		init_mapper()
+
+		print("erasing CHR-ROM");
+		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+		dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+		dict.nes("NES_PPU_WR", 0x1555, 0x80)
+		dict.nes("NES_PPU_WR", 0x1555, 0xAA)
+		dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
+		dict.nes("NES_PPU_WR", 0x1555, 0x10)
+		rv = dict.nes("NES_PPU_RD", 0x0000)
+
+		local i = 0
+
+		--TODO create some function to pass the read value 
+		--that's smart enough to figure out if the board is actually erasing or not
+		while ( rv ~= 0xFF ) do
+			rv = dict.nes("NES_PPU_RD", 0x8000)
+			i = i + 1
+		end
+		print(i, "naks, done erasing chr.");
+
+
+	end
+
+--write to wram on the cart
+	if writeram then
+
+		print("\nWritting to WRAM...")
+
+		init_mapper()
+		
+		--SRAM always enabled
+
+		file = assert(io.open(ramwritefile, "rb"))
+
+		flash.write_file( file, wram_size, "NOVAR", "PRGRAM", false )
+
+		--close file
+		assert(file:close())
+
+		print("DONE Writting WRAM")
+	end
+
+--program flashfile to the cart
+	if program then
+
+		--open file
+		file = assert(io.open(flashfile, "rb"))
+		--determine if auto-doubling, deinterleaving, etc, 
+		--needs done to make board compatible with rom
+
+		flash_prgrom(file, prg_size, false)
+		flash_chrrom(file, chr_size, false)
+
+		--close file
+		assert(file:close())
+
+	end
+
+--verify flashfile is on the cart
+	if verify then
+		--for now let's just dump the file and verify manually
+		print("\nPost dumping PRG & CHR ROMs...")
+
+		init_mapper()
+
+		file = assert(io.open(verifyfile, "wb"))
+
+		--dump cart into file
+		dump_prgrom(file, prg_size, false)
+		dump_chrrom(file, chr_size, false)
+
+		--close file
+		assert(file:close())
+
+		print("DONE post dumping PRG & CHR ROMs")
+	end
+
+	dict.io("IO_RESET")
+end
+
+
+-- global variables so other modules can use them
+
+
+-- call functions desired to run when script is called/imported
+
+
+-- functions other modules are able to call
+mmc4.process = process
+
+-- return the module's table
+return mmc4
diff --git a/host/scripts/nes/unrom.lua b/host/scripts/nes/unrom.lua
index 2925002..2d4b8e9 100644
--- a/host/scripts/nes/unrom.lua
+++ b/host/scripts/nes/unrom.lua
@@ -8,7 +8,20 @@ local nes = require "scripts.app.nes"
 local dump = require "scripts.app.dump"
 local flash = require "scripts.app.flash"
 
--- file constants
+-- file constants & variables
+local mapname = "UxROM"
+local banktable_base = 0xCC84 --Nomolos
+		--Nomolos' bank table is at $CC84 so hard code that for now
+		--wr_bank_table(0xCC84, 32)
+		--Owlia bank table
+		--wr_bank_table(0xE473, 32)
+		--rushnattack
+		--wr_bank_table(0x8000, 8)
+		--twindragons
+		--wr_bank_table(0xC000, 32)
+		--Armed for Battle
+		--wr_bank_table(0xFD69, 8)
+--local rom_FF_addr = 0x8000
 
 -- local functions
 local function init_mapper( debug )
@@ -23,11 +36,68 @@ local function init_mapper( debug )
 	dict.nes("NES_CPU_WR", 0x8000, 0x00)
 end
 
-local function wr_flash_byte(addr, value, debug)
+--read PRG-ROM flash ID
+local function prgrom_manf_id( debug )
 
+	init_mapper()
+
+	if debug then print("reading PRG-ROM manf ID") end
+
+	--enter software mode
+	--ROMSEL controls PRG-ROM /OE which needs to be low for flash writes
+	--So unlock commands need to be addressed below $8000
+	--DISCRETE_EXP0_PRGROM_WR doesn't toggle /ROMSEL by definition though, so A15 is unused
+	--	    15 14 13 12
+	-- 0x5 = 0b  0  1  0  1	-> $5555
+	-- 0x2 = 0b  0  0  1  0	-> $2AAA
+	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
+	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
+	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x90)
+
+	--read manf ID
+	local rv = dict.nes("NES_CPU_RD", 0x8000)
+	if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
+
+	--read prod ID
+	rv = dict.nes("NES_CPU_RD", 0x8001)
+	if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
+
+	--exit software
+	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x8000, 0xF0)
+
+end
+
+
+--dump the PRG ROM
+local function dump_prgrom( file, rom_size_KB, debug )
+
+	local KB_per_read = 16
+	local num_reads = rom_size_KB / KB_per_read
+	local read_count = 0
+	local addr_base = 0x08	-- $8000
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
+
+		--select desired bank(s) to dump
+		dict.nes("NES_CPU_WR", banktable_base+read_count, read_count)	--16KB @ CPU $8000
+
+		dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+local function wr_prg_flash_byte(addr, value, bank, debug)
+
+	dict.nes("NES_CPU_WR", banktable_base, 0x00)
 	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
 	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
 	dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xA0)
+	dict.nes("NES_CPU_WR", banktable_base+bank, bank)
 	dict.nes("DISCRETE_EXP0_PRGROM_WR", addr, value)
 
 	local rv = dict.nes("NES_CPU_RD", addr)
@@ -57,7 +127,7 @@ local function wr_bank_table(base, entries, numtables)
 	
 	local i = 0
 	while( i < entries) do
-		wr_flash_byte(base+i, i)
+		wr_prg_flash_byte(base+i, i, 0)
 		i = i+1;
 	end
 
@@ -80,7 +150,7 @@ local function wr_bank_table(base, entries, numtables)
 		local i = 0
 		while( i < entries) do
 			print("write entry", i, "bank:", cur_bank)
-			wr_flash_byte(base+i, i)
+			wr_prg_flash_byte(base+i, i)
 			i = i+1;
 		end
 
@@ -97,13 +167,97 @@ local function wr_bank_table(base, entries, numtables)
 
 end
 
+
+--host flash one byte/bank at a time...
+--this is controlled from the host side one bank at a time
+--but requires mapper specific firmware flashing functions
+local function flash_prgrom(file, rom_size_KB, debug)
+
+	init_mapper()
+	
+	--bank table should already be written
+	
+	--test some bytes
+	--wr_prg_flash_byte(0x0000, 0xA5, true)
+	--wr_prg_flash_byte(0xFFFF, 0x5A, true)
+
+	print("\nProgramming PRG-ROM flash")
+
+	local base_addr = 0x8000 --writes occur $8000-9FFF
+	local bank_size = 16*1024 --UNROM 16KByte per PRG bank
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+	--set the bank table address
+	dict.nes("SET_BANK_TABLE", banktable_base) 
+	if debug then print("get banktable:", string.format("%X", dict.nes("GET_BANK_TABLE"))) end
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %4 == 0) then
+			print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--select bank to flash
+		dict.nes("SET_CUR_BANK", cur_bank) 
+		if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
+
+		--program the entire bank's worth of data
+
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	MMC3 specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware MMC3 specific functions 100% host flash algo:
+			--wr_prg_flash_byte(base_addr+byte_num, data, cur_bank, false)   --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create MMC3 write byte function:
+			--can use same write function as NROM
+			dict.nes("UNROM_PRG_FLASH_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+
+			if (verify) then
+				readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+				if readdata ~= data then
+					print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+				end
+			end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		--Same as NROM
+		flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming PRG-ROM flash")
+
+end
+
+
+
 --Cart should be in reset state upon calling this function 
 --this function processes all user requests for this specific board/mapper
 local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile)
 
 	local rv = nil
 	local file 
-	local size = 128
+	local prg_size = 512
+	local chr_size = 0
+	local wram_size = 0
 
 --initialize device i/o for NES
 	dict.io("IO_RESET")
@@ -111,34 +265,37 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 --test cart by reading manf/prod ID
 	if test then
+		print("Testing ", mapname)
+
 		nes.detect_mapper_mirroring(true)
 		nes.ppu_ram_sense(0x1000, true)
 		print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))	
 
-		--need to set PRG-ROM A14 low when lower bank selected
-		init_mapper() 	--this may not succeed due to bus conflicts...
-		nes.read_flashID_prgrom_exp0(true)
+		prgrom_manf_id(true)
 	end
 
 --dump the cart to dumpfile
 	if read then
+		print("\nDumping PRG-ROM...")
 		file = assert(io.open(dumpfile, "wb"))
 
 		--TODO find bank table to avoid bus conflicts!
 		--dump cart into file
-		dump.dumptofile( file, size, "UxROM", "PRGROM", true )
+		--dump.dumptofile( file, prg_size, "UxROM", "PRGROM", true )
+		dump_prgrom(file, prg_size, false)
 
 		--close file
 		assert(file:close())
+		print("DONE Dumping PRG-ROM")
 	end
 
 
 --erase the cart
 	if erase then
 
-		init_mapper()
+		print("\nErasing", mapname);
 
-		print("\nerasing UxROM");
+		init_mapper()
 
 		print("erasing PRG-ROM");
 		dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
@@ -172,19 +329,11 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 
 		--find bank table in the rom
 		--write bank table to all banks of cartridge
-		--Nomolos' bank table is at $CC84 so hard code that for now
-		--wr_bank_table(0xCC84, 32)
-		--Owlia bank table
-		--wr_bank_table(0xE473, 32)
-		--rushnattack
-		--wr_bank_table(0x8000, 8)
-		--twindragons
-		--wr_bank_table(0xC000, 32)
-		--Armed for Battle
-		wr_bank_table(0xFD69, 8)
+		wr_bank_table(banktable_base, prg_size/16) --16KB per bank gives number of entries
 
 		--flash cart
-		flash.write_file( file, size, "UxROM", "PRGROM", true )
+		flash_prgrom(file, prg_size, false)
+
 		--close file
 		assert(file:close())
 
@@ -193,14 +342,17 @@ local function process( test, read, erase, program, verify, dumpfile, flashfile,
 --verify flashfile is on the cart
 	if verify then
 		--for now let's just dump the file and verify manually
+		print("\nPost dumping PRG-ROM")
 
 		file = assert(io.open(verifyfile, "wb"))
 
 		--dump cart into file
-		dump.dumptofile( file, size, "UxROM", "PRGROM", true )
+		dump_prgrom(file, prg_size, false)
 
 		--close file
 		assert(file:close())
+
+		print("DONE post dumping PRG-ROM")
 	end
 
 	dict.io("IO_RESET")
diff --git a/host/scripts/snes/v2proto_hirom.lua b/host/scripts/snes/v2proto_hirom.lua
new file mode 100644
index 0000000..815b6a9
--- /dev/null
+++ b/host/scripts/snes/v2proto_hirom.lua
@@ -0,0 +1,587 @@
+
+-- create the module's table
+local v2proto = {}
+
+-- import required modules
+local dict = require "scripts.app.dict"
+local dump = require "scripts.app.dump"
+local flash = require "scripts.app.flash"
+local snes = require "scripts.app.snes"
+local apperase = require "scripts.app.erase"
+
+-- file constants
+
+-- local functions
+
+
+-- Desc: attempt to read flash rom ID 
+-- Pre: snes_init() been called to setup i/o
+-- Post:Address left on bus memories disabled
+-- Rtn: true if proper flash ID found
+local function rom_manf_id( debug )
+
+	local rv
+	--enter software mode A11 is highest address bit that needs to be valid
+	--datasheet not exactly explicit, A11 might not need to be valid
+	--part has A-1 (negative 1) since it's in byte mode, meaning the part's A11 is actually A12
+	--WR $AAA:AA $555:55 $AAA:AA
+	dict.snes("SNES_SET_BANK", 0x00)
+
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0xAA)
+	dict.snes("SNES_ROM_WR", 0x8555, 0x55)
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0x90)
+
+	--read manf ID
+	local manf_id = dict.snes("SNES_ROM_RD", 0x8000) --0x01 Cypress Manf ID
+	if debug then print("attempted read SNES ROM manf ID:", string.format("%X", manf_id)) end
+
+	--read prod ID
+	local prod_id = dict.snes("SNES_ROM_RD", 0x8002) --0x7E Prod ID S29GL
+	if debug then print("attempted read SNES ROM prod ID:", string.format("%X", prod_id)) end
+
+	local density_id = dict.snes("SNES_ROM_RD", 0x801C) --density 0x10=8MB 0x1A=4MB
+	if debug then print("attempted read SNES density ID: ", string.format("%X", density_id)) end
+
+	local boot_sect = dict.snes("SNES_ROM_RD", 0x801E) --boot sector 0x00=top 0x01=bottom
+	if debug then print("attempted read SNES boot sect ID:", string.format("%X", boot_sect)) end
+
+	--exit software
+	dict.snes("SNES_ROM_WR", 0x8000, 0xF0)
+
+	--return true if detected flash chip
+	if (manf_id == 0x01 and prod_id == 0x49) then
+		print("2MB flash detected")
+		return true
+	elseif (manf_id == 0x01 and prod_id == 0x7E) then
+		print("4-8MB flash detected")
+		return true
+	else
+		return false
+	end
+
+end
+
+
+
+local function erase_flash( debug )
+
+	local rv = nil
+
+	print("\nErasing TSSOP flash takes about 30sec...");
+
+	--WR $AAA:AA $555:55 $AAA:AA
+	dict.snes("SNES_SET_BANK", 0x00)
+
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0xAA)
+	dict.snes("SNES_ROM_WR", 0x8555, 0x55)
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0x80)
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0xAA)
+	dict.snes("SNES_ROM_WR", 0x8555, 0x55)
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0x10)
+
+	rv = dict.snes("SNES_ROM_RD", 0x8000)
+
+	local i = 0
+
+	while ( rv ~= 0xFF ) do
+		rv = dict.snes("SNES_ROM_RD", 0x8000)
+		i = i + 1
+	--	if debug then print(" ", i,":", string.format("%x",rv)) end
+	end
+	print(i, "naks, done erasing snes.");
+
+	--reset flash
+	dict.snes("SNES_ROM_WR", 0x8000, 0xF0)
+end
+
+
+--dump the SNES ROM starting at the provided bank
+--/ROMSEL is always low for this dump
+local function dump_rom( file, start_bank, rom_size_KB, mapping, debug )
+
+	local KB_per_bank
+	local addr_base
+
+	if (mapping=="LOROM") then
+		KB_per_bank = 32	-- LOROM has 32KB per bank
+		addr_base = 0x80	-- $8000 LOROM
+	elseif (mapping=="HIROM") then
+		KB_per_bank = 64	-- LOROM has 32KB per bank
+		addr_base = 0x00	-- $8000 LOROM
+	else
+		print("ERROR!! mapping:", mapping, "not supported")
+	end
+
+	local num_reads = rom_size_KB / KB_per_bank
+	local read_count = 0
+
+	while ( read_count < num_reads ) do
+
+		if debug then print( "dump ROM part ", read_count, " of ", num_reads) end
+
+		if (read_count %8 == 0) then
+			print("dumping ROM bank: ", read_count, " of ", num_reads-1)
+		end
+
+		--select desired bank
+		dict.snes("SNES_SET_BANK", start_bank+read_count)
+
+		dump.dumptofile( file, KB_per_bank, addr_base, "SNESROM_PAGE", false )
+
+		read_count = read_count + 1
+	end
+
+end
+
+--dump the SNES RAM starting at the provided bank
+--this is currently only for lorom boards where /ROMSEL maps to RAM space
+local function dump_ram( file, start_bank, ram_size_KB, mapping, debug )
+
+	local KB_per_bank
+	local addr_base --A15-8 address of ram start
+
+	--determine max ram per bank and base address
+	if (mapping == "LOROM") then
+		KB_per_bank = 32	-- LOROM has 32KB per bank
+		addr_base = 0x00	-- $0000 LOROM RAM start address
+	elseif (mapping == "HIROM") then
+		KB_per_bank = 8		-- HIROM has 8KB per bank
+		addr_base = 0x60	-- $6000 HIROM RAM start address
+	else
+		print("ERROR! mapping:", mapping, "not supported by dump_ram")
+	end
+
+	local num_banks
+
+	--determine how much ram to read per bank
+	if (ram_size_KB < KB_per_bank) then
+		num_banks = 1
+		KB_per_bank = ram_size_KB
+	else
+		num_banks = ram_size_KB / KB_per_bank
+	end
+
+	local read_count = 0
+
+	while ( read_count < num_banks ) do
+
+		if debug then print( "dump ROM part ", read_count, " of ", num_banks) end
+
+		--select desired bank
+		dict.snes("SNES_SET_BANK", start_bank+read_count)
+
+		if (mapping == "LOROM") then --LOROM sram is inside /ROMSEL space
+			dump.dumptofile( file, KB_per_bank, addr_base, "SNESROM_PAGE", false )
+		else -- HIROM is outside of /ROMSEL space
+			dump.dumptofile( file, KB_per_bank, addr_base, "SNESSYS_PAGE", false )
+		end
+
+		read_count = read_count + 1
+	end
+
+end
+
+
+
+--write a single byte to SNES ROM flash
+--writes to currently selected bank address
+local function wr_flash_byte(addr, value, debug)
+
+	if (addr < 0x0000 or addr > 0xFFFF) then
+		print("\n  ERROR! flash write to SNES", string.format("$%X", addr), "must be $0000-FFFF \n\n")
+		return
+	end
+
+	--send unlock command and write byte
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0xAA)
+	dict.snes("SNES_ROM_WR", 0x8555, 0x55)
+	dict.snes("SNES_ROM_WR", 0x8AAA, 0xA0)
+	dict.snes("SNES_ROM_WR", addr, value)
+
+	local rv = dict.snes("SNES_ROM_RD", addr)
+
+	local i = 0
+
+	while ( rv ~= value ) do
+		rv = dict.snes("SNES_ROM_RD", addr)
+		i = i + 1
+	end
+	if debug then print(i, "naks, done writing byte.") end
+	if debug then print("written value:", string.format("%X",value), "verified value:", string.format("%X",rv)) end
+
+	--TODO handle timeout for problems
+
+	--TODO return pass/fail/info
+end
+
+
+--fast host flash one bank at a time...
+--this is controlled from the host side one bank at a time
+
+
+
+--- TODO TODO TODO!!!  need to specific first bank!!!!   Just like dumping!
+local function flash_rom(file, rom_size_KB, mapping, debug)
+
+	print("\nProgramming ROM flash")
+
+	--test some bytes
+--	dict.snes("SNES_SET_BANK", 0x00) wr_flash_byte(0x8000, 0xA5, true) wr_flash_byte(0xFFFF, 0x5A, true)
+--	dict.snes("SNES_SET_BANK", 0x01) wr_flash_byte(0x8000, 0x15, true) wr_flash_byte(0xFFFF, 0x1A, true)
+	--last of 512KB
+--	dict.snes("SNES_SET_BANK", 0x0F) wr_flash_byte(0x8000, 0xF5, true) wr_flash_byte(0xFFFF, 0xFA, true)
+
+	--most of this is overkill for NROM, but it's how we want to handle things for bigger mappers
+	local base_addr
+	local bank_size
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+
+	if (mapping=="LOROM") then
+		base_addr = 0x8000 --writes occur $8000-FFFF
+		bank_size = 32*1024 --SNES LOROM 32KB per ROM bank
+	elseif (mapping=="HIROM") then
+		base_addr = 0x0000 --writes occur $0000-FFFF
+		bank_size = 64*1024 --SNES HIROM 64KB per ROM bank
+	else
+		print("ERROR!! mapping:", mapping, "not supported")
+	end
+
+	local total_banks = rom_size_KB*1024/bank_size
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+	while cur_bank < total_banks do
+
+		if (cur_bank %4 == 0) then
+			print("writting ROM bank: ", cur_bank, " of ", total_banks-1)
+		end
+
+		--select the current bank
+		if (cur_bank <= 0xFF) then
+			dict.snes("SNES_SET_BANK", cur_bank)
+		else
+			print("\n\nERROR!!!!  SNES bank cannot exceed 0xFF, it was:", string.format("0x%X",cur_bank))
+			return
+		end
+
+		--program the entire bank's worth of data
+
+		--[[  This version of the code programs a single byte at a time but doesn't require 
+		--	board specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware specific functions 100% host flash algo:
+			--wr_flash_byte(base_addr+byte_num, data, false)   --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create firmware write byte function:
+			dict.snes("FLASH_WR_3V", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+
+			--if (verify) then
+			--	readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+			--	if readdata ~= data then
+			--		print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+			--	end
+			--end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		if (mapping == "LOROM") then
+			flash.write_file( file, bank_size/1024, "LOROM_3VOLT", "SNESROM", false )
+		else
+			flash.write_file( file, bank_size/1024, "HIROM_3VOLT", "SNESROM", false )
+		end
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming ROM flash")
+
+end
+
+
+
+local function wr_ram(file, first_bank, ram_size_KB, mapping, debug)
+
+	print("\nProgramming RAM")
+
+	--test some bytes
+--	dict.snes("SNES_SET_BANK", 0x00) wr_flash_byte(0x8000, 0xA5, true) wr_flash_byte(0xFFFF, 0x5A, true)
+--	dict.snes("SNES_SET_BANK", 0x01) wr_flash_byte(0x8000, 0x15, true) wr_flash_byte(0xFFFF, 0x1A, true)
+	--last of 512KB
+--	dict.snes("SNES_SET_BANK", 0x0F) wr_flash_byte(0x8000, 0xF5, true) wr_flash_byte(0xFFFF, 0xFA, true)
+
+	local base_addr 
+	local bank_size
+	local buff_size = 1      --number of bytes to write at a time
+	local cur_bank = 0
+	local total_banks
+
+	local byte_num --byte number gets reset for each bank
+	local byte_str, data, readdata
+
+
+	local addr_base --A15-8 address of ram start
+
+	--determine max ram per bank and base address
+	if (mapping == "LOROM") then
+		bank_size = 32*1024	-- LOROM has 32KB per bank
+		base_addr = 0x0000	-- $0000 LOROM RAM start address
+	elseif (mapping == "HIROM") then
+		bank_size = 8*1024	-- HIROM has 8KB per bank
+		base_addr = 0x6000	-- $6000 HIROM RAM start address
+	else
+		print("ERROR! mapping:", mapping, "not supported by dump_ram")
+	end
+
+	local num_banks
+
+	--determine how much ram to read per bank
+	if (ram_size_KB*1024 < bank_size) then
+		total_banks = 1
+		bank_size = ram_size_KB*1024
+	else
+		total_banks = ram_size_KB*1024 / bank_size
+	end
+
+	while cur_bank < total_banks do
+
+		print("writting RAM bank: ", cur_bank, " of ", total_banks-1)
+
+		--select the current bank
+		if (cur_bank <= 0xFF) then
+			dict.snes("SNES_SET_BANK", cur_bank+first_bank)
+		else
+			print("\n\nERROR!!!!  SNES bank cannot exceed 0xFF, it was:", string.format("0x%X",cur_bank))
+			return
+		end
+
+		--program the entire bank's worth of data
+
+		---[[  This version of the code programs a single byte at a time but doesn't require 
+		--	board specific functions in the firmware
+		print("This is slow as molasses, but gets the job done")
+		byte_num = 0  --current byte within the bank
+		while byte_num < bank_size do
+
+			--read next byte from the file and convert to binary
+			byte_str = file:read(buff_size)
+			data = string.unpack("B", byte_str, 1)
+
+			--write the data
+			--SLOWEST OPTION: no firmware specific functions 100% host flash algo:
+			--wr_flash_byte(base_addr+byte_num, data, false)   --0.7KBps
+			--EASIEST FIRMWARE SPEEDUP: 5x faster, create firmware write byte function:
+			--dict.snes("FLASH_WR_3V", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			if (mapping == "LOROM") then
+				dict.snes("SNES_ROM_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			else
+				dict.snes("SNES_SYS_WR", base_addr+byte_num, data)  --3.8KBps (5.5x faster than above)
+			end
+
+			--if (verify) then
+			--	readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
+			--	if readdata ~= data then
+			--		print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
+			--	end
+			--end
+
+			byte_num = byte_num + 1
+		end
+		--]]
+
+		--Have the device write a banks worth of data
+		--flash.write_file( file, bank_size/1024, "LOROM_3VOLT", "SNESROM", false )
+
+		cur_bank = cur_bank + 1
+	end
+
+	print("Done Programming ROM flash")
+
+end
+
+
+
+--Cart should be in reset state upon calling this function 
+--this function processes all user requests for this specific board/mapper
+local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile, dumpram, writeram, ramdumpfile, ramwritefile)
+
+	local rv = nil
+	local file 
+
+	local snes_mapping = "LOROM"
+	--local snes_mapping = "HIROM"
+
+	--local ram_size = 448 --max LOROM RAM size 32KByte * 0x70-0x7D banks
+	--local ram_size = 32 --just a single bank of LOROM RAM
+	--local ram_size = 8 --just a single bank of HIROM RAM
+	local ram_size = 2 --smallest SRAM cartridge RAM size (16kbit)
+
+	--local rom_size = 32
+	local rom_size = 512
+	--local rom_size = 1024
+	--local rom_size = 2048
+	--local rom_size = 4096
+	--local rom_size = 8192
+	--local rom_size = 12288
+	--local rom_size = 16384
+	
+
+	-- SNES memory map banking
+	-- A15 always high for LOROM (A22 is typically low too)
+	-- A22 always high for HIROM
+	-- A23 splits the map in half
+	-- A22 splits it in quarters (between what's typically low half and high half)
+	-- b 7  6  5  4 :  3  2  1  0
+	-- A23 22 21 20 : 19 18 17 16 
+	
+	local rombank --first bank of rom byte that contains A23-16
+	local rambank --first bank of ram
+	
+	if (snes_mapping == "LOROM") then
+		-- LOROM typically sees the upper half (A15=1) of the first address 0b0000:1000_0000
+		rombank = 0x00
+		rambank = 0x70 --LOROM maps from 0x70 to 0x7D
+				--some for lower half of bank only, some for both halfs...
+	elseif (snes_mapping == "HIROM") then
+		-- HIROM typically sees the last 4MByte as the first addresses = 0b1100:0000_0000
+		rombank = 0xC0
+		--rombank = 0x40 --second HiROM bank (slow)
+		rambank = 0x30
+	end
+
+
+--initialize device i/o for SNES
+	dict.io("IO_RESET")
+	dict.io("SNES_INIT")
+
+
+--test cart by reading manf/prod ID
+	if test then
+
+		print("Testing SNES board");
+
+		--SNES detect HiROM or LoROM & RAM
+
+		--SNES detect if able to read flash ID's
+		if not rom_manf_id(true) then
+			print("ERROR unable to read flash ID")
+			return
+		end
+	end
+
+
+--dump the ram to file 
+	if dumpram then
+
+		print("\nDumping SAVE RAM...")
+
+		--may have to verify /RESET is high to enable SRAM
+
+		file = assert(io.open(ramdumpfile, "wb"))
+
+		--dump cart into file
+		dump_ram(file, rambank, ram_size, snes_mapping, true)
+
+		--may disable SRAM by placing /RESET low
+
+		--close file
+		assert(file:close())
+
+		print("DONE Dumping SAVE RAM")
+	end
+
+--dump the cart to dumpfile
+	if read then
+		print("\nDumping SNES ROM...")
+
+		file = assert(io.open(dumpfile, "wb"))
+
+		--dump cart into file
+		dump_rom(file, rombank, rom_size, snes_mapping, false)
+
+		--close file
+		assert(file:close())
+		print("DONE Dumping SNES ROM")
+	end
+
+--erase the cart
+	if erase then
+
+		erase_flash()
+	end
+
+--write to wram on the cart
+	if writeram then
+
+		print("\nWritting to SAVE RAM...")
+
+		file = assert(io.open(ramwritefile, "rb"))
+
+		--flash.write_file( file, ram_size, "NOVAR", "PRGRAM", false )
+		--flash.write_file( file, ram_size, "LOROM_3VOLT", "SNESROM", false )
+		wr_ram(file, rambank, ram_size, snes_mapping, true)
+
+		--close file
+		assert(file:close())
+
+		print("DONE Writting SAVE RAM")
+	end
+
+
+--program flashfile to the cart
+	if program then
+
+		--open file
+		file = assert(io.open(flashfile, "rb"))
+		--determine if auto-doubling, deinterleaving, etc, 
+		--needs done to make board compatible with rom
+
+		--flash cart
+		flash_rom(file, rom_size, snes_mapping, true)
+
+		--close file
+		assert(file:close())
+
+	end
+
+--verify flashfile is on the cart
+	if verify then
+		print("\nPost dumping SNES ROM...")
+		--for now let's just dump the file and verify manually
+
+		file = assert(io.open(verifyfile, "wb"))
+
+		--dump cart into file
+		dump_rom(file, rombank, rom_size, snes_mapping, false)
+
+		--close file
+		assert(file:close())
+		print("DONE Post dumping SNES ROM")
+	end
+
+	dict.io("IO_RESET")
+end
+
+
+-- global variables so other modules can use them
+
+
+-- call functions desired to run when script is called/imported
+
+
+-- functions other modules are able to call
+v2proto.process = process
+
+-- return the module's table
+return v2proto
diff --git a/shared/shared_dict_buffer.h b/shared/shared_dict_buffer.h
index 414fd0b..a280974 100644
--- a/shared/shared_dict_buffer.h
+++ b/shared/shared_dict_buffer.h
@@ -112,13 +112,14 @@
 	// designate the address base with mapper since this read is mapper independent
 	#define NESCPU_4KB	0x20 	//mapper (bits 3-0) specifies A12-15 (4bits)
 	#define NESPPU_1KB	0x21	//mapper (bits 5-2) specifies A10-13 (4bits)
+	//DON'T WANT TO USE THESE ANY MORE, USE THE PAGE VERSIONS BELOW
 
 	//since the types above only specify the granularity of the read, there is no reason
 	//to limit it to 1-4KByte.  May as well give page granularity and use the whole mapper byte!
 	#define NESCPU_PAGE	0x22	//mapper byte specifies A15-8
 	#define NESPPU_PAGE	0x23	//mapper byte specifies A13-8	 bits 6 & 7 can't be set
-	#define SNESROM_PAGE	0x24	//mapper byte specifies A15-8
-	
+	#define SNESROM_PAGE	0x24	//mapper byte specifies A15-8 ROMSEL low
+	#define SNESSYS_PAGE	0x25	//mapper byte specifies A15-8 ROMSEL high
 
 	//operand LSB
 	//SST 39SF0x0 manf/prod IDs
diff --git a/shared/shared_dict_nes.h b/shared/shared_dict_nes.h
index bb0e6e1..488f13e 100644
--- a/shared/shared_dict_nes.h
+++ b/shared/shared_dict_nes.h
@@ -39,6 +39,7 @@
 
 //#define DISCRETE_EXP0_MAPPER_WR		0x03
 
+//write to an MMC1 register, provide bank/address & data
 #define NES_MMC1_WR			0x04
 
 #define NES_DUALPORT_WR			0x05
@@ -52,6 +53,11 @@
 #define NROM_CHR_FLASH_WR		0x0A
 #define CNROM_CHR_FLASH_WR		0x0B	//needs cur_bank & bank_table prior to calling
 #define CDREAM_CHR_FLASH_WR		0x0C	//needs cur_bank & bank_table prior to calling
+#define UNROM_PRG_FLASH_WR		0x0D	//needs cur_bank & bank_table prior to calling
+#define MMC1_PRG_FLASH_WR		0x0E
+#define MMC1_CHR_FLASH_WR		0x0F	//needs cur_bank set prior to calling
+#define MMC4_PRG_SOP_FLASH_WR		0x10	//current bank must be selected, & needs cur_bank set prior to calling
+#define MMC4_CHR_FLASH_WR		0x11	//needs cur_bank set prior to calling
 
 
 #define	SET_CUR_BANK			0x20
diff --git a/shared/shared_dict_snes.h b/shared/shared_dict_snes.h
index a789169..5548c7a 100644
--- a/shared/shared_dict_snes.h
+++ b/shared/shared_dict_snes.h
@@ -31,7 +31,9 @@
 #define FLASH_WR_5V			0x03	//5v PLCC flash algo
 #define FLASH_WR_3V			0x04	//3v TSSOP flash algo
 
-
+//similar to ROM RD/WR above, but /ROMSEL doesn't go low
+#define SNES_SYS_RD			0x05	//RL=3
+#define SNES_SYS_WR			0x06
 
 
 #endif