From 8d6707ef9fcf172461f78100a8de9696e3895037 Mon Sep 17 00:00:00 2001
From: Paul XPS <paul@infiniteneslives.com>
Date: Sun, 25 Nov 2018 22:30:04 -0600
Subject: [PATCH] fixing EXP definitions for STM_NES so it'll actually build
 for previous commit..

---
 firmware/source/pinport_al.h | 50 +++++++++++++++++++++++++-----------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/firmware/source/pinport_al.h b/firmware/source/pinport_al.h
index 1f7a063..fbfa047 100644
--- a/firmware/source/pinport_al.h
+++ b/firmware/source/pinport_al.h
@@ -1493,24 +1493,24 @@ void software_AXL_CLK();
 
 	//     PE0  "A0"	mcupinC0
 	//     			TODO!!!
-	#define E0bank 		//GPIOC 
-	#define E0		//(0U)
+	#define E0bank 		GPIOC 
+	#define E0		(0U)
 
-	//     PE1  "D0"	//mcupinB2
-	#define E1bank 		//GPIOB 
-	#define E1		//(2U)
+	//     PE1  "D0"	mcupinB2
+	#define E1bank 		GPIOB 
+	#define E1		(2U)
 
-	//     PE2  "D8"	//mcupinB10
-	#define E2bank 		//GPIOB 
-	#define E2		//(10U)
+	//     PE2  "D8"	mcupinB10
+	#define E2bank 		GPIOB 
+	#define E2		(10U)
 
-	//     PE3  "D9"	//mcupinB11
-	#define E3bank 		//GPIOB 
-	#define E3		//(11U)
+	//     PE3  "D9"	mcupinB11
+	#define E3bank 		GPIOB 
+	#define E3		(11U)
 
-	//     PE4  "D10"	//mcupinB12
-	#define E4bank 		//GPIOB 
-	#define E4		//(12U)
+	//     PE4  "D10"	mcupinB12
+	#define E4bank 		GPIOB 
+	#define E4		(12U)
 
 
 #endif
@@ -1577,7 +1577,8 @@ void software_AXL_CLK();
 
 #endif	//JTAG INL6
 
-#ifdef STM_CORE
+//#ifdef STM_CORE
+#if defined (STM_INL6_PROTO) || defined(STM_INL6)
 
 #define EXT_IP_PU(bank, pin)		bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR |=  (PUPDR_PU<<(pin*2))
 #define EXT_IP_FL(bank, pin)		bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR &= ~(PUPDR_PU<<(pin*2))
@@ -1596,6 +1597,25 @@ void software_AXL_CLK();
 
 #endif //STM_CORE
 
+
+#ifdef STM_NES			//TODO
+#define EXT_IP_PU(bank, pin)		//bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR |=  (PUPDR_PU<<(pin*2))
+#define EXT_IP_FL(bank, pin)		//bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR &= ~(PUPDR_PU<<(pin*2))
+#define EXT_OP(bank, pin)		//bank->MODER |=  (MODER_OP<<(pin*2))
+#define EXT_OD(bank, pin)		//bank->OTYPER |=  (OTYPER_OD<<(pin))	//open drain has no effect when pin is input
+#define EXT_PP(bank, pin)		//bank->OTYPER &= ~(OTYPER_OD<<(pin))
+#define EXT_SET_LO(bank, pin)		//bank->BRR = 1<<pin 
+#define EXT_SET_HI(bank, pin)		//bank->BSRR = 1<<pin
+#define EXT_RD(bank, pin, val)		//val = (bank->IDR & (1<<pin))
+	//NOTE: STM registers are 16bit "halfwords" so must provide a 16bit val
+	
+//each pin needs it's own enable macro
+#define EXT_A0_ENABLE()		//ADDR_EN_CLK()	//unnecessarily enables both GPIO banks for STM adapter, oh well
+#define EXT_D0_ENABLE()		//DATA_EN_CLK()
+#define EXT_D8_10_ENABLE()	//DATA_EN_CLK()	
+
+#endif
+
 #ifdef AVR_CORE
 
 #define EXT_IP_PU(bank, pin)		bank->DDR &= ~(1<<pin); bank->PORT |=  (1<<pin)