Detecting some flash carts including NROM and UNROM.
Using CHR-RAM sensing, and flash manf/prod ID based on PRG-ROM banking fixing bug in firmware for ppu writes was ANDing in /A13 instead of ORing.. adding datasheets to hardware folder for 5v PLCC and 3v TSOP flash used on all flash boards
This commit is contained in:
paul eeepc
parent
d97c31db62
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|
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|
:1011200019B114712F7752501FC0406409B12F7745
|
||||||
|
:101130000471D1F15F5F00C023C0406219B12F7705
|
||||||
|
:10114000147191F15F5F00C025C0047110275150E8
|
||||||
|
:1011500012F45D5F0000115027952C3F19B1C8F6BD
|
||||||
|
:1011600014710127015027952C3FC8F64227499357
|
||||||
|
:1011700009B1047110274F73115027952C3FA8F621
|
||||||
|
:101180004695469519B1147179F0012701502795BC
|
||||||
|
:101190002C3F98F66B5A60F3315009B1B0F600C09D
|
||||||
|
:1011A00011E01CBB002717C03B503195C31BD0403A
|
||||||
|
:1011B00011E01CBB0881033CF9F00B34E9F02091ED
|
||||||
|
:1011C0006A031981110F1213EDCF093651F10D3257
|
||||||
|
:1011D00011F0013E39F7009371033F915F914F91F8
|
||||||
|
:1011E0001F910F912F916F91CCB3C0FD67CFDF910D
|
||||||
|
:1011F000CF91CFBFCF91189520917103222369F32E
|
||||||
|
:1012000010916F03112339F534303AF130936F03A5
|
||||||
|
:1012100020936B0310916C033BE0311B30936C0304
|
||||||
|
:101220001CC000916F030130B4F40AE53091010154
|
||||||
|
:1012300034FD14C000930101CFE5D3E013C00527AE
|
||||||
|
:1012400010E000C000000BB91AC0052710E0221FF3
|
||||||
|
:101250001DC010E021C04AE502C032ED432FC4E1B9
|
||||||
|
:10126000D0E032E01AB114615C9A0BB11AB954E1C2
|
||||||
|
:1012700020E865E320FF05270BB9279517951C3F4C
|
||||||
|
:10128000F0F66695B8F7B1F720FF05270BB927955B
|
||||||
|
:1012900017951C3FD0F62795179517FF05270000D7
|
||||||
|
:1012A0001C3F0BB9B0F629913A9519F70B7E1091B6
|
||||||
|
:1012B0007003110FC651D0400BB911F010936A039F
|
||||||
|
:1012C00011E01CBB00611AB11B7E402F4B7E54E025
|
||||||
|
:1012D0005A95F1F70BB91AB94BB97FCF2EE088E1D7
|
||||||
|
:1012E00090E00FB6F894A895809360000FBE20930D
|
||||||
|
:1012F00060000E943A08549A80E0815041F0A8951D
|
||||||
|
:10130000EFE9FFE03197F1F700C00000F6CF549805
|
||||||
|
:101310000E9472037894A8950E9431070E94DA0215
|
||||||
|
:10132000FACFEE0FFF1F0590F491E02D0994F89489
|
||||||
|
:02133000FFCFED
|
||||||
|
:02133200FF5A60
|
||||||
:00000001FF
|
:00000001FF
|
||||||
|
|
|
||||||
Binary file not shown.
|
|
@ -26,6 +26,9 @@ uint8_t nes_opcode_24b_operand( uint8_t opcode, uint8_t addrH, uint8_t addrL, ui
|
||||||
case NES_PPU_WR:
|
case NES_PPU_WR:
|
||||||
nes_ppu_wr( addrH, addrL, data );
|
nes_ppu_wr( addrH, addrL, data );
|
||||||
break;
|
break;
|
||||||
|
case NES_CPU_WR:
|
||||||
|
nes_cpu_wr( addrH, addrL, data );
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
//macro doesn't exist
|
//macro doesn't exist
|
||||||
return ERR_UNKN_NES_OPCODE_24BOP;
|
return ERR_UNKN_NES_OPCODE_24BOP;
|
||||||
|
|
@ -94,7 +97,6 @@ void discrete_exp0_prgrom_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||||
_EXP0_LO(); //Tas = 0ns, Tah = 30ns
|
_EXP0_LO(); //Tas = 0ns, Tah = 30ns
|
||||||
_EXP0_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns
|
_EXP0_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns
|
||||||
//16Mhz avr clk = 62.5ns period guarantees timing reqts
|
//16Mhz avr clk = 62.5ns period guarantees timing reqts
|
||||||
//Need to check with scope to make sure EXP0 P/U effective
|
|
||||||
_DATA_IP();
|
_DATA_IP();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -216,7 +218,7 @@ uint8_t nes_cpu_rd( uint8_t addrH, uint8_t addrL )
|
||||||
void nes_cpu_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
void nes_cpu_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||||
{
|
{
|
||||||
//Float EXP0 as it should be in NES
|
//Float EXP0 as it should be in NES
|
||||||
_EXP0_LO();
|
_EXP0_FLT();
|
||||||
|
|
||||||
//need for whole function
|
//need for whole function
|
||||||
_DATA_OP();
|
_DATA_OP();
|
||||||
|
|
@ -265,13 +267,14 @@ uint8_t nes_ppu_rd( uint8_t addrH, uint8_t addrL )
|
||||||
{
|
{
|
||||||
uint8_t read; //return value
|
uint8_t read; //return value
|
||||||
|
|
||||||
//set address bus
|
|
||||||
ADDR_OUT = addrL;
|
|
||||||
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
||||||
_ADDRH_SET(addrH & PPU_A13N);
|
_ADDRH_SET(addrH | PPU_A13N);
|
||||||
} else { //above PPU $1FFF, A13 set, /A13 clear
|
} else { //above PPU $1FFF, A13 set, /A13 clear
|
||||||
_ADDRH_SET(addrH);
|
_ADDRH_SET(addrH);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//set address bus
|
||||||
|
ADDR_OUT = addrL;
|
||||||
|
|
||||||
//set CHR /RD and /WR
|
//set CHR /RD and /WR
|
||||||
_CSRD_LO();
|
_CSRD_LO();
|
||||||
|
|
@ -296,6 +299,7 @@ uint8_t nes_ppu_rd( uint8_t addrH, uint8_t addrL )
|
||||||
|
|
||||||
/* Desc:NES PPU Write
|
/* Desc:NES PPU Write
|
||||||
* decode A13 from addrH to set /A13 as expected
|
* decode A13 from addrH to set /A13 as expected
|
||||||
|
* flash: address clocked falling edge, data rising edge of /WE
|
||||||
* Pre: nes_init() setup of io pins
|
* Pre: nes_init() setup of io pins
|
||||||
* Post:data written to addrHL
|
* Post:data written to addrHL
|
||||||
* address left on bus
|
* address left on bus
|
||||||
|
|
@ -307,19 +311,22 @@ void nes_ppu_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||||
//will need output whole function
|
//will need output whole function
|
||||||
_DATA_OP();
|
_DATA_OP();
|
||||||
|
|
||||||
//set address bus
|
|
||||||
ADDR_OUT = addrL;
|
|
||||||
//addrH with PPU /A13
|
//addrH with PPU /A13
|
||||||
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
||||||
DATA_OUT = (addrH & PPU_A13N);
|
DATA_OUT = (addrH | PPU_A13N);
|
||||||
} else { //above PPU $1FFF, A13 set, /A13 clear
|
} else { //above PPU $1FFF, A13 set, /A13 clear
|
||||||
DATA_OUT = addrH;
|
DATA_OUT = addrH;
|
||||||
}
|
}
|
||||||
//latch addrH
|
//latch addrH
|
||||||
_AHL_CLK();
|
_AHL_CLK();
|
||||||
|
|
||||||
|
//set address bus
|
||||||
|
ADDR_OUT = addrL;
|
||||||
|
|
||||||
//put data on bus
|
//put data on bus
|
||||||
DATA_OUT = data;
|
DATA_OUT = data;
|
||||||
|
|
||||||
|
NOP();
|
||||||
|
|
||||||
//set CHR /RD and /WR
|
//set CHR /RD and /WR
|
||||||
//_CSRD_HI(); already done
|
//_CSRD_HI(); already done
|
||||||
|
|
|
||||||
Binary file not shown.
Binary file not shown.
|
|
@ -138,7 +138,7 @@ int detect_mirroring( cartridge *cart, USBtransfer *transfer )
|
||||||
//always start with resetting i/o
|
//always start with resetting i/o
|
||||||
io_reset( transfer );
|
io_reset( transfer );
|
||||||
|
|
||||||
if ( cart->console == NES_CART ) {
|
if ( (cart->console == NES_CART) || (cart->console == FC_CART) ) {
|
||||||
//For now just assume mirroring is fixed until start adding support for other mappers
|
//For now just assume mirroring is fixed until start adding support for other mappers
|
||||||
cart->mirroring = MIR_FIXED;
|
cart->mirroring = MIR_FIXED;
|
||||||
}
|
}
|
||||||
|
|
@ -156,24 +156,95 @@ int detect_mirroring( cartridge *cart, USBtransfer *transfer )
|
||||||
|
|
||||||
|
|
||||||
//detecting mapper and memories ends up being one big operation
|
//detecting mapper and memories ends up being one big operation
|
||||||
int detect_map_mem( cartridge *cart, USBtransfer *transfer )
|
int detect_map_mem( cartridge *cart, USBtransfer *transfer, int oper )
|
||||||
{
|
{
|
||||||
|
debug("detecting mapping");
|
||||||
//always start with resetting i/o
|
//always start with resetting i/o
|
||||||
io_reset( transfer );
|
io_reset( transfer );
|
||||||
|
|
||||||
if ( cart->console == NES_CART && cart->mirroring = MIR_FIXED ) {
|
|
||||||
//if INL-ROM discrete board with EXP0->PRG-ROM /WE
|
|
||||||
//EXP0 pullup test should pass
|
|
||||||
if( exp0_pullup_test(transfer) == SUCCESS ){
|
|
||||||
|
|
||||||
} else {
|
//Most ASIC mappers can be determined by their mirroring alone
|
||||||
//Potentially some other discrete board without EXP0->WE flash control
|
|
||||||
|
|
||||||
//Some ASIC mappers have fixed mirroring as well
|
//Discrete mappers are tricky as memory operations are needed
|
||||||
|
//If flashing can attempt to determine by reading flash manf/part
|
||||||
|
//If dumping have to rely on rom page checksums and register writes
|
||||||
|
//================
|
||||||
|
// NES & Famicom
|
||||||
|
//================
|
||||||
|
switch(cart->console) {
|
||||||
|
|
||||||
}
|
case FC_CART:
|
||||||
//for NROM flashing first verify EXP0 pull up will clock /WE properly
|
case NES_CART:
|
||||||
|
nes_init(transfer);
|
||||||
|
debug("NES cart mapping");
|
||||||
|
//gather other helpful info
|
||||||
|
|
||||||
|
//result of chr-ram test
|
||||||
|
if ( ppu_ram_sense( transfer, 0x0000 ) == SUCCESS ) {
|
||||||
|
debug("CHR-RAM detected @ PPU $0000");
|
||||||
|
cart->sec_rom->manf = SRAM;
|
||||||
|
cart->sec_rom->part = SRAM;
|
||||||
|
} else
|
||||||
|
//check for CHR-ROM flash
|
||||||
|
if ( read_flashID_chrrom_8K( transfer, cart->sec_rom ) == SUCCESS ) {
|
||||||
|
//8KB bank with no banking operations
|
||||||
|
debug("8K CHR-ROM flash detected");
|
||||||
|
cart->sec_rom->size = 8 * KBYTE;
|
||||||
|
}
|
||||||
|
|
||||||
|
//perform WRAM test without corrupting results
|
||||||
|
//TODO store result in save_mem
|
||||||
|
|
||||||
|
//exp0 pullup test passes on many INL boards
|
||||||
|
if ( exp0_pullup_test(transfer) == SUCCESS) {
|
||||||
|
debug("EXP0 pullup cart mapping");
|
||||||
|
//if passed exp0 test try 16/32KB bank flash check
|
||||||
|
|
||||||
|
//if 16KB banks writing 0xFF to mapper reg should set A14 bit
|
||||||
|
//That will cause flash detection to fail.
|
||||||
|
//TODO handle bus conflicts...?
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_CPU_WR, 0x8000, 0xFF,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
//if ID check passes, the should be 32KB PRG-ROM banking
|
||||||
|
if ( read_flashID_prgrom_exp0( transfer, cart->pri_rom ) == SUCCESS ) {
|
||||||
|
//32KB bank with EXP0->WE PRG-ROM sensed
|
||||||
|
debug("32KB banking NES EXP0 enabled flash");
|
||||||
|
cart->pri_rom->bank_size = 32 * KBYTE;
|
||||||
|
} else {
|
||||||
|
//set mapper reg to 0 if present which sets A14 low when needed if 16KB banks
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_CPU_WR, 0x8000, 0x00,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
if ( read_flashID_prgrom_exp0( transfer, cart->pri_rom ) == SUCCESS ){
|
||||||
|
//16KB bank with EXP0->WE PRG-ROM sensed
|
||||||
|
debug("16KB banking NES EXP0 enabled flash");
|
||||||
|
cart->pri_rom->bank_size = 16 * KBYTE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
//TODO determine how many banks are present
|
||||||
|
//best to do this by writing last bank, then see if
|
||||||
|
//blank banks can be found
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (cart->mirroring) {
|
||||||
|
case MIR_MMC1:
|
||||||
|
break;
|
||||||
|
case MIR_MMC3:
|
||||||
|
break;
|
||||||
|
case MIR_FIXED:
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
sentinel("Problem with mapper detect mirroring switch statement.");
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
//================
|
||||||
|
// SNES
|
||||||
|
//================
|
||||||
|
case SNES_CART:
|
||||||
|
snes_init(transfer);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
sentinel("This console not supported by detect_map_mem function.");
|
||||||
}
|
}
|
||||||
|
|
||||||
//always end with resetting i/o
|
//always end with resetting i/o
|
||||||
|
|
@ -181,8 +252,8 @@ int detect_map_mem( cartridge *cart, USBtransfer *transfer )
|
||||||
|
|
||||||
return SUCCESS;
|
return SUCCESS;
|
||||||
|
|
||||||
//error:
|
error:
|
||||||
//always end with resetting i/o
|
//always end with resetting i/o
|
||||||
//io_reset( transfer );
|
io_reset( transfer );
|
||||||
// return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -46,6 +46,7 @@ typedef struct cartridge{
|
||||||
int init_cart_elements( cartridge *cart );
|
int init_cart_elements( cartridge *cart );
|
||||||
int detect_console( cartridge *cart, USBtransfer *transfer );
|
int detect_console( cartridge *cart, USBtransfer *transfer );
|
||||||
int detect_mirroring( cartridge *cart, USBtransfer *transfer );
|
int detect_mirroring( cartridge *cart, USBtransfer *transfer );
|
||||||
|
int detect_map_mem( cartridge *cart, USBtransfer *transfer, int oper );
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -4,6 +4,8 @@ int erase_nes( USBtransfer *transfer )
|
||||||
{
|
{
|
||||||
//uint8_t rv[8];
|
//uint8_t rv[8];
|
||||||
//int i = 0;
|
//int i = 0;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
debug("erasing_nrom");
|
debug("erasing_nrom");
|
||||||
|
|
||||||
|
|
@ -92,6 +94,6 @@ int erase_nes( USBtransfer *transfer )
|
||||||
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
error:
|
//error:
|
||||||
return -1;
|
// return -1;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -147,7 +147,7 @@ int main(int argc, char *argv[])
|
||||||
//Also don't want to continue if conflicting args are being used
|
//Also don't want to continue if conflicting args are being used
|
||||||
|
|
||||||
//flags about input files only used for writes
|
//flags about input files only used for writes
|
||||||
if ( p_flag || i_value || C_value || P_value || S_value || W_value ) {
|
if ( p_value || i_flag || C_value || P_value || S_value || W_value ) {
|
||||||
check( d_value == NULL, "input args conflict can't program and dump in same operation.");
|
check( d_value == NULL, "input args conflict can't program and dump in same operation.");
|
||||||
operation = WRITE;
|
operation = WRITE;
|
||||||
}
|
}
|
||||||
|
|
@ -222,7 +222,7 @@ int main(int argc, char *argv[])
|
||||||
//By this point we know a lot about the cartridge but for things like NES discrete
|
//By this point we know a lot about the cartridge but for things like NES discrete
|
||||||
//mappers we'll have to play around with the memory to determine exact mapper
|
//mappers we'll have to play around with the memory to determine exact mapper
|
||||||
//detect board manufacturer/flash memories as much as possible
|
//detect board manufacturer/flash memories as much as possible
|
||||||
check(!detect_map_mem( cart, transfer ), "Problem detecting cart map & memory.");
|
check(!detect_map_mem( cart, transfer, operation ), "Problem detecting cart map & memory.");
|
||||||
|
|
||||||
//detect rom sizes as much as possible
|
//detect rom sizes as much as possible
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -6,7 +6,7 @@ void init_memory_elements( memory *mem )
|
||||||
mem->part = UNKNOWN;
|
mem->part = UNKNOWN;
|
||||||
mem->volatility = UNKNOWN;
|
mem->volatility = UNKNOWN;
|
||||||
mem->size = UNKNOWN;
|
mem->size = UNKNOWN;
|
||||||
mem->addr_size = UNKNOWN;
|
mem->bank_size = UNKNOWN;
|
||||||
mem->width = UNKNOWN;
|
mem->width = UNKNOWN;
|
||||||
mem->protocol = UNKNOWN;
|
mem->protocol = UNKNOWN;
|
||||||
mem->sector_size = UNKNOWN;
|
mem->sector_size = UNKNOWN;
|
||||||
|
|
|
||||||
|
|
@ -20,14 +20,25 @@
|
||||||
#include "dictionary.h"
|
#include "dictionary.h"
|
||||||
#include "enums.h"
|
#include "enums.h"
|
||||||
|
|
||||||
|
//SST 39SF0x0 manf/prod IDs
|
||||||
|
#define SST_MANF_ID 0xBF
|
||||||
|
#define SST_PROD_128 0xB5
|
||||||
|
#define SST_PROD_256 0xB6
|
||||||
|
#define SST_PROD_512 0xB7
|
||||||
|
|
||||||
|
//SRAM manf/prod ID
|
||||||
|
#define SRAM 0xAA
|
||||||
|
|
||||||
|
//KByte for easy math
|
||||||
|
#define KBYTE 1024
|
||||||
|
|
||||||
//memory object/struct
|
//memory object/struct
|
||||||
typedef struct memory{
|
typedef struct memory{
|
||||||
int manf;
|
int manf;
|
||||||
int part;
|
int part;
|
||||||
int volatility; //sram no batt vs batt, mask rom, erasability, etc
|
int volatility; //sram no batt vs batt, mask rom, erasability, etc
|
||||||
int size; //size of the actual memory excluding grounded address pins etc
|
int size; //size of the max addressable memory grounding addr pins lowers this value
|
||||||
int addr_size; //addressable size of the memory including grounded address pins etc
|
int bank_size; //size of banks/pages of memory created by mapper banking
|
||||||
int width; //width of data bus as configured
|
int width; //width of data bus as configured
|
||||||
int protocol; //parallel, SPI, I2C, JTAG, custom etc.
|
int protocol; //parallel, SPI, I2C, JTAG, custom etc.
|
||||||
int sector_size; //minimum eraseable size in bytes
|
int sector_size; //minimum eraseable size in bytes
|
||||||
|
|
|
||||||
|
|
@ -168,3 +168,165 @@ int famicom_sound( USBtransfer *transfer )
|
||||||
return ~FALSE;
|
return ~FALSE;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Desc:PRG-ROM flash manf/prod ID sense test
|
||||||
|
* Using EXP0 /WE writes
|
||||||
|
* Only senses SST flash ID's
|
||||||
|
* Assumes that isn't getting tricked by having manf/prodID at $8000/8001
|
||||||
|
* could add check and increment read address to ensure doesn't get tricked..
|
||||||
|
* Pre: nes_init() been called to setup i/o
|
||||||
|
* exp0 pullup test must pass
|
||||||
|
* if ROM A14 is mapper controlled it must be low when CPU A14 is low
|
||||||
|
* controlling A14 outside of this function acts as a means of bank size detection
|
||||||
|
* Post:memory manf/prod ID set to read values if passed
|
||||||
|
* Software mode exited if entered successfully
|
||||||
|
* Rtn: SUCCESS if flash sensed, GEN_FAIL if not, neg if error
|
||||||
|
*/
|
||||||
|
int read_flashID_prgrom_exp0( USBtransfer *transfer, memory *flash ) {
|
||||||
|
|
||||||
|
uint8_t rv[RV_DATA0_IDX];
|
||||||
|
|
||||||
|
//enter software mode
|
||||||
|
//ROMSEL controls PRG-ROM /OE which needs to be low for flash writes
|
||||||
|
//So unlock commands need to be addressed below $8000
|
||||||
|
//DISCRETE_EXP0_PRGROM_WR doesn't toggle /ROMSEL by definition though, so A15 is unused
|
||||||
|
// 15 14 13 12
|
||||||
|
// 0x5 = 0b 0 1 0 1 -> $5555
|
||||||
|
// 0x2 = 0b 0 0 1 0 -> $2AAA
|
||||||
|
dictionary_call( transfer, DICT_NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
dictionary_call( transfer, DICT_NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
dictionary_call( transfer, DICT_NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0x90,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
//read manf ID
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_CPU_RD, 0x8000, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("manf id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( rv[RV_DATA0_IDX] != SST_MANF_ID ) {
|
||||||
|
return GEN_FAIL;
|
||||||
|
//no need for software exit since failed to enter
|
||||||
|
}
|
||||||
|
|
||||||
|
//read prod ID
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_CPU_RD, 0x8001, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("prod id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( (rv[RV_DATA0_IDX] == SST_PROD_128)
|
||||||
|
|| (rv[RV_DATA0_IDX] == SST_PROD_256)
|
||||||
|
|| (rv[RV_DATA0_IDX] == SST_PROD_512) ) {
|
||||||
|
//found expected manf and prod ID
|
||||||
|
flash->manf = SST_MANF_ID;
|
||||||
|
flash->part = rv[RV_DATA0_IDX];
|
||||||
|
}
|
||||||
|
|
||||||
|
//exit software
|
||||||
|
dictionary_call( transfer, DICT_NES, DISCRETE_EXP0_PRGROM_WR, 0x8000, 0xF0,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
|
||||||
|
//verify exited
|
||||||
|
//dictionary_call( transfer, DICT_NES, NES_CPU_RD, 0x8000, NILL,
|
||||||
|
// USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
//debug("prod id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Desc:CHR-ROM flash manf/prod ID sense test
|
||||||
|
* Only senses SST flash ID's
|
||||||
|
* Does not make CHR bank writes so A14-A13 must be made valid outside of this funciton
|
||||||
|
* An NROM board does this by tieing A14:13 to A12:11
|
||||||
|
* Other mappers will pass this function if PT0 has A14:13=01, PT1 has A14:13=10
|
||||||
|
* Assumes that isn't getting tricked by having manf/prodID at $0000/0001
|
||||||
|
* could add check and increment read address to ensure doesn't get tricked..
|
||||||
|
* Pre: nes_init() been called to setup i/o
|
||||||
|
* Post:memory manf/prod ID set to read values if passed
|
||||||
|
* Software mode exited if entered successfully
|
||||||
|
* Rtn: SUCCESS if flash sensed, GEN_FAIL if not, neg if error
|
||||||
|
*/
|
||||||
|
int read_flashID_chrrom_8K( USBtransfer *transfer, memory *flash ) {
|
||||||
|
|
||||||
|
uint8_t rv[RV_DATA0_IDX];
|
||||||
|
|
||||||
|
//enter software mode
|
||||||
|
//NROM has A13 tied to A11, and A14 tied to A12.
|
||||||
|
//So only A0-12 needs to be valid
|
||||||
|
//A13 needs to be low to address CHR-ROM
|
||||||
|
// 15 14 13 12
|
||||||
|
// 0x5 = 0b 0 1 0 1 -> $1555
|
||||||
|
// 0x2 = 0b 0 0 1 0 -> $0AAA
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, 0x1555, 0xAA,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, 0x0AAA, 0x55,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, 0x1555, 0x90,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
//read manf ID
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_RD, 0x0000, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("manf id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( rv[RV_DATA0_IDX] != SST_MANF_ID ) {
|
||||||
|
return GEN_FAIL;
|
||||||
|
//no need for software exit since failed to enter
|
||||||
|
}
|
||||||
|
|
||||||
|
//read prod ID
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_RD, 0x0001, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("prod id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( (rv[RV_DATA0_IDX] == SST_PROD_128)
|
||||||
|
|| (rv[RV_DATA0_IDX] == SST_PROD_256)
|
||||||
|
|| (rv[RV_DATA0_IDX] == SST_PROD_512) ) {
|
||||||
|
//found expected manf and prod ID
|
||||||
|
flash->manf = SST_MANF_ID;
|
||||||
|
flash->part = rv[RV_DATA0_IDX];
|
||||||
|
}
|
||||||
|
|
||||||
|
//exit software
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, 0x0000, 0xF0,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
|
||||||
|
//verify exited
|
||||||
|
//dictionary_call( transfer, DICT_NES, NES_PPU_RD, 0x0000, NILL,
|
||||||
|
// USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
//debug("prod id: %x", rv[RV_DATA0_IDX]);
|
||||||
|
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Desc:Simple CHR-RAM sense test
|
||||||
|
* A more thourough test should be implemented in firmware
|
||||||
|
* This one simply tests one address in PPU address space
|
||||||
|
* Pre: nes_init() been called to setup i/o
|
||||||
|
* Post:
|
||||||
|
* Rtn: SUCCESS if ram sensed, GEN_FAIL if not, neg if error
|
||||||
|
*/
|
||||||
|
int ppu_ram_sense( USBtransfer *transfer, uint16_t addr ) {
|
||||||
|
|
||||||
|
uint8_t rv[RV_DATA0_IDX];
|
||||||
|
|
||||||
|
//write 0xAA to addr
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, addr, 0xAA,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
//try to read it back
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_RD, addr, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("reading back 0xAA: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( rv[RV_DATA0_IDX] != 0xAA ) {
|
||||||
|
return GEN_FAIL;
|
||||||
|
}
|
||||||
|
|
||||||
|
//write 0x55 to addr
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_WR, addr, 0x55,
|
||||||
|
USB_IN, NULL, 1);
|
||||||
|
//try to read it back
|
||||||
|
dictionary_call( transfer, DICT_NES, NES_PPU_RD, addr, NILL,
|
||||||
|
USB_IN, rv, RV_DATA0_IDX+1);
|
||||||
|
debug("reading back 0x55: %x", rv[RV_DATA0_IDX]);
|
||||||
|
if ( rv[RV_DATA0_IDX] != 0x55 ) {
|
||||||
|
return GEN_FAIL;
|
||||||
|
}
|
||||||
|
|
||||||
|
return SUCCESS;
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -9,18 +9,22 @@
|
||||||
//include prior to other file includes
|
//include prior to other file includes
|
||||||
//that way DEBUG can be turned on/off for this file alone
|
//that way DEBUG can be turned on/off for this file alone
|
||||||
//uncomment to DEBUG this file alone
|
//uncomment to DEBUG this file alone
|
||||||
//#define DEBUG
|
#define DEBUG
|
||||||
//"make debug" to get DEBUG msgs on entire program
|
//"make debug" to get DEBUG msgs on entire program
|
||||||
#include "dbg.h"
|
#include "dbg.h"
|
||||||
|
|
||||||
#include "shared_errors.h"
|
#include "shared_errors.h"
|
||||||
#include "shared_dictionaries.h"
|
#include "shared_dictionaries.h"
|
||||||
#include "dictionary.h"
|
#include "dictionary.h"
|
||||||
|
#include "memory.h"
|
||||||
|
|
||||||
#include "pindef.h"
|
#include "pindef.h"
|
||||||
|
|
||||||
int jumper_ciramce_ppuA13n( USBtransfer *transfer );
|
int jumper_ciramce_ppuA13n( USBtransfer *transfer );
|
||||||
int ciramce_inv_ppuA13( USBtransfer *transfer );
|
int ciramce_inv_ppuA13( USBtransfer *transfer );
|
||||||
int famicom_sound( USBtransfer *transfer );
|
int famicom_sound( USBtransfer *transfer );
|
||||||
|
int read_flashID_prgrom_exp0( USBtransfer *transfer, memory *flash );
|
||||||
|
int read_flashID_chrrom_8K( USBtransfer *transfer, memory *flash );
|
||||||
|
int ppu_ram_sense( USBtransfer *transfer, uint16_t addr );
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue