SNES dictionary creation, addition of NES cpu/ppu read/writes
cleaned up firmware pinport.h used PURPLE/GREEN KAZZO for all #ifdef's AVR Memory Usage ---------------- Device: atmega164a Program: 3404 bytes (20.8% Full) (.text + .data + .bootloader) Data: 53 bytes (5.2% Full) (.data + .bss + .noinit) final kazzo design hex commited as comparable build to the past two commits of green/purple. So this .hex commit is apples to apples with recently commited purple/green .hex commits.
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||||
:100450007FC08FEF88B97CC038987AC0389A78C04E
|
||||
:10046000409876C0409A74C0399872C0399A70C06A
|
||||
:1004700041986EC0419A6CC03A986AC03A9A68C076
|
||||
:10048000429866C0429A64C03B9862C03B9A60C082
|
||||
:1004900043985EC0439A5CC03C985AC03C9A58C08E
|
||||
:1004A000449856C0449A54C03D9852C03D9A50C09A
|
||||
:1004B00045984EC0459A4CC03E984AC03E9A48C0A6
|
||||
:1004C000469846C0469A44C03F9842C03F9A40C0B2
|
||||
:1004D000479A3EC08AB184718AB93AC08BB184719F
|
||||
:1004E00002C08BB18B6E8BB933C0509831C0589815
|
||||
:1004F000509A2EC05098589A2BC05098589828C09F
|
||||
:10050000519826C0519A24C0599822C0599A20C0A7
|
||||
:1005100053981EC0539A1CC05B981AC05B9A18C0AF
|
||||
:10052000559816C0559A14C05D9812C05D9A10C0B7
|
||||
:1005300056980EC0569A0CC05E980AC05E9A08C0C3
|
||||
:10054000579806C0579A04C05F9A02C05F9A5F9896
|
||||
:1005500080E00895479A4798FBCF8CE8089590E093
|
||||
:10056000FC01E058F109EB30F105A0F5E756FF4F2B
|
||||
:100570000C949D0662B922C08FEF84B965B91EC084
|
||||
:100580008FEF84B965B9479A479805C08FEF84B952
|
||||
:1005900065B95F9A5F9814B811C061B90FC064B9AA
|
||||
:1005A0000DC067B90BC09AB1862F846189238AB9BF
|
||||
:1005B0008AB16B7E682B6AB901C068B980E0089582
|
||||
:1005C0009BB1862F846189238BB98BB16B7E682B9D
|
||||
:1005D0006BB9F4CF8DE80895813A61F0823AB9F0B1
|
||||
:1005E000803A11F58FEF84B965B9479A479814B8E6
|
||||
:1005F00042B916C08FEF84B965B9479A479814B8C5
|
||||
:1006000042B967FF02C041980BC0419A09C042B984
|
||||
:100610008FEF84B9603230F415B8479A479814B810
|
||||
:1006200080E0089565B9F9CF8EE80895803B61F4C4
|
||||
:1006300022B98FEF84B945B9479A479865B95F9A4F
|
||||
:100640005F9814B880E008958FE80895CF93DF9302
|
||||
:10065000EB0190E0805C91098C309105F8F48C55A9
|
||||
:100660009F4FFC010C949D0680B113C083B111C053
|
||||
:1006700086B10FC089B10DC082B10BC085B109C070
|
||||
:1006800088B107C08BB105C081B103C084B101C07E
|
||||
:1006900087B1888380E003C08AB1FBCF80E9DF9116
|
||||
:1006A000CF9108950F93811102C0589A01C05898B4
|
||||
:1006B0008FEF84B922B945B9479A479805B96111B6
|
||||
:1006C00001C04198459800000000459A419A14B82D
|
||||
:1006D00058980F9108950F93022F813061F030F0F8
|
||||
:1006E000823089F4242F462F6FEF08C0242F462F25
|
||||
:1006F00060E081E004C0242F462F60E080E00E948B
|
||||
:10070000520380E001C08AEA0F9108950F9381118E
|
||||
:1007100002C0589A01C058988FEF84B902B925B920
|
||||
:10072000479A479845B95F9A5F9814B8611101C01C
|
||||
:1007300041984498000000000000000083B1449AF2
|
||||
:10074000419A58980F9108950F931F93CF93DF9379
|
||||
:10075000E801813851F0823891F08038A9F4022FF5
|
||||
:10076000242F462F60E081E005C0022F242F462F62
|
||||
:1007700060E080E00E948603888380E006C0022F4C
|
||||
:10078000242F462F6FEFF5CF8BEADF91CF911F918A
|
||||
:100790000F9108950F931F93CF93FC01C081CC1F3D
|
||||
:1007A000CC27CC1F8181823049F118F4813031F09F
|
||||
:1007B00056C0833039F18430A9F151C08281803B29
|
||||
:1007C00038F4803A88F4803858F40E94070248C010
|
||||
:1007D000803C78F42481458163810E94160340C0E7
|
||||
:1007E00064810E94AF023CC0448165810E94EC029A
|
||||
:1007F00037C063E071E00E9426032DC082810E9411
|
||||
:1008000057012EC08281803830F423814481658174
|
||||
:100810000E94F60125C023E031E0448165810E94F9
|
||||
:10082000CB0119C02281638144817581822F90E0C0
|
||||
:10083000203840F4262F30E050E0672F70E00E940F
|
||||
:100840006B030EC0242F30E0472F50E070E003E030
|
||||
:1008500011E00E94A40380930201CF5F03C080E8EF
|
||||
:100860008093020182E091E090931A018093190134
|
||||
:100870008C2FCF911F910F91089581E00895CF9310
|
||||
:10088000DF9360911B01635067FDA4C08091180144
|
||||
:10089000CCE0D0E0C81BD109C15EDE4F80911701CA
|
||||
:1008A0008D3209F085C0683009F092C083EC8093E6
|
||||
:1008B0000B018AE58093010110920A0188818076FC
|
||||
:1008C00021F0CE010E94CA0360C08A8110921401F7
|
||||
:1008D0009981911106C01092150124E131E082E066
|
||||
:1008E00050C0953019F480931C013DC09630A9F595
|
||||
:1008F0009B81913019F482E791E004C0923041F479
|
||||
:1009000080E691E090931A018093190182E121C061
|
||||
:100910009330F1F4811108C08CEC91E090931A01AE
|
||||
:100920008093190184E015C0813041F482EA91E09E
|
||||
:1009300090931A01809319018AE20BC0823041F42E
|
||||
:1009400084E891E090931A01809319018EE101C02F
|
||||
:1009500080E090E490930A0118C0983079F09930C3
|
||||
:1009600031F480931E0124E131E080E00AC081E08F
|
||||
:100970009A3009F080E024E131E003C02EE131E05B
|
||||
:1009800081E030931A01209319018F3F39F4988147
|
||||
:1009900097FD8E8190E890930A0107C09F81911185
|
||||
:1009A00004C09E81981708F4892F8093000110C01D
|
||||
:1009B00080910A0187FF0CC0CE010E943D048F3F49
|
||||
:1009C00021F48EE18093010103C081111092000196
|
||||
:1009D00010921B018091010184FF4DC080910001A4
|
||||
:1009E0008F3F09F448C0C82F893008F0C8E08C1B3D
|
||||
:1009F0008093000180910B0198E8892780930B0177
|
||||
:100A0000CC2361F18091190190911A0120910A0182
|
||||
:100A100026FF12C0ACE0B1E02BE031E0209530952C
|
||||
:100A2000280F391F4C2F4A0FF901EA0FFB1FE491E1
|
||||
:100A3000ED934A13F9CF09C0ECE0F1E0DC012C2F73
|
||||
:100A40002E0F3D9131932E13FCCF01962FEF2C0FDB
|
||||
:100A5000820F911D90931A01809319016C2F8CE0E5
|
||||
:100A600091E00E946405CC5FCC3019F08FEF809349
|
||||
:100A70000001C093010184E199B1947131F4815076
|
||||
:100A8000D9F710921C0110921601DF91CF910895B1
|
||||
:100A9000E9E6F0E0808182608083E89A0895A82FDB
|
||||
:100AA000B92F80E090E041E050EA609530E009C065
|
||||
:100AB0002D9182279795879510F084279527305E92
|
||||
:100AC000C8F36F5FA8F30895EADF8D939D930895AF
|
||||
:100AD000CF93CFB7CF93DF93C3954C9BE9F74C9B54
|
||||
:100AE0000BC04C9B09C04C9B07C04C9B05C04C9B4A
|
||||
:100AF00003C04C9B01C089C06F93C0911801DD27D2
|
||||
:100B0000C15EDE4F2F9365E54C9B03C02F916F9123
|
||||
:100B1000E6CF0F931F934F9320E040E15F9309B11D
|
||||
:100B2000047104FB27F93F9350E03BE039C0147196
|
||||
:100B300040642F77012F5F5F1EC0406819B11471A8
|
||||
:100B40002F7752501FC0406409B12F770471D1F143
|
||||
:100B50005F5F00C023C0406219B12F77147191F11B
|
||||
:100B60005F5F00C025C004711027515012F45D5F13
|
||||
:100B70000000115027952C3F19B1C8F614710127B8
|
||||
:100B8000015027952C3FC8F64227499309B10471BB
|
||||
:100B900010274F73115027952C3FA8F64695469580
|
||||
:100BA00019B1147179F00127015027952C3F98F65F
|
||||
:100BB0006B5A60F3315009B1B0F600C011E01CBBB4
|
||||
:100BC000002717C03B503195C31BD04011E01CBB20
|
||||
:100BD0000881033CF9F00B34E9F0209116011981EA
|
||||
:100BE000110F1213EDCF093651F10D3211F0013E04
|
||||
:100BF00039F700931D013F915F914F911F910F9124
|
||||
:100C00002F916F91CCB3C0FD67CFDF91CF91CFBF54
|
||||
:100C1000CF91189520911D01222369F310911B019A
|
||||
:100C2000112339F534303AF130931B012093170129
|
||||
:100C3000109118013BE0311B309318011CC000914A
|
||||
:100C40001B010130B4F40AE53091010134FD14C0F8
|
||||
:100C500000930101CBE0D1E013C0052710E000C0F4
|
||||
:100C600000000BB91AC0052710E0221F1DC010E0BC
|
||||
:100C700021C04AE502C032ED432FC4E1D0E032E0AA
|
||||
:100C80001AB114615C9A0BB11AB954E120E865E31A
|
||||
:100C900020FF05270BB9279517951C3FF0F66695A1
|
||||
:100CA000B8F7B1F720FF05270BB9279517951C3F1B
|
||||
:100CB000D0F62795179517FF052700001C3F0BB9A5
|
||||
:100CC000B0F629913A9519F70B7E10911C01110F7E
|
||||
:100CD000C651D0400BB911F01093160111E01CBBA6
|
||||
:100CE00000611AB11B7E402F4B7E54E05A95F1F7FC
|
||||
:100CF0000BB91AB94BB97FCF2EE088E190E00FB65F
|
||||
:100D0000F894A895809360000FBE209360000E9425
|
||||
:100D10004805549A80E0815041F0A895EFE9FFE042
|
||||
:100D20003197F1F700C00000F6CF54980E940701F8
|
||||
:100D30007894A8950E943F04FCCFEE0FFF1F05900A
|
||||
:0A0D4000F491E02D0994F894FFCF20
|
||||
:020D4A00FF5A4E
|
||||
:00000001FF
|
||||
|
|
|
|||
|
|
@ -8,4 +8,7 @@
|
|||
#define IP 0x00
|
||||
#define OP 0xFF
|
||||
|
||||
#define TRUE 0x00
|
||||
//false is anything besides TRUE
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -23,6 +23,9 @@ uint8_t nes_opcode_24b_operand( uint8_t opcode, uint8_t addrH, uint8_t addrL, ui
|
|||
case DISCRETE_EXP0_PRGROM_WR:
|
||||
discrete_exp0_prgrom_wr( addrH, addrL, data );
|
||||
break;
|
||||
case NES_PPU_WR:
|
||||
nes_ppu_wr( addrH, addrL, data );
|
||||
break;
|
||||
default:
|
||||
//macro doesn't exist
|
||||
return ERR_UNKN_NES_OPCODE_24BOP;
|
||||
|
|
@ -47,6 +50,12 @@ uint8_t nes_opcode_16b_operand_8b_return( uint8_t opcode, uint8_t addrH, uint8_t
|
|||
case EMULATE_NES_CPU_RD:
|
||||
*data = emulate_nes_cpu_rd( addrH, addrL );
|
||||
break;
|
||||
case NES_CPU_RD:
|
||||
*data = nes_cpu_rd( addrH, addrL );
|
||||
break;
|
||||
case NES_PPU_RD:
|
||||
*data = nes_ppu_rd( addrH, addrL );
|
||||
break;
|
||||
default:
|
||||
//macro doesn't exist
|
||||
return ERR_UNKN_NES_OPCODE_16BOP_8BRV;
|
||||
|
|
@ -64,7 +73,8 @@ uint8_t nes_opcode_16b_operand_8b_return( uint8_t opcode, uint8_t addrH, uint8_t
|
|||
* mapper '161 CLK <- /ROMSEL
|
||||
* mapper '161 /LOAD <- PRG R/W
|
||||
* mapper '161 /LOAD must be low on rising edge of CLK to latch data
|
||||
* This is a /WE controlled write with data latched on rising edge EXP0
|
||||
* This is a /WE controlled write. Address latched on falling edge,
|
||||
* and data latched on rising edge EXP0
|
||||
* Note:addrH bit7 has no effect (ends up on PPU /A13)
|
||||
* /ROMSEL, M2, & PRG R/W signals untouched
|
||||
* Pre: nes_init() setup of io pins
|
||||
|
|
@ -79,8 +89,8 @@ void discrete_exp0_prgrom_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
|||
_DATA_OP();
|
||||
DATA_OUT = addrH;
|
||||
_AHL_CLK(); //addrH latched
|
||||
DATA_OUT = data;
|
||||
ADDR_OUT = addrL;
|
||||
DATA_OUT = data;
|
||||
_EXP0_LO(); //Tas = 0ns, Tah = 30ns
|
||||
_EXP0_PU(); //Twp = 40ns, Tds = 40ns, Tdh = 0ns
|
||||
//16Mhz avr clk = 62.5ns period guarantees timing reqts
|
||||
|
|
@ -99,7 +109,7 @@ void discrete_exp0_prgrom_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
|||
* Post:address left on bus
|
||||
* data bus left clear
|
||||
* EXP0 left floating
|
||||
* Rtn: None
|
||||
* Rtn: Byte read from PRG-ROM at addrHL
|
||||
*/
|
||||
uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL )
|
||||
{
|
||||
|
|
@ -136,6 +146,8 @@ uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL )
|
|||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
|
||||
//latch data
|
||||
read = DATA_IN;
|
||||
|
|
@ -146,3 +158,180 @@ uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL )
|
|||
|
||||
return read;
|
||||
}
|
||||
|
||||
/* Desc:NES CPU Read without being so slow
|
||||
* decode A15 from addrH to set /ROMSEL as expected
|
||||
* float EXP0
|
||||
* toggle M2 as NES would
|
||||
* Pre: nes_init() setup of io pins
|
||||
* Post:address left on bus
|
||||
* data bus left clear
|
||||
* EXP0 left floating
|
||||
* Rtn: Byte read from PRG-ROM at addrHL
|
||||
*/
|
||||
uint8_t nes_cpu_rd( uint8_t addrH, uint8_t addrL )
|
||||
{
|
||||
uint8_t read; //return value
|
||||
|
||||
//set address bus
|
||||
ADDR_OUT = addrL;
|
||||
_ADDRH_SET(addrH);
|
||||
|
||||
//set M2 and /ROMSEL
|
||||
_M2_HI();
|
||||
if( addrH >= 0x80 ) { //addressing cart rom space
|
||||
_ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
}
|
||||
|
||||
//couple more NOP's waiting for data
|
||||
//zero nop's returned previous databus value
|
||||
NOP(); //one nop got most of the bits right
|
||||
NOP(); //two nop got all the bits right
|
||||
NOP(); //add third nop for some extra
|
||||
NOP(); //one more can't hurt
|
||||
//might need to wait longer for some carts...
|
||||
|
||||
//latch data
|
||||
read = DATA_IN;
|
||||
|
||||
//return bus to default
|
||||
_M2_LO();
|
||||
_ROMSEL_HI();
|
||||
|
||||
return read;
|
||||
}
|
||||
|
||||
/* Desc:NES CPU Write
|
||||
* Just as you would expect NES's CPU to perform
|
||||
* A15 decoded to enable /ROMSEL
|
||||
* This ends up as a M2 and/or /ROMSEL controlled write
|
||||
* Note:addrH bit7 has no effect (ends up on PPU /A13)
|
||||
* EXP0 floating
|
||||
* Pre: nes_init() setup of io pins
|
||||
* Post:data latched by anything listening on the bus
|
||||
* address left on bus
|
||||
* data left on bus, but pullup only
|
||||
* Rtn: None
|
||||
*/
|
||||
void nes_cpu_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||
{
|
||||
//Float EXP0 as it should be in NES
|
||||
_EXP0_LO();
|
||||
|
||||
//need for whole function
|
||||
_DATA_OP();
|
||||
|
||||
//set addrL
|
||||
ADDR_OUT = addrL;
|
||||
//latch addrH
|
||||
DATA_OUT = addrH;
|
||||
_AHL_CLK();
|
||||
|
||||
//PRG R/W LO
|
||||
_PRGRW_WR();
|
||||
|
||||
//put data on bus
|
||||
DATA_OUT = data;
|
||||
|
||||
//set M2 and /ROMSEL
|
||||
_M2_HI();
|
||||
if( addrH >= 0x80 ) { //addressing cart rom space
|
||||
_ROMSEL_LO(); //romsel trails M2 during CPU operations
|
||||
}
|
||||
|
||||
//give some time
|
||||
NOP();
|
||||
NOP();
|
||||
|
||||
//latch data to cart memory/mapper
|
||||
_M2_LO();
|
||||
_ROMSEL_HI();
|
||||
|
||||
//retore PRG R/W to default
|
||||
_PRGRW_RD();
|
||||
|
||||
//Free data bus
|
||||
_DATA_IP();
|
||||
}
|
||||
|
||||
/* Desc:NES PPU Read
|
||||
* decode A13 from addrH to set /A13 as expected
|
||||
* Pre: nes_init() setup of io pins
|
||||
* Post:address left on bus
|
||||
* data bus left clear
|
||||
* Rtn: Byte read from CHR-ROM/RAM at addrHL
|
||||
*/
|
||||
uint8_t nes_ppu_rd( uint8_t addrH, uint8_t addrL )
|
||||
{
|
||||
uint8_t read; //return value
|
||||
|
||||
//set address bus
|
||||
ADDR_OUT = addrL;
|
||||
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
||||
_ADDRH_SET(addrH & PPU_A13N);
|
||||
} else { //above PPU $1FFF, A13 set, /A13 clear
|
||||
_ADDRH_SET(addrH);
|
||||
}
|
||||
|
||||
//set CHR /RD and /WR
|
||||
_CSRD_LO();
|
||||
//_CSWR_HI(); already done
|
||||
|
||||
//couple more NOP's waiting for data
|
||||
//zero nop's returned previous databus value
|
||||
NOP(); //one nop got most of the bits right
|
||||
NOP(); //two nop got all the bits right
|
||||
NOP(); //add third nop for some extra
|
||||
NOP(); //one more can't hurt
|
||||
//might need to wait longer for some carts...
|
||||
|
||||
//latch data
|
||||
read = DATA_IN;
|
||||
|
||||
//return bus to default
|
||||
_CSRD_HI();
|
||||
|
||||
return read;
|
||||
}
|
||||
|
||||
/* Desc:NES PPU Write
|
||||
* decode A13 from addrH to set /A13 as expected
|
||||
* Pre: nes_init() setup of io pins
|
||||
* Post:data written to addrHL
|
||||
* address left on bus
|
||||
* data bus left clear
|
||||
* Rtn: None
|
||||
*/
|
||||
uint8_t nes_ppu_wr( uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||
{
|
||||
//will need output whole function
|
||||
_DATA_OP();
|
||||
|
||||
//set address bus
|
||||
ADDR_OUT = addrL;
|
||||
//addrH with PPU /A13
|
||||
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
|
||||
DATA_OUT = (addrH & PPU_A13N);
|
||||
} else { //above PPU $1FFF, A13 set, /A13 clear
|
||||
DATA_OUT = addrH;
|
||||
}
|
||||
//latch addrH
|
||||
_AHL_CLK();
|
||||
|
||||
//put data on bus
|
||||
DATA_OUT = data;
|
||||
|
||||
//set CHR /RD and /WR
|
||||
//_CSRD_HI(); already done
|
||||
_CSWR_LO();
|
||||
|
||||
//might need to wait longer for some carts...
|
||||
NOP(); //one can't hurt
|
||||
|
||||
//latch data to memory
|
||||
_CSWR_HI();
|
||||
|
||||
//clear data bus
|
||||
_DATA_IP();
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -11,5 +11,9 @@ uint8_t nes_opcode_24b_operand( uint8_t opcode, uint8_t addrH, uint8_t addrL, ui
|
|||
uint8_t nes_opcode_16b_operand_8b_return( uint8_t opcode, uint8_t addrH, uint8_t addrL, uint8_t *data );
|
||||
void discrete_exp0_prgrom_wr( uint8_t addrH, uint8_t addrL, uint8_t data );
|
||||
uint8_t emulate_nes_cpu_rd( uint8_t addrH, uint8_t addrL );
|
||||
uint8_t nes_cpu_rd( uint8_t addrH, uint8_t addrL );
|
||||
void nes_cpu_wr( uint8_t addrH, uint8_t addrL, uint8_t data );
|
||||
uint8_t nes_ppu_rd( uint8_t addrH, uint8_t addrL );
|
||||
uint8_t nes_ppu_wr( uint8_t addrH, uint8_t addrL, uint8_t data );
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ uint8_t pinport_opcode_only( uint8_t opcode )
|
|||
//Caution AXL_CLK() relies on EXPFF_OP() to be called beforehand
|
||||
// Think of it like you must enable the output before you can clock it.
|
||||
// Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled.
|
||||
#if defined(PURPLE_KAZZO) || defined(GREEN_KAZZO) //purple and green versions
|
||||
#if ( (defined(PURPLE_KAZZO)) || (defined(GREEN_KAZZO)) )//purple and green versions
|
||||
case XOE_ip: _XOE_ip(); break; //Don't call these, use AXLOE instead
|
||||
case XOE_op: _XOE_op(); break;
|
||||
case XOE_lo: _XOE_lo(); break;
|
||||
|
|
@ -429,7 +429,7 @@ uint8_t pinport_opcode_16b_operand( uint8_t opcode, uint8_t operandMSB, uint8_t
|
|||
if (operandMSB < 0x20) { // below PPU $2000, A13 clear, SET PPU /A13
|
||||
_ADDRH_SET(operandMSB & PPU_A13N);
|
||||
} else { // above PPU $1FFF, A13 set, PPU /A13 already clear in operandMSB
|
||||
_ADDRH_SET(operandMSB);
|
||||
_ADDRH_SET(operandMSB);
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -383,7 +383,15 @@ void software_AXL_CLK();
|
|||
#define _BL_LO() AUX_OUT &= ~(1<<BL)
|
||||
#define _BL_HI() AUX_OUT |= (1<<BL)
|
||||
|
||||
#ifndef pg_XOE //FINAL_DESIGN
|
||||
|
||||
//purple and green versions
|
||||
#if ( (defined(PURPLE_KAZZO)) || (defined(GREEN_KAZZO)) )
|
||||
#define _XOE_ip() AUX_DDR &= ~(1<<pg_XOE) //don't use these, use software tied together AXLOE instead
|
||||
#define _XOE_op() AUX_DDR |= (1<<pg_XOE)
|
||||
#define _XOE_lo() AUX_OUT &= ~(1<<pg_XOE) //FF /OE pin low->enable o/p
|
||||
#define _XOE_hi() AUX_OUT |= (1<<pg_XOE) //FF /OE pin high->disable o/p
|
||||
|
||||
#else //FINAL_DESIGN
|
||||
#define _AXLOE_IP() AUX_DDR &= ~(1<<AXLOE)
|
||||
#define _AXLOE_OP() AUX_DDR |= (1<<AXLOE)
|
||||
#define _EXPFF_OP() AUX_OUT &= ~(1<<AXLOE) //FF /OE pin low->enable o/p
|
||||
|
|
@ -392,13 +400,9 @@ void software_AXL_CLK();
|
|||
// Think of it like you must enable the output before you can clock it.
|
||||
// Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled.
|
||||
#define _AXL_CLK() _EXPFF_FLT(); _EXPFF_OP(); //same name and convention as purple
|
||||
#else //purple and green versions
|
||||
#define _XOE_ip() AUX_DDR &= ~(1<<pg_XOE) //don't use these, use software tied together AXLOE instead
|
||||
#define _XOE_op() AUX_DDR |= (1<<pg_XOE)
|
||||
#define _XOE_lo() AUX_OUT &= ~(1<<pg_XOE) //FF /OE pin low->enable o/p
|
||||
#define _XOE_hi() AUX_OUT |= (1<<pg_XOE) //FF /OE pin high->disable o/p
|
||||
//Final version ties XOEn and AXL to same pin, we can do this in software to make other ver behave similarly
|
||||
#endif
|
||||
|
||||
//Final version ties XOEn and AXL to same pin, we can do this in software to make other ver behave similarly
|
||||
#ifdef PURPLE_KAZZO
|
||||
#define _AXLOE_IP() _XOE_ip(); _p_AXL_ip();
|
||||
#define _AXLOE_OP() _XOE_op(); _p_AXL_op();
|
||||
|
|
@ -412,6 +416,7 @@ void software_AXL_CLK();
|
|||
#define _EXPFF_FLT() _XOE_hi();
|
||||
#endif
|
||||
|
||||
|
||||
//clocks must be initialized, Data bus clear
|
||||
#define _ADDRH_SET(oper) _DATA_OP(); DATA_OUT = oper; _AHL_CLK(); _DATA_IP();
|
||||
#define _ADDRX_SET(oper) _DATA_OP(); DATA_OUT = oper; _AXL_CLK(); _DATA_IP();
|
||||
|
|
|
|||
|
|
@ -0,0 +1,216 @@
|
|||
#include "snes.h"
|
||||
|
||||
//=================================================================================================
|
||||
//
|
||||
// SNES operations
|
||||
// This file includes all the snes functions possible to be called from the snes dictionary.
|
||||
//
|
||||
// See description of the commands contained here in shared/shared_dictionaries.h
|
||||
//
|
||||
//=================================================================================================
|
||||
|
||||
/* Desc:Function takes an opcode which was transmitted via USB
|
||||
* then decodes it to call designated function.
|
||||
* shared_dict_snes.h is used in both host and fw to ensure opcodes/names align
|
||||
* Pre: Macros must be defined in firmware pinport.h
|
||||
* opcode must be defined in shared_dict_snes.h
|
||||
* Post:function call complete.
|
||||
* Rtn: SUCCESS if opcode found, ERR_UNKN_SNES_OPCODE_24BOP if opcode not present.
|
||||
*/
|
||||
uint8_t snes_opcode_24b_operand( uint8_t opcode, uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||
{
|
||||
switch (opcode) {
|
||||
case SNES_A15_A0_PRGM_WR:
|
||||
snes_a15_a0_wr( PRGM, TRUE, addrH, addrL, data );
|
||||
break;
|
||||
case SNES_A15_A0_PLAY_WR:
|
||||
snes_a15_a0_wr( PLAY, TRUE, addrH, addrL, data );
|
||||
break;
|
||||
case SNES_A15_A0_NO_ROMSEL_PLAY_WR:
|
||||
snes_a15_a0_wr( PLAY, ~TRUE, addrH, addrL, data );
|
||||
break;
|
||||
default:
|
||||
//macro doesn't exist
|
||||
return ERR_UNKN_SNES_OPCODE_24BOP;
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/* Desc:Function takes an opcode which was transmitted via USB
|
||||
* then decodes it to call designated function.
|
||||
* shared_dict_snes.h is used in both host and fw to ensure opcodes/names align
|
||||
* Pre: Macros must be defined in firmware pinport.h
|
||||
* opcode must be defined in shared_dict_snes.h
|
||||
* Post:pointer to data updated with return value.
|
||||
* Rtn: SUCCESS if opcode found, ERR_UNKN_SNES_OPCODE_24BOP_8BRV if opcode not present.
|
||||
*/
|
||||
uint8_t snes_opcode_24b_operand_8b_return(
|
||||
uint8_t opcode, uint8_t addrX, uint8_t addrH, uint8_t addrL, uint8_t *data )
|
||||
{
|
||||
switch (opcode) {
|
||||
case SNES_PRGM_RD:
|
||||
*data = snes_a15_a0_rd( PRGM, TRUE, addrX, addrH, addrL );
|
||||
break;
|
||||
case SNES_PLAY_RD:
|
||||
*data = snes_a15_a0_rd( PLAY, TRUE, addrX, addrH, addrL );
|
||||
break;
|
||||
case SNES_NO_ROMSEL_PLAY_RD:
|
||||
*data = snes_a15_a0_rd( PLAY, ~TRUE, addrX, addrH, addrL );
|
||||
break;
|
||||
default:
|
||||
//macro doesn't exist
|
||||
return ERR_UNKN_SNES_OPCODE_24BOP_8BRV;
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/* Desc:SNES CPU Write in program and play mode
|
||||
* only provide A15-0, A23-16 use last latched value
|
||||
* Pass in mode= PRGM/PLAY to determine /RESET (EXP0)
|
||||
* *in program mode:
|
||||
* /RESET pin held low for PRGM mode
|
||||
* SRAM not visibile
|
||||
* INL boards rom aligned linearly doesn't rely on Hi/Lo switch
|
||||
* *in play mode:
|
||||
* /RESET pin held high for PRGM mode
|
||||
* SRAM visibile
|
||||
* all boards rom aligned based on mapping
|
||||
* INL board rely on Hi/Lo switch
|
||||
* /ROMSEL goes low depending on passed in romsel variable
|
||||
* SNES /WR controlled write (rom /WE pin)
|
||||
* SYS CLK not affected
|
||||
* Pre: snes_init() setup of io pins
|
||||
* No NES cart inserted without 5v tolerant EXP0 pin
|
||||
* Post:data written to ROM at addrHL
|
||||
* address left on bus
|
||||
* data bus left clear
|
||||
* /RESET low, left in PRGM mode
|
||||
* Rtn: None
|
||||
*/
|
||||
void snes_a15_a0_wr( uint8_t mode, uint8_t romsel, uint8_t addrH, uint8_t addrL, uint8_t data )
|
||||
{
|
||||
//EXP0 default low to disable SRAM aiding in bus clearing
|
||||
if (mode == PLAY) {
|
||||
_SRST_HI();
|
||||
} else {
|
||||
_SRST_LO(); //go ahead and set to be safe
|
||||
}
|
||||
|
||||
//need for whole function
|
||||
_DATA_OP();
|
||||
|
||||
//set addrL
|
||||
ADDR_OUT = addrL;
|
||||
//latch addrH
|
||||
DATA_OUT = addrH;
|
||||
_AHL_CLK();
|
||||
|
||||
//put data on bus
|
||||
DATA_OUT = data;
|
||||
|
||||
//let higher level function/caller decide if /ROMSEL is active
|
||||
if ( romsel == TRUE ) {
|
||||
_ROMSEL_LO();
|
||||
}
|
||||
|
||||
//set SNES /RD and /WR
|
||||
//_CSRD_HI(); already done
|
||||
_CSWR_LO();
|
||||
|
||||
//give some time
|
||||
NOP();
|
||||
NOP();
|
||||
|
||||
//latch data to cart
|
||||
_CSWR_HI();
|
||||
_ROMSEL_HI();
|
||||
|
||||
//Free data bus
|
||||
_DATA_IP();
|
||||
//default mode
|
||||
_SRST_LO();
|
||||
}
|
||||
|
||||
|
||||
/* Desc:SNES CPU Read in program and play mode
|
||||
* entire 24bit address bus provided
|
||||
* Pass in mode= PRGM/PLAY to determine /RESET (EXP0)
|
||||
* *in program mode:
|
||||
* /RESET pin held low for PRGM mode
|
||||
* SRAM not visibile
|
||||
* INL boards rom aligned linearly doesn't rely on Hi/Lo switch
|
||||
* *in play mode:
|
||||
* /RESET pin held high for PRGM mode
|
||||
* SRAM visibile
|
||||
* all boards rom aligned based on mapping
|
||||
* INL board rely on Hi/Lo switch
|
||||
* /ROMSEL goes low depending on passed in romsel variable
|
||||
* SNES /RD controlled read (rom /OE pin)
|
||||
* SYS CLK not affected
|
||||
* Pre: snes_init() setup of io pins
|
||||
* No NES cart inserted without 5v tolerant EXP0 pin
|
||||
* Post:address left on bus
|
||||
* data bus left clear
|
||||
* /RESET low, left in PRGM mode
|
||||
* Rtn: Byte read from cart at addrXHL
|
||||
*/
|
||||
uint8_t snes_a15_a0_rd( uint8_t mode, uint8_t romsel, uint8_t addrX, uint8_t addrH, uint8_t addrL )
|
||||
{
|
||||
uint8_t read; //return value
|
||||
|
||||
//EXP0 default low to disable SRAM aiding in bus clearing
|
||||
if (mode == PLAY) {
|
||||
_SRST_HI();
|
||||
} else {
|
||||
_SRST_LO(); //go ahead and set to be safe
|
||||
}
|
||||
|
||||
//need for address latching
|
||||
_DATA_OP();
|
||||
|
||||
//set addrL
|
||||
ADDR_OUT = addrL;
|
||||
//latch addrH
|
||||
DATA_OUT = addrH;
|
||||
_AHL_CLK();
|
||||
//latch addrX
|
||||
DATA_OUT = addrX;
|
||||
_AXL_CLK();
|
||||
|
||||
//clear bus
|
||||
_DATA_IP();
|
||||
|
||||
//let higher level function/caller decide if /ROMSEL is active
|
||||
if ( romsel == TRUE ) {
|
||||
_ROMSEL_LO();
|
||||
}
|
||||
|
||||
//set SNES /RD and /WR
|
||||
_CSRD_LO();
|
||||
//_CSWR_HI(); already done
|
||||
|
||||
//give some time
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
NOP();
|
||||
|
||||
//latch data from cart
|
||||
read = DATA_IN;
|
||||
|
||||
//Free data bus
|
||||
_CSRD_HI();
|
||||
_ROMSEL_HI();
|
||||
|
||||
//default mode
|
||||
_SRST_LO();
|
||||
|
||||
return read;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
#ifndef _snes_h
|
||||
#define _snes_h
|
||||
|
||||
#include <avr/io.h>
|
||||
#include "pinport.h"
|
||||
#include "shared_dictionaries.h"
|
||||
#include "shared_errors.h"
|
||||
|
||||
//mode of snes /RESET pin
|
||||
#define PRGM 1
|
||||
#define PLAY 0
|
||||
|
||||
uint8_t snes_opcode_24b_operand( uint8_t opcode, uint8_t addrH, uint8_t addrL, uint8_t data );
|
||||
uint8_t snes_opcode_24b_operand_8b_return(
|
||||
uint8_t opcode, uint8_t addrX, uint8_t addrH, uint8_t addrL, uint8_t *data );
|
||||
|
||||
void snes_a15_a0_wr( uint8_t mode, uint8_t romsel, uint8_t addrH, uint8_t addrL, uint8_t data );
|
||||
uint8_t snes_a15_a0_rd( uint8_t mode, uint8_t romsel, uint8_t addrX, uint8_t addrH, uint8_t addrL );
|
||||
|
||||
#endif
|
||||
|
|
@ -134,6 +134,22 @@ USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]) {
|
|||
}
|
||||
break; //end of NES
|
||||
|
||||
case SNES:
|
||||
switch (spacket->opcode) {
|
||||
case SNES_OPCODE_24BOP_MIN ... SNES_OPCODE_24BOP_MAX:
|
||||
rv[0] = snes_opcode_24b_operand( spacket->opcode,
|
||||
spacket->operandMSB, spacket->operandLSB, spacket->miscdata );
|
||||
break;
|
||||
case SNES_OPCODE_24BOP_8BRV_MIN ... SNES_OPCODE_24BOP_8BRV_MAX:
|
||||
rv[0] = snes_opcode_24b_operand_8b_return( spacket->opcode,
|
||||
spacket->miscdata, spacket->operandMSB, spacket->operandLSB, &rv[1]);
|
||||
rlen++;
|
||||
break;
|
||||
default: //snes opcode min/max definition error
|
||||
rv[0] = ERR_BAD_SNES_OP_MINMAX;
|
||||
}
|
||||
break; //end of SNES
|
||||
|
||||
default:
|
||||
//request (aka dictionary) is unknown
|
||||
rv[0] = ERR_UNKN_DICTIONARY;
|
||||
|
|
|
|||
|
|
@ -92,6 +92,21 @@ int dictionary_call( USBtransfer *transfer, uint8_t dictionary, uint8_t opcode,
|
|||
}
|
||||
break; //end of NES
|
||||
|
||||
case SNES: debug("dict: SNES");
|
||||
transfer->wLength = 1;
|
||||
switch (opcode) {
|
||||
case SNES_OPCODE_24BOP_MIN ... SNES_OPCODE_24BOP_MAX:
|
||||
debug("SNES_OPCODE_24BOP");
|
||||
break;
|
||||
case SNES_OPCODE_24BOP_8BRV_MIN ... SNES_OPCODE_24BOP_8BRV_MAX:
|
||||
debug("SNES_OPCODE_24BOP_8BRV");
|
||||
transfer->wLength = 2;
|
||||
break;
|
||||
default: //snes opcode min/max definition error
|
||||
sentinel("bad SNES opcode min/max err:%d",ERR_BAD_SNES_OP_MINMAX);
|
||||
}
|
||||
break; //end of SNES
|
||||
|
||||
default:
|
||||
//request (aka dictionary) is unknown
|
||||
sentinel("unknown DICT err:%d",ERR_UNKN_DICTIONARY);
|
||||
|
|
|
|||
|
|
@ -5,14 +5,57 @@ int erase_nes( USBtransfer *transfer )
|
|||
|
||||
debug("erasing");
|
||||
|
||||
//dict opcode addr data
|
||||
dictionary_call( transfer, IO, IO_RESET, 0, 0);
|
||||
dictionary_call( transfer, IO, NES_INIT, 0, 0);
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA);
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55);
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0x90);
|
||||
dictionary_call( transfer, NES, EMULATE_NES_CPU_RD, 0x8000, 0);
|
||||
dictionary_call( transfer, NES, EMULATE_NES_CPU_RD, 0x8001, 0);
|
||||
//dict opcode addr data
|
||||
dictionary_call( transfer, IO, IO_RESET, 0, 0);
|
||||
dictionary_call( transfer, IO, NES_INIT, 0, 0);
|
||||
//software mode
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA);
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55);
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0x90);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8001, 0);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8001, 0);
|
||||
//exit software
|
||||
dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x8000, 0xF0);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
dictionary_call( transfer, NES, NES_CPU_RD, 0x8001, 0);
|
||||
|
||||
//erase
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0x80);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0x10);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
|
||||
//program byte
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xAA);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x2AAA, 0x55);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x5555, 0xA0);
|
||||
// dictionary_call( transfer, NES, DISCRETE_EXP0_PRGROM_WR, 0x8000, 0x00);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
// dictionary_call( transfer, NES, NES_CPU_RD, 0x8000, 0);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -48,6 +48,11 @@
|
|||
//wIndex: address
|
||||
#define DISCRETE_EXP0_PRGROM_WR 0x00
|
||||
|
||||
#define NES_PPU_WR 0x01
|
||||
|
||||
//generic CPU write with M2 toggle as expected with NES CPU
|
||||
// A15 decoded to enable /ROMSEL as it should
|
||||
#define NES_CPU_WR 0x02
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND AND RETURN VALUE plus SUCCESS/ERROR_CODE
|
||||
|
|
@ -66,4 +71,9 @@
|
|||
//nice and slow trying to be more like the NES
|
||||
#define EMULATE_NES_CPU_RD 0x80
|
||||
|
||||
//like the one above but not so slow..
|
||||
#define NES_CPU_RD 0x81
|
||||
|
||||
#define NES_PPU_RD 0x82
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,96 @@
|
|||
#ifndef _shared_dict_snes_h
|
||||
#define _shared_dict_snes_h
|
||||
|
||||
//define dictionary's reference number in the shared_dictionaries.h file
|
||||
//then include this dictionary file in shared_dictionaries.h
|
||||
//The dictionary number is literally used as usb transfer request field
|
||||
//the opcodes and operands in this dictionary are fed directly into usb setup packet's wValue wIndex fields
|
||||
|
||||
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
// SNES DICTIONARY
|
||||
//
|
||||
// opcodes contained in this dictionary must be implemented in firmware/source/snes.c
|
||||
//
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
|
||||
// OPCODES with no operand and no return value besides SUCCESS/ERROR_CODE
|
||||
|
||||
|
||||
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND and no return value besides SUCCESS/ERROR_CODE
|
||||
//=============================================================================================
|
||||
// Detect this opcode/operand setup with opcode between the following defines:
|
||||
#define SNES_OPCODE_24BOP_MIN 0x00
|
||||
#define SNES_OPCODE_24BOP_MAX 0x7F
|
||||
//
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
|
||||
//SNES has 24bit address bus which is max operands we can send
|
||||
//So have to get a little creative for writing to 24bit address
|
||||
//prob easiest to just keep last latched value of A23-16
|
||||
|
||||
//write to SNES in program mode (/RESET low)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL always goes low
|
||||
//program writes don't allow access to SRAM
|
||||
//program access aligns ROM linearly and is independent of Hi/Lo switch
|
||||
#define SNES_A15_A0_PRGM_WR 0x00
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL always goes low
|
||||
//play writes allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_A15_A0_PLAY_WR 0x01
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//only can send A15-A0
|
||||
//A23-16 are last latched values
|
||||
//SNES /ROMSEL not affected
|
||||
//play writes allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_A15_A0_NO_ROMSEL_PLAY_WR 0x02
|
||||
|
||||
//=============================================================================================
|
||||
// OPCODES WITH OPERAND 8bit RETURN VALUE plus SUCCESS/ERROR_CODE
|
||||
//=============================================================================================
|
||||
// Detect this opcode/operand setup with opcode between the following defines:
|
||||
#define SNES_OPCODE_24BOP_8BRV_MIN 0x80
|
||||
#define SNES_OPCODE_24BOP_8BRV_MAX 0xFF
|
||||
//
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
//can supply entire 24bit address
|
||||
|
||||
//write to SNES in program mode (/RESET low)
|
||||
//SNES /ROMSEL always goes low
|
||||
//program reads don't allow access to SRAM
|
||||
//program access aligns ROM linearly and is independent of Hi/Lo switch
|
||||
#define SNES_PRGM_RD 0x80
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//SNES /ROMSEL always goes low
|
||||
//play reads allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_PLAY_RD 0x81
|
||||
|
||||
//write to SNES in play mode (/RESET high)
|
||||
//SNES /ROMSEL not active
|
||||
//play reads allow access to SRAM
|
||||
//program access aligns ROM based on position of Hi/Lo switch
|
||||
#define SNES_NO_ROMSEL_PLAY_RD 0x82
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -19,6 +19,10 @@
|
|||
//step in having scripting support on host side. The thought above just expands it one
|
||||
//step further making the dictionaries themselves operate as run time 'scripts'.
|
||||
|
||||
|
||||
//Notes:
|
||||
// each unique read/write function in avr takes about 50 bytes...
|
||||
|
||||
//don't define dictionary #0 as it is common to forget to define
|
||||
|
||||
//=============================================================================================
|
||||
|
|
@ -92,4 +96,15 @@
|
|||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
#define SNES 4
|
||||
#include "shared_dict_snes.h"
|
||||
//snes dictionary contains commands
|
||||
//These commands rely on io initialization from io dictionary prior to calling
|
||||
//This library is intended to contain all SNES related opcodes/commands
|
||||
//=============================================================================================
|
||||
//=============================================================================================
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
#define ERR_BAD_PP_OP_MINMAX 129
|
||||
#define ERR_BAD_IO_OP_MINMAX 130
|
||||
#define ERR_BAD_NES_OP_MINMAX 131
|
||||
#define ERR_BAD_SNES_OP_MINMAX 132
|
||||
|
||||
|
||||
#define ERR_UNKN_PP_OPCODE_ONLY 140
|
||||
|
|
@ -21,4 +22,7 @@
|
|||
#define ERR_UNKN_NES_OPCODE_24BOP 160
|
||||
#define ERR_UNKN_NES_OPCODE_16BOP_8BRV 161
|
||||
|
||||
#define ERR_UNKN_SNES_OPCODE_24BOP 170
|
||||
#define ERR_UNKN_SNES_OPCODE_24BOP_8BRV 171
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue