Commit Graph

6 Commits

Author SHA1 Message Date
Paul Molloy a8124e8983 Resolved issue where final buffer wasn't getting fully flashed.
Added check to ensure buff1 is done before quitting and resetting buffers.
Currently have a hacked load_oper_info_elements_chr function to test
CHR-ROM flashing.
NROM PRG & CHR flashing and dumping tested and working on black ASUS
win10 machine.
Firmware still doesn't implement previously added feature for oper_info
rd/wr_func pointer.  flash/dump.c simply overrides by providing the
function pointer based on memory type.

A bit frustrated with how complicated everything is currently...
Feel like there's a lack of standard for function definition and calls.
Would like majority of host program flow to be determined solely by
script calls.  Firmware is getting more generic and versatile at the cost
of being SLOW!!!  Perhaps that's okay though as it's not terribly slow in
comparision to comparable AVR kazzo firmware builds.  And with current
target to migrate to STM32 device this generic setup is much cleaner and
easier to work with.  However complexity was added to the firmware code in
order to help make it faster.  Not sure the goal of faster should take
priority over speed.  Obsessing over speed will cause issues with race
conditions, and complicate code to the point where I won't reach my goal.

With the long break since I've been working on this project it's making me
more willing to scrap some previous work for a cleaner solution more
aligned with my end goal.  I had to write some of this code to get a
better idea of my what my end goal will look like anyway.  Going to make a
couple builds for UIROM, and action53 as they're urgently needed.  But
beyond that I need to start working on script features, and STM32 support!
2017-06-04 20:13:58 -05:00
Paul Molloy pinkASUS 52a1b306c9 Flash NROM PRG-ROM operations are pretty well up to snuff now.
Had to add check to get cur_buff status and wait to send payload until
it's empty.  Still need to add timeout check as it'll spin forever if
there is a problem and it's never empty...

device should be able to handle buffer sizes smaller than usb transfer
but this probably isn't true if the first two bytes are stuffed into setup
packet.  Currently relies on end of (upto) 8 byte transfer to fill buffer.
MAKECHECKS would verify we don't overflow buffer..  Still kind of a half
thought out idea unfortunately.
2017-02-13 23:51:51 -06:00
paul eeepc 4b0c340eb1 Creations of operation module and dictionary.
Things appear to be working with some early testing.  Assumption that oper_info elements
are aligned in SRAM linearly appears to hold true.  Researching this I found it probably
was true, but can't be certain esp if gets changed in the future to not be purely 8byte
sized elements.
Still need to provide means to decode function numbers info function pointers.
2016-12-25 13:48:30 -06:00
paul eeepc de9b5d67a4 Basic flashing operatoins working. Still need to do some tests and erasing before flashing.
Need to verify page programmed successfully as it currently just continues even if unable to
flash proper data.  Need to make write page utilize variables for bank address based on mapper
and/or memory as currently doesn't flash CHR-ROM due to $5555 $2AAA being above address space
of CHR-ROM
2016-12-18 01:26:51 -06:00
paul eeepc 49ec51e767 Much of dumping code for PRG-ROM completed but have some bugs with setting buff elements working on debugging... 2016-12-11 20:34:43 -06:00
paul eeepc 4db2929c3b Big overdue commit of past few days effort..
Detecting mirroring code working and tested
Started working on buffer operations from host
Current code compiles but not yet at point where can start testing
Adding cpu page read to nes.c to have faster dumping operations.
moving enums to shared as gets used quite a bit communicating between device and host.
2016-12-11 01:06:41 -06:00