3c359ac5ca
Various changes to STM8 SWIM code to make more versatile allowing SWIM pin to be located effectively on any STM32 GPIO pin. Still haven't touched an AVR implementation, but made place holders so it can compile for AVR at least. These SWIM changes aren't heavily tested, mostly just made sure could flash SOIC-8 STM8 CIC via CIC CLK. Beginings of JTAG code to configure CPLDs. Currently only tested state change and scan out reading MachXO-256, 4032/64v, & XC9572/36XL CPLDs Tested and working on inlretro6 v1.0p, stm adapter, & avr kazzos. Older devices with flipflops will apply 5v signals to JTAG pins but time is mostly minimized by keeping signals defaulted low unless actively changing states or scanning data. Still need to verify scan in working, probably move TDI/TDO long strings to buffers instead of 32byte PBJE data array. Also need smarter PBJE host code to keep track of current state and come up with PBJE register values without hard coding them.. But things are working fairly well so far with SWIM & JTAG implementations. Had some issues where I thought jtag pin toggling was getting optimized out, but I must have simply had the logic analyzer speed set too low and was missing pin changes that can be as quick as 40nsec with space optimized code. Current inl6 code is ~4400Bytes, without optimization it's nearly 50% larger at ~6550Bytes..! Optimizations seem fine in testing and with logic analyzer running at 50Mhz which is good because the GPIO registers are set as volatile so they better not be getting optimized away! |
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| include | ||
| scripts | ||
| source | ||
| udev-rule-help | ||
| winlib | ||
| Makefile | ||
| inlretro.exe | ||
| inlretro_commited.exe | ||
| libusb-1.0.dll | ||