354 lines
8.9 KiB
C
354 lines
8.9 KiB
C
#include "io.h"
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//=================================================================================================
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//
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// I/O operations
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// This file includes all the io functions possible to be called from the io dictionary.
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//
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// See description of the commands contained here in shared/shared_dictionaries.h
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//
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//=================================================================================================
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/* Desc:Function takes an opcode which was transmitted via USB
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* then decodes it to call designated function.
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* shared_dict_io.h is used in both host and fw to ensure opcodes/names align
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* Pre: Macros must be defined in firmware pinport.h
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* opcode must be defined in shared_dict_io.h
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* Post:function call complete.
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* Rtn: SUCCESS if opcode found, error if opcode not present or other problem.
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*/
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uint8_t io_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rdata )
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{
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#define RD_LEN 0
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#define RD0 1
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#define RD1 2
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#define BYTE_LEN 1
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#define HWORD_LEN 2
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switch (opcode) {
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case IO_RESET: io_reset(); break;
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case NES_INIT: nes_init(); break;
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case SNES_INIT: snes_init(); break;
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case SWIM_INIT:
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return swim_init(operand); break;
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case JTAG_INIT:
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return jtag_init(operand); break;
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case EXP0_PULLUP_TEST:
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rdata[RD_LEN] = BYTE_LEN;
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rdata[RD0] = exp0_pullup_test(); break;
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default:
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//opcode doesn't exist
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return ERR_UNKN_IO_OPCODE;
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}
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return SUCCESS;
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}
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//pullup as many cart pins as possible
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//goal to be safe state for all hardware
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//doesn't currently contain any checks to report error/success from
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//this is intended to be the "reset" safest condition for the kazzo
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void io_reset()
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{
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#ifdef STM_CORE
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//reset GPIO perif blocks to default state
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RCC->AHBRSTR |= ( RCC_AHBRSTR_GPIOARST | RCC_AHBRSTR_GPIOBRST | RCC_AHBRSTR_GPIOCRST | RCC_AHBRSTR_GPIODRST | RCC_AHBRSTR_GPIOFRST );
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RCC->AHBRSTR &= ~( RCC_AHBRSTR_GPIOARST | RCC_AHBRSTR_GPIOBRST | RCC_AHBRSTR_GPIOCRST | RCC_AHBRSTR_GPIODRST | RCC_AHBRSTR_GPIOFRST );
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#endif
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//pull up addr[7:0] bus
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ADDR_ENABLE();
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ADDR_IP();
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ADDR_PU();
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//pull up data bus
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DATA_ENABLE();
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DATA_IP_PU();
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//pull up control port
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CTL_ENABLE();
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M2_IP_PU();
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ROMSEL_IP_PU();
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PRGRW_IP_PU();
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CSRD_IP_PU();
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CSWR_IP_PU();
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CICE_IP_PU();
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IRQ_IP_PU();
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CIA10_IP_PU();
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#ifndef C3nodef
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FREE_IP_PU();
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#endif
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//pull up on FF /OE should disable FF ouput
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#ifndef C7nodef
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AHL_IP_PU();
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#endif
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#ifndef C13nodef
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EXP_DISABLE();
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#endif
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#ifndef C19nodef
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AFL_IP_PU();
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#endif
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//EXP0 input no pullup
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//Lots of possibilities, ~safe bet it will have it's own pull-up/down if needed.
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//SNES /RESET pin disables SRAM on first few pcb versions
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//NES PRG-ROM /OE (with pulldown) on old INL-ROM v1 boards w/pulldown
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//NED PRG-ROM /WE (with pullup) on INL-ROM v3 boards w/pullup
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//NES CPLD JTAG TDO non-5v tolerant
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//Famicom carts have APU sound (EXP6) shorted to RF sound (EXP0)
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// -enabling EXP FF output will drive EXP0 to value of A21/EXP6
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EXP0_IP_FL();
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//LED LAST displaying complete..
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//planning to have LED DIM at power on to signify kazzo is in default
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//mostly all pins pulled up state.
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//gives some insight to current state of kazzo since it doesn't reset itself
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//or if kazzo does reset itself due to WDT dim LED can help detect that.
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LED_IP_PU(); //DIM pulled up
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}
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//NES cartridge interfacing setup
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//set outputs as required
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//latch address of $0000
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//disable NES cart memories
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void nes_init()
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{
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//start with a reset
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//expecting user to do this but just to be sure
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io_reset();
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//enable control outputs and disable memories
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//PRG-ROM
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ROMSEL_OP();
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ROMSEL_HI();
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//WRAM (and state of m2 during first half of CPU cycle)
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M2_OP();
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M2_LO();
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//CPU RD
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PRGRW_OP();
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PRGRW_HI();
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//other control pins are inputs, leave as IP pullup from reset
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//disable any CHR/VRAM memories with CHR /RD /WR
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//prior to setting PPU A13 & /A13 which are /CE pins
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//doing this helps ensure data bus is clear before
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//using it for AHL clocking
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CSRD_OP();
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CSRD_HI();
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CSWR_OP();
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CSWR_HI();
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//memories are now disabled Data bus should be clear
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DATA_ENABLE();
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DATA_IP_PU();
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//now meet conditions to call other macros
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//setup address $0000
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ADDR_ENABLE();
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ADDR_SET(0x0000);
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}
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//SNES cartridge interfacing setup
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//set outputs as required
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//latch address of $00:0000
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//disable cart memories
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//reset high disables SRAM and puts INL carts in PRGM mode
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//Excersize extreme caution calling this while NES/FC cart inserted
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//probably won't work if FC inserted due to EXP0-EXP6 short due to audio jumper on cart
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void snes_init()
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{
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//start with a reset
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//expecting user to do this but just to be sure
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io_reset();
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//enable control outputs and disable memories
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//ROM
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ROMSEL_OP();
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ROMSEL_HI();
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CSRD_OP();
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CSRD_HI();
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CSWR_OP();
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CSWR_HI();
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//disable SRAM and put cart in PLAY mode
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EXP0_HI();
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EXP0_OP();
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//if SWIM is active, EXP0 must be set to pullup prior to SWIM transfers
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//other control pins are inputs or unused, leave as IP pullup from reset
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//memories are now disabled Data bus should be clear
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DATA_ENABLE();
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DATA_IP_PU();
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//now meet conditions to call other macros
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//setup address $0000
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ADDR_ENABLE();
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ADDR_SET(0x0000);
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//setup HIGH ADDR with bank $00
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HADDR_ENABLE();
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HADDR_SET(0x00);
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}
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//Initialization of SWIM "single wire interface module" communications
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//the SWIM pin depends on INL board design.
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//dict call must provide the "swim_lane"
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//that swim lane will be used for all subsequent communications.
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//TODO setup to control SWIM pin as (psuedo) open drain.
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//if swim lane is unknown or other problem return error, else return SUCCESS
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uint8_t swim_init( uint8_t swim_lane )
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{
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switch (swim_lane) {
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case SWIM_ON_A0: //Most NES & Famicom carts
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//Enable A0 pin on EXT PORT
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EXT_A0_ENABLE();
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//set A0 to open drain with pull-up enabled
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A0_IP_PU();
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#ifdef STM_CORE
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A0_OD(); //set type to open drain
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A0_HI(); //set output high (deasserted)
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A0_OP(); //enable as output to have above take effect
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#endif
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swim_pin = A0;
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swim_base = A0bank;
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//swim_mask = 1<<A0;
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//set set as output high
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//define the swim pin, base, & mask
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break;
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case SWIM_ON_EXP0: //SNES carts
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//set to define used by shared_dict_pinport.h
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//that way we can call pinport_call(opcode, null, swim_pin, null)
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CTL_ENABLE();
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EXP0_IP_PU(); //this enables pullup for stm
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#ifdef STM_CORE
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EXP0_OD(); //set type to open drain
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EXP0_HI(); //set output high (deasserted)
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EXP0_OP(); //enable as output to have above take effect
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#endif
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swim_pin = EXP0_;
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swim_base = EXP0bank;
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//swim_mask = 1<<EXP0;
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break;
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case SWIM_ON_D0: //NES/FC carts with CICOprocesor
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break;
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default:
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return ERR_UNKN_SWIM_LANE;
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}
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return SUCCESS;
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}
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//Initialization of JTAG communications
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//the JTAG pin depends on INL board design.
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//dict call must provide the "jtag_lane"
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//that jtag lane will be used for all subsequent communications.
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//if jtag lane is unknown or other problem return error, else return SUCCESS
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uint8_t jtag_init( uint8_t jtag_lane )
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{
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switch (jtag_lane) {
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case JTAG_ON_EXP0_3: //Most NES carts
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#ifdef STM_INL6
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//set base & masks
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tdo_base = EXP0bank;
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tdo_pin = EXP0;
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tdi_base = D8bank;
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tdi_pin = D8;
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tms_base = D9bank;
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tms_pin = D9;
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tck_base = D10bank;
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tck_pin = D10;
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#else
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#endif
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//enable GPIO banks
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//EXT_D8_10_ENABLE(); //EXP0 is also on this GPIO bank
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EXP_ENABLE();
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CTL_ENABLE(); //not really needed..
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//initialize PBJE
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jtag_init_pbje();
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break;
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default:
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return ERR_UNKN_JTAG_LANE;
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}
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return SUCCESS;
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}
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//Test starts by verifying EXP0 can be driven low, if not, will return one byte of AUX_PIN
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//followed by alternating 0xAA, 0x55, 0xAA...
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//This test pulls up EXP0 and then reads AUX_PIN 6 times in rapid succession returning error code
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//plus 6 bytes of read data. If pull up works but is just slow, should see that in return data.
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//data[0] marks bit where EXP0 resisdes to provide host with bitmask for EXP0
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uint8_t exp0_pullup_test()
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{
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uint16_t temp0, temp1, temp2, temp3, temp4, temp5;
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//first verify EXP0 can be driven low
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EXP0_LO(); //sets O/P and low
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EXP0_OP();
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NOP(); //give some time to settle
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EXP0_RD(temp0);
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//data[1] = AUX_IN; //port where EXP0 resides
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EXP0_IP_FL(); //sets I/P w/o pullup
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//if ( (data[1] & data[0]) == data[0]) {
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if (temp0) {
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//EXP0 was high, couldn't drive EXP0 low
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//data[2] = data[4] = data[6] = 0xAA;
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//data[3] = data[5] = 0x55;
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//return this signature as indication EXP0 failed to drive low
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return EXP0_STUCK_HI;
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}
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//Driving EXP0 low was successful, now pullup and read back
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EXP0_IP_PU();
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EXP0_RD(temp0);
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EXP0_RD(temp1);
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NOP();
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EXP0_RD(temp2); //3cycles
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NOP();
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NOP();
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EXP0_RD(temp3); //6cycles
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NOP();
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NOP();
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NOP();
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EXP0_RD(temp4); //10cycles
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NOP();
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NOP();
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NOP();
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NOP();
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EXP0_RD(temp5); //15cycles
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//return EXP0 to floating
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EXP0_IP_FL();
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//return the number of cycles it took for EXP0 to go high
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if (temp0) return 0;
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if (temp1) return 1;
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if (temp2) return 3;
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if (temp3) return 6;
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if (temp4) return 10;
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if (temp5) return 15;
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else return CANNOT_PULLUP_EXP0;
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}
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