38 lines
1.5 KiB
ArmAsm
38 lines
1.5 KiB
ArmAsm
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//;Ensure that your assembly code complies with the Procedure Call Standard for the ARM Architecture (AAPCS).
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//;
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//;The AAPCS describes a contract between caller functions and callee functions. For example, for integer or pointer types, it specifies that:
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//;
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//; Registers R0-R3 pass argument values to the callee function, with subsequent arguments passed on the stack.
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//; Register R0 passes the result value back to the caller function.
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//; Caller functions must preserve R0-R3 and R12, because these registers are allowed to be corrupted by the callee function.
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//; Callee functions must preserve R4-R11 and LR, because these registers are not allowed to be corrupted by the callee function.
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//;
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//;For more information, see the Procedure Call Standard for the ARM Architecture (AAPCS).
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//;WARNING!!! logic instructions all affect flags despite the 's' postfix arm_none_eabi_gcc doesn't like 's' instructions
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//; but the 's' affect flag instructions are the only ones the M0 supports
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//; because of this, issue the following code isn't compatible with other cores.
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.globl jump2addr
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.p2align 2
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.type jump2addr,%function
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//;r0 - r3 contain function args (excess on stack)
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//;jump2addr( data_pb, spddir_len, swim_base, swim_mask);
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//;spddir_len = (SWIM_RD_LS<<16) | len;
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//; stream .req a1 this arg is moved to variable reg after stack push
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addr .req a1
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//; rv .req r0
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//; len .req a2
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//; swim_base .req a3
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//; swim_mask .req a4
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jump2addr: //;Function entry point.
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.fnstart
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//;bkpt
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blx r0
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.fnend
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