237 lines
6.1 KiB
Lua
237 lines
6.1 KiB
Lua
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-- create the module's table
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local cdream = {}
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-- import required modules
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local dict = require "scripts.app.dict"
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local nes = require "scripts.app.nes"
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local dump = require "scripts.app.dump"
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local flash = require "scripts.app.flash"
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-- file constants
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-- local functions
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local function wr_flash_byte(addr, value, debug)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xA0)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", addr, value)
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local rv = dict.nes("NES_CPU_RD", addr)
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local i = 0
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while ( rv ~= value ) do
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rv = dict.nes("NES_CPU_RD", addr)
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i = i + 1
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end
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if debug then print(i, "naks, done writing byte.") end
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end
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--base is the actual NES CPU address, not the rom offset (ie $FFF0, not $7FF0)
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local function wr_bank_table(base, entries)
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--CDREAMS needs to have a bank table present in each and every bank
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--it should also be at the same location in every bank
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--Perhaps it's possible to squeak by with only having it in the first bank as mojontales does..
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--doesn't actually matter what bank this gets written to, lets ensure we can get to bank zero
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wr_flash_byte(0x800C, 0x00)
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--select first bank relying on 0 to override 1 for bus conflict
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dict.nes("NES_CPU_WR", 0x800C, 0x00)
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--write bank table to selected bank
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local i = 0
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while( i < entries) do
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wr_flash_byte(base+i, i)
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i = i+1;
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end
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--need a zero value in each bank to get back to first bank
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wr_flash_byte(0x800C, 0x00) --first bank
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--now place one in all the other banks
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--first swap to next bank
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i = 1
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while( i < 16) do --16 banks total for 512KByte
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dict.nes("NES_CPU_WR", 0x0000, 0x00) --select first bank
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dict.nes("NES_CPU_WR", base+i, i) --jump to next bank
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wr_flash_byte(0x800C, 0x00) --write zero byte
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i = i + 1
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end
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end
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--Cart should be in reset state upon calling this function
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--this function processes all user requests for this specific board/mapper
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local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile)
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local rv = nil
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local file
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--initialize device i/o for NES
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dict.io("IO_RESET")
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dict.io("NES_INIT")
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--test cart by reading manf/prod ID
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if test then
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nes.detect_mapper_mirroring(true)
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print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))
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nes.read_flashID_prgrom_exp0(true)
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--enter software mode
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--CDREAMS connects CHR-ROM A13-16 to mapper bits 4-8
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--so need to set mapper register bits 4 & 5 properly to send unlock commands
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--A13 needs to be low to address CHR-ROM
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-- 15 14 13 12
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-- 0x5 = 0b 0 1 0 1 -> bank:0x20 $1555
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-- 0x2 = 0b 0 0 1 0 -> bank:0x10 $0AAA
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--TODO find bank table prior to doing this
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--or write to mapper without enabling PRG-ROM via exp0
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--tried DISCRETE_EXP0_MAPPER_WR function but didn't work...
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0xAA)
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dict.nes("NES_CPU_WR", 0x8000, 0x10)
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dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0x90)
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--read manf ID
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rv = dict.nes("NES_PPU_RD", 0x0000)
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if debug then print("attempted read CHR-ROM manf ID:", string.format("%X", rv)) end
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--read prod ID
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rv = dict.nes("NES_PPU_RD", 0x0001)
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if debug then print("attempted read CHR-ROM prod ID:", string.format("%X", rv)) end
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--exit software
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dict.nes("NES_PPU_WR", 0x0000, 0xF0)
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end
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--dump the cart to dumpfile
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if read then
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file = assert(io.open(dumpfile, "wb"))
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--TODO find bank table to avoid bus conflicts!
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--dump cart into file
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dump.dumptofile( file, 512, "CDREAM", "PRGROM", true )
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dump.dumptofile( file, 128, "CDREAM", "CHRROM", true )
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--close file
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assert(file:close())
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end
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--erase the cart
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if erase then
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print("\nerasing CDREAM");
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print("erasing PRG-ROM");
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x80)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
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dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x10)
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rv = dict.nes("NES_CPU_RD", 0x8000)
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local i = 0
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--TODO create some function to pass the read value
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--that's smart enough to figure out if the board is actually erasing or not
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while ( rv ~= 0xFF ) do
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rv = dict.nes("NES_CPU_RD", 0x8000)
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i = i + 1
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end
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print(i, "naks, done erasing prg.");
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print("erasing CHR-ROM");
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0xAA)
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dict.nes("NES_CPU_WR", 0x8000, 0x10)
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dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0x80)
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0xAA)
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dict.nes("NES_CPU_WR", 0x8000, 0x10)
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dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
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dict.nes("NES_CPU_WR", 0x8000, 0x20)
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dict.nes("NES_PPU_WR", 0x1555, 0x10)
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rv = dict.nes("NES_PPU_RD", 0x0000)
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i = 0
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while ( rv ~= 0xFF ) do
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rv = dict.nes("NES_PPU_RD", 0x0000)
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i = i + 1
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end
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print(i, "naks, done erasing chr.\n");
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end
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--program flashfile to the cart
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if program then
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--open file
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file = assert(io.open(flashfile, "rb"))
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--determine if auto-doubling, deinterleaving, etc,
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--needs done to make board compatible with rom
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--find bank table in the rom
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--write bank table to all banks of cartridge
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--Mojontales bank table is at $CC43 so hard code that for now
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wr_bank_table(0xCC43, 256)
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--flash cart
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-- flash.write_file( file, 32, "CDREAM", "PRGROM", true )
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-- flash.write_file( file, 128, "CDREAM", "CHRROM", true )
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--close file
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assert(file:close())
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end
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--verify flashfile is on the cart
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if verify then
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--for now let's just dump the file and verify manually
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file = assert(io.open(verifyfile, "wb"))
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--dump cart into file
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dump.dumptofile( file, 512, "CDREAM", "PRGROM", true )
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dump.dumptofile( file, 128, "CDREAM", "CHRROM", true )
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--close file
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assert(file:close())
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end
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dict.io("IO_RESET")
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end
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-- global variables so other modules can use them
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-- call functions desired to run when script is called/imported
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-- functions other modules are able to call
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cdream.process = process
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-- return the module's table
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return cdream
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