584 lines
24 KiB
C
584 lines
24 KiB
C
#ifndef _shared_dict_buffer_h
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#define _shared_dict_buffer_h
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//define dictionary's reference number in the shared_dictionaries.h file
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//then include this dictionary file in shared_dictionaries.h
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//The dictionary number is literally used as usb transfer request field
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//the opcodes and operands in this dictionary are fed directly into usb setup packet's wValue wIndex fields
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//=============================================================================================
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//=============================================================================================
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// BUFFER DICTIONARY
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//
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// opcodes contained in this dictionary must be implemented in firmware/source/buffer.c
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//
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//=============================================================================================
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//=============================================================================================
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//raw buffer banks & size
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//This determines the raw buffer sram space on avr at firmware compile time
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//one byte per bank is instantiated to keep track of that banks' allocation status
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//a buffer must be as large as one bank, but a buffer can consume multiple banks
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//only limit to buffer size is the buffer structure
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//current buffer structure utilizes a single byte for current byte counter
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//which limits to 256 bytes per buffer currently
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//having 16bit value support would expand this, or somehow shifting current byte
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//to account for multiple bytes could expand further
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//#define NUM_RAW_BANKS 8 // 8*32 = 256 bytes of buffer
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#define NUM_RAW_BANKS 16 //16*32 = 512 bytes of buffer
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//#define NUM_RAW_BANKS 24 //24*32 = 768 DAMN THE TORPEDOS FULL SPEED AHEAD!!!
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#define RAW_BANK_SIZE 32 //bank size in bytes
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//number of buffer objects
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//This controls number of static buffer objects instantiated in firmware at compile time
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//note this also controls opcodes created/supported by firmware
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//reducing number of buffers frees firmware sram by ~16bytes per buffer object
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//not much reason to have less than 2 atleast allow double buffering
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//so one can be getting loaded/unloaded by USB while other is dumping/flashing
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//current max is 8, but only really limited by opcode definitions to address all buffers
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//makes #ifdef code simpler to only allow buffer numbers that are power of 2
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//#define NUM_BUFFERS_2 2
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#define NUM_BUFFERS_4 4
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//#define NUM_BUFFERS_8 8
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//=============================================================================================
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// OPCODES with up to 24bit operand and optional return value besides SUCCESS/ERROR_CODE
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// PAYLOAD options listed as well
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//=============================================================================================
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// Detect this opcode/operand setup with opcode between the following defines:
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//
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//------------------------------------
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#define BUFF_OPCODE_NRV_MIN 0x00
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//opcodes in this range have NO RETURN besides error code and DON'T contain buff# in miscdata byte
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// ----------------------------
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#define BUFFN_INMISC_MIN 0x30 //NOTE OVERLAP!!
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//opcodes in this range have NO RETURN besides error code and DO contain buff# in miscdata byte
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#define BUFF_OPCODE_NRV_MAX 0x3F
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//------------------------------------
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#define BUFF_PAYLOADN_MIN 0x40
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//opcodes in this range are PAYLOADS and DO contain buff# in miscdata byte
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#define BUFF_PAYLOADN_MAX 0x4F
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//------------------------------------
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#define BUFF_OPCODE_RV_MIN 0x50
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//opcodes in this range HAVE RETURN besides error code and DO contain buff# in miscdata byte
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#define BUFFN_INMISC_MAX 0x5F //NOTE OVERLAP!!
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// ----------------------------
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//opcodes in this range HAVE RETURN value plus error code and DON'T contain buff# in miscdata byte
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#define BUFF_OPCODE_RV_MAX 0x6F
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//------------------------------------
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#define BUFF_PAYLOAD_MIN 0x70
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//opcodes in this range are PAYLOADS and DO NOT contain buff# in miscdata byte
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#define BUFF_PAYLOAD_MAX 0x7F
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//=============================================================================================
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//=============================================================================================
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//------------------------------------------------------------------------------------------------
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//opcodes in this range have NO RETURN besides error code and DON'T contain buff# in miscdata byte
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//#define BUFF_OPCODE_NRV_MIN 0x00-2F
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//------------------------------------------------------------------------------------------------
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//blindly clear all allocation of raw buffer space
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//reset all buffers to unallocated
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//no operands no return value
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#define RAW_BUFFER_RESET 0x00
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//------------------------------------------------------------------------------------------------
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//opcodes in this range have NO RETURN besides error code and DO contain buff# in miscdata byte
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//#define BUFFN_INMISC_MIN 0x30-3F //NOTE OVERLAP!!
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//------------------------------------------------------------------------------------------------
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//SET BUFFER ELEMENTS
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//memory type and part number
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//miscdata: buffer number
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//operMSB: memory type
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//operLSB: part number
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#define SET_MEM_N_PART 0x30
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//operand MSB memtype
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#define PRGROM 0x10
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#define CHRROM 0x11
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#define PRGRAM 0x12
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#define SNESROM 0x13
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#define SNESRAM 0x14
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//Read specific sections of memory map
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// 4KB/1KB naming designates the granularity of the starting address
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// Any amount can be read, but unexpected behavior will result when reading past memory map limits
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// designate the address base with mapper since this read is mapper independent
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#define NESCPU_4KB 0x20 //mapper (bits 3-0) specifies A12-15 (4bits)
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#define NESPPU_1KB 0x21 //mapper (bits 5-2) specifies A10-13 (4bits)
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//DON'T WANT TO USE THESE ANY MORE, USE THE PAGE VERSIONS BELOW
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//since the types above only specify the granularity of the read, there is no reason
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//to limit it to 1-4KByte. May as well give page granularity and use the whole mapper byte!
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#define NESCPU_PAGE 0x22 //mapper byte specifies A15-8
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#define NESPPU_PAGE 0x23 //mapper byte specifies A13-8 bits 6 & 7 can't be set
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#define SNESROM_PAGE 0x24 //mapper byte specifies A15-8 ROMSEL low
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#define SNESSYS_PAGE 0x25 //mapper byte specifies A15-8 ROMSEL high
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#define GAMEBOY_PAGE 0x26 //mapper byte specifies A15-8
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#define GBA_ROM_PAGE 0x27 //address must have already been latched with gba dictionary
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#define GENESIS_ROM_PAGE0 0x28 //bank address A17-23 must have been latched already
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//TODO come up with better way to handle genesis address complications
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#define GENESIS_ROM_PAGE1 0x29 //bank address A17-23 must have been latched already
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#define N64_ROM_PAGE 0x30
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#define NESPPU_1KB_TOGGLE 0x31 //similar to PPU page read but /RD signal toggles with each read
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#define NESCPU_4KB_TOGGLE 0x32 //similar to CPU page read but M2 toggles with each read
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//operand LSB
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//SST 39SF0x0 manf/prod IDs
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#define SST_MANF_ID 0xBF
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#define SST_PROD_128 0xB5
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#define SST_PROD_256 0xB6
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#define SST_PROD_512 0xB7
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//SRAM manf/prod ID
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#define SRAM 0xAA
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//MASK ROM read only
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#define MASKROM 0xDD
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//set multiple and add multiple
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//miscdata: buffer number
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//operMSB: multiple
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//operLSB: add multiple
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#define SET_MULT_N_ADDMULT 0x31
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//set mapper and mapper variant
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//miscdata: buffer number
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//operMSB: mapper
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//operLSB: mapper variant
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#define SET_MAP_N_MAPVAR 0x32
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//operand MSB mapper
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#define NROM 0
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#define MMC1 1
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#define UxROM 2
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#define CNROM 3
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#define MMC3 4
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#define MMC5 5
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#define AxROM 7
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#define MMC2 9
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#define MMC4 10
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#define CDREAM 11
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#define CNINJA 12 //not actually mapper 12, just a temp mapper assignment
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#define A53 28
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#define MAP30 30
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#define EZNSF 31
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#define BxROM 34
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#define RAMBO 64
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#define H3001 65 //IREM mapper
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#define GxROM 66
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#define SUN3 67
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#define SUN4 68
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#define FME7 69 //SUNSOFT-5 with synth
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#define HDIVER 78
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#define GTROM 111
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#define DxROM 205
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#define MM2 253
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#define DPROM 254 //just a random mapper number for whatever I need it for
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// UNKNOWN 255 don't assign to something meaningful
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//operand LSB mapper variant
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#define NOVAR 0
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#define LOROM 0
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#define HIROM 1 //file starts at bank 40 and is mirrored to C0
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#define EXHIROM 2 //file starts at bank C0
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#define SOROM 3 //12MB star ocean mapping
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#define LOROM_5VOLT 4 //Catskull 5v SNES board with SST PLCC flash
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#define HIROM_5VOLT 5
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#define LOROM_3VOLT 6
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#define HIROM_3VOLT 7
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//set function
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//miscdata: buffer number
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//operMSB: (might be needed if this is a ponter..?) or might need more than one function def..
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//operLSB: function
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#define SET_FUNCTION 0x33
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//#define BUFF_OPCODE_NRV_MAX 0x3F
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//------------------------------------------------------------------------------------------------
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//opcodes in this range are PAYLOADS and DO contain buff# in miscdata byte
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//#define BUFF_PAYLOADN_MIN 0x40-4F
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//------------------------------------------------------------------------------------------------
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//designate what buffer to fill with miscdata byte
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//no return value as it's write OUT only
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//operandMSB:LSB actually contains first 2 bytes
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#define BUFF_OUT_PAYLOADN_2B_INSP 0x40
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//designate what buffer to fill/read with miscdata byte
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#define BUFF_PAYLOADN 0x41
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//#define BUFF_PAYLOADN_MAX 0x4F
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//------------------------------------------------------------------------------------------------
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//opcodes in this range HAVE RETURN besides error code and DO contain buff# in miscdata byte
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//#define BUFF_OPCODE_RV_MIN 0x50-5F
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//------------------------------------------------------------------------------------------------
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//return buffer elements
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//misc/data: buffer number
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#define GET_PRI_ELEMENTS 0x50 //RL=8
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//rv0: success/error code
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//rv1: rdatalen = 6
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//rv2: last_idx
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#define BUFF_LASTIDX 1
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//rv3: status
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#define BUFF_STATUS 2
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//rv4: cur_byte
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#define BUFF_CURBYTE 3
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//rv5: reload
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#define BUFF_RELOAD 4
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//rv6: id
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#define BUFF_ID 5
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//rv7: function
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#define BUFF_FUNC 6
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//return buffer elements
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//misc/data: buffer number
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#define GET_SEC_ELEMENTS 0x51 //RL=8
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//rv0: success/error code
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//rv1: rdatalen = 6
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//rv2: mem_type
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#define BUFF_MEMTYPE 1
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//rv3: part_num
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#define BUFF_PARTNUM 2
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//rv4: multiple
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#define BUFF_MUL 3
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//rv5: add_multiple
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#define BUFF_ADDMUL 4
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//rv6: mapper
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#define BUFF_MAPPER 5
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//rv7: mapvar
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#define BUFF_MAPVAR 6
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//return buffer elements
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//misc/data: buffer number
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#define GET_PAGE_NUM 0x52 //RL=4
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//rv0: success/error code
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//rv1: rdatalen = 2
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//rv3-2: 16bit page number
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//#define BUFFN_INMISC_MAX 0x5F //NOTE OVERLAP!!
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//------------------------------------------------------------------------------------------------
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//opcodes in this range HAVE RETURN value plus error code and DON'T contain buff# in miscdata byte
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// 0x60-6F
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//------------------------------------------------------------------------------------------------
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//send bank number and read back it's status
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//0xFF-UNALLOC
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//gets assigned buffer ID number when allocated
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//operandMSB/miscdata: unused
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//operandLSB: raw bank number to retrieve status of
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//return value status of that raw bank (set to bank id if allocated)
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#define GET_RAW_BANK_STATUS 0x60 //RL=3
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//buffer/operation status values
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#define EMPTY 0x00
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#define RESET 0x01
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#define PROBLEM 0x10
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#define PREPARING 0x20
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#define USB_UNLOADING 0x80
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#define USB_LOADING 0x90
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#define USB_FULL 0x98
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#define CHECKING 0xC0
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#define DUMPING 0xD0
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#define STARTDUMP 0xD2
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#define DUMPED 0xD8
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#define ERASING 0xE0
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#define FLASHING 0xF0
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#define STARTFLASH 0xF2
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#define FLASHED 0xF4
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#define FLASH_WAIT 0xF8
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#define STOPPED 0xFE
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#define UNALLOC 0xFF
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//retrieve cur_buff status
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#define GET_CUR_BUFF_STATUS 0x61 //RL=3
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//#define BUFF_OPCODE_RV_MAX 0x6F
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//------------------------------------------------------------------------------------------------
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//opcodes in this range are PAYLOADS and DO NOT contain buff# in miscdata byte
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//#define BUFF_PAYLOAD_MIN 0x70-7F
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//------------------------------------------------------------------------------------------------
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//does NOT designate what buffer to fill with opcode
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//endpoint direction determines if read/write
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//no operands no return value aside from payload for transfer IN
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//max size for these transfers is 254Bytes for IN and OUT
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#define BUFF_PAYLOAD 0x70
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//does NOT designate what buffer to fill with opcode
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//no return value as it's write OUT only
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//operandMSB:LSB actually contains first 2 bytes
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#define BUFF_OUT_PAYLOAD_2B_INSP 0x71
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//#define BUFF_PAYLOAD_MAX 0x7F
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//=============================================================================================
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// OPCODES with up to 24bit operand and no return value besides SUCCESS/ERROR_CODE
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// BUFFER NUMBER denoted in lower nibble of opcode
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//=============================================================================================
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// Detect this opcode group which uses 3 LSbits to determine which buffer to call
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#define BUFF_OPCODE_BUFN_MIN 0x80
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#define BUFF_OPCODE_BUFN_MAX 0xFF
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//
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//
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// Detect this opcode/operand setup with opcode between the following defines:
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#define BUFF_OPCODE_BUFN_NRV_MIN 0x80
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#define BUFF_OPCODE_BUFN_NRV_MAX 0xBF
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//
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#define BUFF_OPCODE_BUFN_RV_MIN 0xC0
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#define BUFF_OPCODE_BUFN_RV_MAX 0xEF
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//
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#define BUFF_OPCODE_PAYLOAD_MIN 0xF0
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#define BUFF_OPCODE_PAYLOAD_MAX 0xFF
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//=============================================================================================
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//=============================================================================================
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//allocate firmware sram to a buffer
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//send a buffer number
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//buffer size
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//base address 0-255 (in 32byte chunks)
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//returns SUCCESS if able to allocate
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//returns error code if unable to allocate
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//operMSB: id to give to new buffer
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// (upper id bits used to set any address bits not covered by page and buff size if needed)
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//operLSB: base bank number
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//misc/data: size (number of banks to allocate to buffer)
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// -size doesn't get stored in buffer, the last_idx does
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#define ALLOCATE_BUFFER0 0x80
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#define ALLOCATE_BUFFER1 0x81
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#define ALLOCATE_BUFFER2 0x82
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#define ALLOCATE_BUFFER3 0x83
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#define ALLOCATE_BUFFER4 0x84
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#define ALLOCATE_BUFFER5 0x85
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#define ALLOCATE_BUFFER6 0x86
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#define ALLOCATE_BUFFER7 0x87
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//SET BUFFER ELEMENTS
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//set reload and page_num
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//misc/data reload
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//operMSB:LSB page_num (16 bit)
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#define SET_RELOAD_PAGENUM0 0x90
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#define SET_RELOAD_PAGENUM1 0x91
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#define SET_RELOAD_PAGENUM2 0x92
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#define SET_RELOAD_PAGENUM3 0x93
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#define SET_RELOAD_PAGENUM4 0x94
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#define SET_RELOAD_PAGENUM5 0x95
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#define SET_RELOAD_PAGENUM6 0x96
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#define SET_RELOAD_PAGENUM7 0x97
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//designate what buffer to fill with opcode
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//endpoint direction determines if read/write
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//no operands no return value aside from payload for transfer IN
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//DOES NOT STUFF extra bytes in setup packet for write/OUT transfers
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#define BUFF_PAYLOAD0 0xF0
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#define BUFF_PAYLOAD1 0xF1
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#define BUFF_PAYLOAD2 0xF2
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#define BUFF_PAYLOAD3 0xF3
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#define BUFF_PAYLOAD4 0xF4
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#define BUFF_PAYLOAD5 0xF5
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#define BUFF_PAYLOAD6 0xF6
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#define BUFF_PAYLOAD7 0xF7
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//~16 bytes per buffer...
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//as initially defined in firmware
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//typedef struct buffer{
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// uint8_t *data; //pointer to base buffer's allocated sram
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// uint8_t last_idx; //index of last byte in buffer used to determine when at end of buffer
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// uint8_t status; //current status of buffer USB load/unload, flashing, waiting, erase
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// uint8_t cur_byte; //byte currently being loaded/unloaded/flashed/read
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// uint8_t reload; //add this number to page_num for next loading
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// uint8_t id; //address bits between buffer size and page number
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// //ie need 2x128 byte buffers making buff_num = A7
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// //ie need 4x64 byte buffers making buff_num = A7:6
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// //ie need 8x32 byte buffers making buff_num = A7:5
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// //CANNOT BE 0xFF "UNALLOC"
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// uint16_t page_num; //address bits beyond buffer's size and buff_num A23-A8
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// //MSB A23-16, LSB A15-8
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// uint8_t mem_type; //SNES ROM, SNES RAM, PRG ROM, PRG RAM, CHR ROM, CHR RAM, CPLD, SPI
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// uint8_t part_num; //used to define unlock commands, sector erase, etc
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// uint8_t multiple; //number of times to program this page
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// uint8_t add_mult; //add this number to page_num for multiple programs
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// //CHR shift LSb to A13 (max 2MByte)
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// //PRG shift LSb to A14 (max 4MByte)
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// //SNES add to MSB of page_num (max 16MByte)
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// uint8_t mapper; //mapper number of board
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// uint8_t mapvar; //mapper variant
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// uint8_t function; //function "pointer" for flash/dump operation control
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//}buffer;
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//buffer struct
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//designed to have multiple buffers instantiated at a time
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//buffers are effectively objects who get instructed by host
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//commands include things like reading from cartridge rom/ram
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//getting filled by usb writes, programming 'themselves' to
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//where they belong on the cartridge. They know how to get
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//on/off the cart and have a current status that the host can
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//query. Host then decides when to refill/dump data from
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//buffer over usb. Host also can query buffer to get error
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//codes back and and attempt to resolve issues. Buffers can
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//also be instructed to verify themselves with a checksum
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//They can verify themselves against cart rom/ram as well.
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//atmega164 has 1KByte of SRAM
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//VUSB has max of 254 + wValue/wIndex = max 256 bytes without long transfers
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//Expecting two 128 byte buffers will be faster than a single 256byte buffer
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//That way one buffer could be flashing onto the cart while the other is
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//getting filled 8bytes at a time from USB. this would proide some double
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//buffering speed ups, but not sure how fast that'll be. Having buffers
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//as small as 32bytes might be faster for 4-8MB flash memories as they
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//have ability to flash 32Bytes at once. Could perhaps fill multiple
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//32B buffers with one larger 128/256B transfer. Increasing transfer size
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//does speed up overall due to fewer setup and status USB packets.
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//USB control transfer:
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// SETUP/DATA STAGES:
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// Token packet- sync, pid, addr, enp, crc5, eop = 35bits
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// Data/setup packet
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// sync, pid, crc16, eop = 67bits
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// setup/payload packet data = 64bits
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// handsk (sync, pid, eop) = 19bit
|
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// total = 185bits with 64bit payload = 34.6% data utilization per data packet
|
|
// STATUS STAGE:
|
|
// same as above, but zero lenght data packet.
|
|
// total 121bits
|
|
|
|
// 8byte total payload
|
|
// 185 setup + 185 data + 121 status = 491 bits transferred for 64bit payload = 13.03% bus utilization
|
|
|
|
// 32byte total payload
|
|
// 185 setup + 4*185 data + 121 status = 1046 bits xfrd for 4*64=256 payld = 24.47% bus util
|
|
|
|
// 64byte total payload
|
|
// 185 setup + 8*185 data + 121 status = 1786 bits xfrd for 8*64=512 payld = 28.67% bus util
|
|
|
|
// 128byte total payload
|
|
// 185 setup + 16*185 data + 121 status = 3266 bits xfrd for 16*64=1024 payld = 31.35% bus util
|
|
|
|
// 254byte total payload
|
|
// 185 setup + 32*185-16 data + 121 status = 6210 bits xfrd for 31.8*64=2032 payld = 32.72% bus util
|
|
// 4.4% speedup than 128
|
|
|
|
// 256bytes in 254byte xfr
|
|
// 185 setup + 32*185-16 data + 121 status = 6210 bits xfrd for 32*64=2048 payld = 32.98% bus util
|
|
// 0.79% speedup than 254 in 254
|
|
|
|
// 256byte total payload
|
|
// 185 setup + 32*185 data + 121 status = 6226 bits xfrd for 32*64=2048 payld = 32.89% bus util
|
|
|
|
// 512byte total payload
|
|
// 185 setup + 64*185 data + 121 status = 12146 bits xfrd for 64*64=4096 payld = 33.72% bus util
|
|
// 1% greater bus util compared to 254byte xfr
|
|
// 2.2% speedup compared to 256 in 254
|
|
|
|
// USB 1.1 Low speed 1.5Mbps
|
|
// maximum theoretical bus utiliation with transfers styles above
|
|
// 1.5Mbps * 33% utilization = 495Kbps = 61.8KBps
|
|
// Will never get to this maximum, as this assumes that bus is in use 100% of the time with no
|
|
// delays waiting for responses etc. But gives sense of scale for what's possible
|
|
|
|
// Probably decent overall speedup by eliminating multiple status packets. Not sure how many
|
|
// NAK's the old firmware was sending while the device programmed the entire 256byte buffer.
|
|
// but one NAK is more than should be necessary.
|
|
//
|
|
// Plan is to support max of 254 byte transfers with 2 bytes stuffed in setup packet
|
|
// Want to compare to 512B long transfers for speed comparison
|
|
//
|
|
// Either way, I can setup the buffers in smaller sizes than the transfers. Then a buffer could
|
|
// start programming mid usb transfer once it's full. Want to make effor to hide flash programming
|
|
// wait time behind usb transfer time.
|
|
|
|
// some speed testing with 16bit return length variable:
|
|
// 128Byte OUT (write) transfers with long transfers DISABLED: 20.04sec/512KByte = 25.55KBps
|
|
// 128Byte OUT (write) transfers with long transfers ENABLED: 20.7 sec/512KByte = 24.7 KBps
|
|
// 256Byte OUT (write) transfers with long transfers ENABLED: 18.56sec/512KByte = 27.6 KBps
|
|
// 254Byte OUT (write) transfers with long transfers DISABLED: 17.9 sec/512KByte = 28.6 KBps (assuming 2 bytes stuffed in setup packet)
|
|
// 128Byte IN (read) with long xfr DISABLED, w/o usbFuncRd: 30.5 sec/512KByte = 16.8 KBps
|
|
//with read data dumping operations and file writing: 128Byte IN 32.25sec/512KByte = 15.8 KBps only 1KBps lost due to dumping operation
|
|
// 128Byte IN (read) with long xfr DISABLED, w/usbFuncRd: 34.9 sec/512KByte = 14.7 KBps
|
|
// 1033*254Byte IN (read) long xfr DISABLED, w/o usbFuncRd: 28.35sec/512KByte = 18.1 KBps
|
|
//
|
|
// after concluding that would not be using long transfers, the return length variable
|
|
// was reduced to 8bits (single byte unsigned int) and slight improvement was found:
|
|
// 254Byte OUT (write) transfers with long transfers DISABLED: 17.5 sec/512KByte = 29.2 KBps (assuming 2 bytes stuffed in setup packet)
|
|
//
|
|
// adding a few checks to usbFunctionWrite to ensure buffer is proper status and not won't be overflowed
|
|
// presented small reduction in speed:
|
|
// 254Byte OUT (write) transfers with long transfers DISABLED: 18.1 sec/512KByte = 28.4 KBps (assuming 2 bytes stuffed in setup packet)
|
|
//
|
|
// These tests did nothing with payload once it arrived, so these are practical maximums of V-usb.
|
|
// Conclusion:
|
|
// -enabling long transfers slows writes (and probably reads)
|
|
// -reads are much slower than writes.
|
|
// found a vusb forum thread quoting 22KBps reads at transfer size of 200bytes
|
|
// he was using atmega16 with 12Mhz clock, so doesn't look like we can
|
|
// replicate this even with our 'better' conditions. But our
|
|
// writes are exceeding his 24KBps transfer speeds so we'll take it..
|
|
// https://forums.obdev.at/viewtopic.php?t=3059
|
|
// -enabling usbFunctionRead is slower compared to using usbFunctionSetup alone.
|
|
// -using 254B xfrs with 2 bytes stuffed in setup packet gives decent boost for writes.
|
|
// this is primarily due to speed up of not having long transfers enabled.
|
|
// -not actually certain enabling long transfers will slow down reads, but it certainly does for writes.
|
|
// -reads can't stuff 2 bytes in setup packet because data is going opposite direction as setup packet.
|
|
// -reads do have decent speed boost of ~1.3KBps using 254B * 1033xfrs over 128*2048xfrs
|
|
// for reads to get this speed boost the missing 2 bytes would have to be accumulated in
|
|
// separate buffer and sent separately once full.
|
|
// Only other way without complicating dump algo would be to implement usbFuncRd
|
|
// but that would slow things down and negate the speed boost..
|
|
//
|
|
// Speed testing with old firmware and app:
|
|
// fairly certain these were long transfers of 256 bytes each
|
|
// 512KB write 30.2sec = 16.7KBps
|
|
// 512KB read 34.2sec = 15.0KBps
|
|
//
|
|
// Haven't tested for comparison's sake, but original anago/unagi firmware/app was even slower I believe
|
|
// Found quote of Memblers finding ~19sec for 128KB PRG-ROM = 6.7KBps for reads...
|
|
// So shouldn't be hard to beat those speeds
|
|
//
|
|
// Checking SST 39SF040 datasheet, the byte program time is max 20usec * 256B page = 5.12usec per page
|
|
// We have some additional CPU execution time overhead above that 5.12usec per page
|
|
// but that shouldn't be significant in comparison, still lots of margin to meet 50usec usbPoll requirement
|
|
// if slow down is noticed during flashing/dumping may be helpful to call usbPoll mid page so
|
|
// the next data packet doesn't have to wait for the last page to complete before it can be accepted/sent
|
|
// to/from the driver.
|
|
//
|
|
// Sector erases are maximum of 25usec however which should probably be avoided or used with caution
|
|
// between usbPoll. However exiting back to main and continuing to poll USB and erasure should be fine
|
|
// as erasing doesn't have to be monitored.
|
|
//
|
|
// Chip erasure is max of 100usec which will most certainly violate 50usec usbPoll req't so make sure
|
|
// we don't sit and spin waiting for chip to erase without calling usbPoll...
|
|
//
|
|
// SNES 4-8MB chip erasure is on the order of 30sec so certainly need to be considerate of flash timing
|
|
// depending on the chip in use. Avoiding SNES chip erasure when possible presents large chance for
|
|
// speedup!
|
|
//
|
|
|
|
|
|
#endif
|