136 lines
4.7 KiB
C
136 lines
4.7 KiB
C
#ifndef _pindef_h
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#define _pindef_h
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//--------------------------------------------------
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// PIN and PORT Definitions
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// gives easier/more abstract access
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// to I/O reading on host
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// the dictionaries only provide access to
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// read a byte wide port for speed and simplicity
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// of code on firmware. The host must decode
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// these bytes to get desired pin data
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// these are copied from firmware pinport.h
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// then adjusted to work in host setting
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//--------------------------------------------------
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//To utilize these macros first make a dictionary call and provide the <PIN>_RD opcode
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//This is effectively just using the CTL_RD/AUX_RD opcode but easier bc you don't have
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//to remember what pin is on which port.
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//Store the result of that dictionary call in a byte
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//This is currently the second byte returned as the first one is the error code
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//Then mask the return data byte with <PIN>_MSK
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//If result is 0 pin is low, if equal to <PIN>_MSK (not zero) pin is high
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//first make it so we don't have to remember what port the io resides on
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//these don't work if the ddr wasn't set to i/p before hand
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//these are simply macros to call the dictionary entry in shared_dict_pinport.h
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//these become new opcodes which the host can use to call the underlying PIN READ
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//they will return the byte wide PIN register which then must be masked to get
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//the specific io desired
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#define M2_RD CTL_RD
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#define ROMSEL_RD CTL_RD
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//#define PRGRW_RD CTL_RD broke due to redefine PRGRW_RD sets pin low
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#define FREE_RD CTL_RD
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#define CSRD_RD CTL_RD
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#define CSWR_RD CTL_RD
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#define CICE_RD CTL_RD
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#define AHL_RD CTL_RD
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#define EXP0_RD AUX_RD
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#define FC_APU_RD AUX_RD
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#define TDO_RD AUX_RD
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#define SRST_RD AUX_RD
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#define LED_RD AUX_RD
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#define EXP9_RD AUX_RD
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#define IRQ_RD AUX_RD
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#define CIA10_RD AUX_RD
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#define BL_RD AUX_RD
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#define AXLOE_RD AUX_RD
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//Now we need a mask for the io's place in the return byte
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//This was copied from firmware's pinport.h
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//then _MSK prefix to pin name to make the fact this is a mask obvious
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//in place of PC#/PD# which only makes sense to avr-gcc place the hex mask equivalent
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//============================
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//CTL PORTC
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//============================
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#define M2_MSK 0x01 //PC0 //NES, FC, & SNES (SYSCLK)
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#define ROMSEL_MSK 0x02 //PC1 //(aka PRG/CE) NES, FC, & SNES
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#define PRGRW_MSK 0x04 //PC2 //PRG R/W on NES & FC
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//#ifdef PURPLE_KAZZO
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#define p_AXL_MSK 0x08 //PC3 //EXP FF CLK on purple boards
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//#else
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#define FREE_MSK 0x08 //PC3 //Free pin on all other boards
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//#endif
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#define CSRD_MSK 0x10 //PC4 //NES & FC CHR /RD, SNES /RD
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#define CSWR_MSK 0x20 //PC5 //NES & FC CHR /WR, SNES /WR
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#define CICE_MSK 0x40 //PC6 //NES & FC CIRAM /CE, most carts are 2screen tying this to CHR /A13 making this an I/P
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//#ifdef GREEN_KAZZO
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#define g_AXHL_MSK 0x80 //PC7 //Both ADDR_MID & EXP/ADDRHI FF CLK on green prototype
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//#else
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#define AHL_MSK 0x80 //PC7 //ADDR MID FF CLK per orig kazzo design
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//#endif
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//============================
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//AUX PORTD
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//============================
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#define EXP0_MSK 0x01 //PD0 //NES EXP0 controls a number of varying flash cart features...
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#define FC_APU_MSK 0x01 //PD0 //FC Audio in cart from 2A03 APU
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#define TDO_MSK 0x01 //PD0 //CPLD JTAG on INL-ROM NES/FC boards released after ~Oct2016
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#define SRST_MSK 0x01 //PD0 //SNES /RESET pin used for CPLD prgm/play mode and SRAM CE
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#define LED_MSK 0x02 //PD1 //LED on INL retro prog-dumper
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#define EXP9_MSK 0x02 //PD1 //NES dual purposed pin
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#define USBP_MSK 0x04 //PD2 //USB D+ don't touch this pin!
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#define IRQ_MSK 0x08 //PD3 //Connected to NES, FC, & SNES
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#define USBM_MSK 0x10 //PD4 //USB D- don't touch this pin!
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#define CIA10_MSK 0x20 //PD5 //NES & FC CIRAM A10 (aka VRAM A10)
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#define BL_MSK 0x40 //PD6 //Bootloader switch BL->GND, RUN->float
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//#ifdef PURPLE_KAZZO
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#define pg_XOE_MSK 0x80 //PD7 //EXP/ADDRHI FF /OE pin on purple and green boards
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//#endif
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//#ifdef GREEN_KAZZO
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#define pg_XOE_MSK 0x80 //PD7 //EXP/ADDRHI FF /OE pin on purple and green boards
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//#endif
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//#ifndef pg_XOE //FINAL_DESIGN
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#define AXLOE_MSK 0x80 //PD7 //EXP/ADDRHI FF CLK & /OE pin on final board versions
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//#endif
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//The following macros help locate control signals behind flipflops
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//To set/clear these signals call the dictionary flipflop's opcode with this value
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//note all 8 pins get set at once must and/or in values to a host variable
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//if trying to maintain value of other signals
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//pin masks for where signal resides on ADDRH flipflop
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#define PPU_A13N_MSK 0x80
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#define PPU_A13_MSK 0x20
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//EXP FF connects D7:0 to EXP8:1 so everything is shifted one bit
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//0b8765 4321
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#define EXP8_MSK 0x80
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#define EXP7_MSK 0x40
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#define FC_RF_MSK 0x20
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#define EXP6_MSK 0x20
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#define EXP5_MSK 0x10
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#define EXP4_MSK 0x08
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#define EXP3_MSK 0x04
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#define EXP2_MSK 0x02
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#define EXP1_MSK 0x01
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#endif
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