221 lines
9.6 KiB
C
221 lines
9.6 KiB
C
#ifndef _shared_dict_buffer_h
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#define _shared_dict_buffer_h
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//define dictionary's reference number in the shared_dictionaries.h file
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//then include this dictionary file in shared_dictionaries.h
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//The dictionary number is literally used as usb transfer request field
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//the opcodes and operands in this dictionary are fed directly into usb setup packet's wValue wIndex fields
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//=============================================================================================
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//=============================================================================================
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// BUFFER DICTIONARY
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//
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// opcodes contained in this dictionary must be implemented in firmware/source/buffer.c
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//
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//=============================================================================================
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//=============================================================================================
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//raw buffer banks & size
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//This determines the raw buffer sram space on avr at firmware compile time
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//one byte per bank is instantiated to keep track of that banks' allocation status
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//a buffer must be as large as one bank, but a buffer can consume multiple banks
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//only limit to buffer size is the buffer structure
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//current buffer structure utilizes a single byte for current byte counter
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//which limits to 256 bytes per buffer currently
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//having 16bit value support would expand this, or somehow shifting current byte
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//to account for multiple bytes could expand further
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#define NUM_RAW_BANKS 8 // 8*32 = 256 bytes of buffer
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//#define NUM_RAW_BANKS 16 //16*32 = 512 bytes of buffer
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#define RAW_BANK_SIZE 32 //bank size in bytes
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//number of buffer objects
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//This controls number of static buffer objects instantiated in firmware at compile time
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//note this also controls opcodes created/supported by firmware
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//reducing number of buffers frees firmware sram by ~16bytes per buffer object
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//not much reason to have less than 2 atleast allow double buffering
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//so one can be getting loaded/unloaded by USB while other is dumping/flashing
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//current max is 8, but only really limited by opcode definitions to address all buffers
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//makes #ifdef code simpler to only allow buffer numbers that are power of 2
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//#define NUM_BUFFERS_2 2
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//#define NUM_BUFFERS_4 4
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#define NUM_BUFFERS_8 8
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//defined here so identical to host and firmware
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//status values
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#define EMPTY 0x00
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#define PROBLEM 0x10
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#define USB_UNLOADING 0x80
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#define USB_LOADING 0x90
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#define CHECKING 0xC0
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#define DUMPING 0xD0
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#define ERASING 0xE0
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#define FLASHING 0xF0
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#define FLASH_WAIT 0xF8
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#define UNALLOC 0xFF
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//=============================================================================================
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// OPCODES with up to 24bit operand and no return value besides SUCCESS/ERROR_CODE
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//=============================================================================================
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// Detect this opcode/operand setup with opcode between the following defines:
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#define BUFF_OPCODE_NRV_MIN 0x00
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#define BUFF_OPCODE_NRV_MAX 0x3F
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//
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#define BUFF_OPCODE_RV_MIN 0x40
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#define BUFF_OPCODE_RV_MAX 0x7F
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//=============================================================================================
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//=============================================================================================
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//blindly clear all allocation of raw buffer space
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//reset all buffers to unallocated
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#define RAW_BUFFER_RESET 0x00
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//send bank number and read back it's status
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//0xFF-UNALLOC
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//gets assigned buffer ID number when allocated
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#define RAW_BANK_STATUS 0x40
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//=============================================================================================
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// OPCODES with up to 24bit operand and no return value besides SUCCESS/ERROR_CODE
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// BUFFER NUMBER denoted in lower nibble of opcode
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//=============================================================================================
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// Detect this opcode group which uses 3 LSbits to determine which buffer to call
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#define BUFF_OPCODE_BUFN_MIN 0x80
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#define BUFF_OPCODE_BUFN_MAX 0xFF
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//
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// Detect this opcode/operand setup with opcode between the following defines:
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#define BUFF_OPCODE_BUFN_NRV_MIN 0x80
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#define BUFF_OPCODE_BUFN_NRV_MAX 0xBF
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//
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#define BUFF_OPCODE_BUFN_RV_MIN 0xC0
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#define BUFF_OPCODE_BUFN_RV_MAX 0xFF
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//=============================================================================================
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//=============================================================================================
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//allocate firmware sram to a buffer
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//send a buffer number
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//buffer size
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//base address 0-255 (in 32byte chunks)
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//returns SUCCESS if able to allocate
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//returns error code if unable to allocate
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#define ALLOCATE_BUFFER0 0x80
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#define ALLOCATE_BUFFER1 0x81
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#define ALLOCATE_BUFFER2 0x82
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#define ALLOCATE_BUFFER3 0x83
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#define ALLOCATE_BUFFER4 0x84
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#define ALLOCATE_BUFFER5 0x85
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#define ALLOCATE_BUFFER6 0x86
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#define ALLOCATE_BUFFER7 0x87
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//~16 bytes per buffer...
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//as initially defined in firmware
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//typedef struct buffer{
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// uint8_t *data; //pointer to base buffer's allocated sram
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// uint8_t size; //size of buffer in bytes (max 256 bytes)
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// uint8_t status; //current status of buffer USB load/unload, flashing, waiting, erase
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// uint8_t cur_byte; //byte currently being loaded/unloaded/flashed/read
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// uint8_t reload; //add this number to page_num for next loading
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// uint8_t id; //address bits between buffer size and page number
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// //ie need 2x128 byte buffers making buff_num = A7
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// //ie need 4x64 byte buffers making buff_num = A7:6
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// //ie need 8x32 byte buffers making buff_num = A7:5
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// //CANNOT BE 0xFF "UNALLOC"
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// uint16_t page_num; //address bits beyond buffer's size and buff_num A23-A8
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// //MSB A23-16, LSB A15-8
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// uint8_t mem_type; //SNES ROM, SNES RAM, PRG ROM, PRG RAM, CHR ROM, CHR RAM, CPLD, SPI
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// uint8_t part_num; //used to define unlock commands, sector erase, etc
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// uint8_t multiple; //number of times to program this page
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// uint8_t add_mult; //add this number to page_num for multiple programs
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// //CHR shift LSb to A13 (max 2MByte)
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// //PRG shift LSb to A14 (max 4MByte)
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// //SNES add to MSB of page_num (max 16MByte)
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// uint8_t mapper; //mapper number of board
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// uint8_t mapvar; //mapper variant
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// uint8_t function; //function "pointer" for flash/dump operation control
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//}buffer;
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//buffer struct
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//designed to have multiple buffers instantiated at a time
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//buffers are effectively objects who get instructed by host
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//commands include things like reading from cartridge rom/ram
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//getting filled by usb writes, programming 'themselves' to
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//where they belong on the cartridge. They know how to get
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//on/off the cart and have a current status that the host can
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//query. Host then decides when to refill/dump data from
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//buffer over usb. Host also can query buffer to get error
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//codes back and and attempt to resolve issues. Buffers can
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//also be instructed to verify themselves with a checksum
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//They can verify themselves against cart rom/ram as well.
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//atmega164 has 1KByte of SRAM
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//VUSB has max of 254 + wValue/wIndex = max 256 bytes without long transfers
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//Expecting two 128 byte buffers will be faster than a single 256byte buffer
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//That way one buffer could be flashing onto the cart while the other is
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//getting filled 8bytes at a time from USB. this would proide some double
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//buffering speed ups, but not sure how fast that'll be. Having buffers
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//as small as 32bytes might be faster for 4-8MB flash memories as they
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//have ability to flash 32Bytes at once. Could perhaps fill multiple
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//32B buffers with one larger 128/256B transfer. Increasing transfer size
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//does speed up overall due to fewer setup and status USB packets.
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//USB control transfer:
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// SETUP/DATA STAGES:
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// Token packet- sync, pid, addr, enp, crc5, eop = 35bits
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// Data/setup packet
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// sync, pid, crc16, eop = 67bits
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// setup/payload packet data = 64bits
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// handsk (sync, pid, eop) = 19bit
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// total = 185bits with 64bit payload = 34.6% data utilization per data packet
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// STATUS STAGE:
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// same as above, but zero lenght data packet.
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// total 121bits
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// 8byte total payload
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// 185 setup + 185 data + 121 status = 491 bits transferred for 64bit payload = 13.03% bus utilization
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// 32byte total payload
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// 185 setup + 4*185 data + 121 status = 1046 bits xfrd for 4*64=256 payld = 24.47% bus util
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// 64byte total payload
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// 185 setup + 8*185 data + 121 status = 1786 bits xfrd for 8*64=512 payld = 28.67% bus util
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// 128byte total payload
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// 185 setup + 16*185 data + 121 status = 3266 bits xfrd for 16*64=1024 payld = 31.35% bus util
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// 254byte total payload
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// 185 setup + 32*185-16 data + 121 status = 6210 bits xfrd for 31.8*64=2032 payld = 32.72% bus util
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// 4.4% speedup than 128
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// 256bytes in 254byte xfr
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// 185 setup + 32*185-16 data + 121 status = 6210 bits xfrd for 32*64=2048 payld = 32.98% bus util
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// 0.79% speedup than 254 in 254
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// 256byte total payload
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// 185 setup + 32*185 data + 121 status = 6226 bits xfrd for 32*64=2048 payld = 32.89% bus util
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// 512byte total payload
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// 185 setup + 64*185 data + 121 status = 12146 bits xfrd for 64*64=4096 payld = 33.72% bus util
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// 1% greater bus util compared to 254byte xfr
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// 2.2% speedup compared to 256 in 254
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// Probably decent overall speedup by eliminating multiple status packets. Not sure how many
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// NAK's the old firmware was sending while the device programmed the entire 256byte buffer.
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// but one NAK is more than should be necessary.
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//
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// Plan is to support max of 254 byte transfers with 2 bytes stuffed in setup packet
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// Want to compare to 512B long transfers for speed comparison
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//
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// Either way, I can setup the buffers in smaller sizes than the transfers. Then a buffer could
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// start programming mid usb transfer once it's full. Want to make effor to hide flash programming
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// wait time behind usb transfer time.
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#endif
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