renamed: host/source/pinport.h -> shared/shared_pinport.h
modified: firmware/source/pinport.c modified: firmware/source/pinport.h -creating shared_pinport.h which is effectively a dictionary for pinport opcodes -file gets copied to host and firmware source dirs when compilied. -hardware macros had to be renamed to include underscore to differentiate opcode name from hardware macro. -pinport.c now is a nice clean switch between opcode name and macro with all literal numbers removed. -now don't have to manually track/update opcode numbers between multiple locations. modified: firmware/source/io.c modified: firmware/source/main.c -updates to add underscore pre-fix to hardware macros.
This commit is contained in:
Paul Molloy
parent
27cca679d5
commit
31678bacfe
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@ -6,20 +6,20 @@
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void io_pullup()
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{
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//pull up addr[7:0] bus
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ADDR_IP();
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ADDR_HI();
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_ADDR_IP();
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_ADDR_HI();
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//pull up data bus
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DATA_IP();
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DATA_HI();
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_DATA_IP();
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_DATA_HI();
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//pull up control port
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CTL_IP();
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CTL_HI();
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_CTL_IP();
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_CTL_HI();
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//pull up aux port
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AUX_IP();
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AUX_HI();
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_AUX_IP();
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_AUX_HI();
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//Aux port EXP /OE control
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//pull up on EXP FF should disable FF ouput
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@ -29,7 +29,7 @@ void io_pullup()
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//NES PRG-ROM /OE (with pulldown) on old INL-ROM v1 boards w/pulldown
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//NED PRG-ROM /WE (with pullup) on INL-ROM v3 boards w/pullup
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//NES CPLD JTAG TDO non-5v tolerant
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EXP0_FLT();
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_EXP0_FLT();
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//LED LAST displaying complete..
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}
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@ -48,10 +48,10 @@ USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]) {
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switch(spacket->bRequest) {
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case REQ_LED_ON:
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LED_ON(); //from macros
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_LED_ON(); //from macros
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break;
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case REQ_LED_OFF:
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LED_OFF();
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_LED_OFF();
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break;
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default:
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return 1;
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@ -128,9 +128,9 @@ int main()
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io_pullup();
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//configure LED PORT/DDR
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LED_OP();
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_LED_OP();
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//boot with LED on to differentiate bettwen BL/RUN
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LED_ON();
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_LED_ON();
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//enable interrupts
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sei();
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@ -1,20 +1,22 @@
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#include <avr/io.h>
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#include "logic.h"
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#include "pinport.h"
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#include "shared_pinport.h"
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//This file was created based on pinport.h
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//the close relationship between these two files must be kept in mind when making changes.
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//This file is also very dependent on macro definitions in host app.
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//the host app pinport.h was generated from this file, so any changes here must be forwarded.
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//This file is also very dependent on shared_pinport.h
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//the shared_pinport.h was generated from this file, so any changes here must be forwarded.
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/* Desc:Function takes an opcode which was transmitted via USB
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* then decodes it to call designated macro.
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* shared_pinport.h is used in both host and fw to ensure opcodes/names align
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* Pre: Macro must be defined in firmware pinport.h
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* opcode must align with host pinport.h otherwise who knows what you're calling
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* opcode must be defined in shared-pinport.h
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* Post:Macro call complete.
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* Rtn: SUCCESS if opcode found, ERROR_UNKNOWN_OPCODE if opcode not present.
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*/
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uint8_t pinport_macro( uint8_t opcode )
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uint8_t pinport_opcode2macro( uint8_t opcode )
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{
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//these should be simple macros only for now
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//ie only changes one pin/port, macro doesn't call other macros yet
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@ -24,154 +26,149 @@ uint8_t pinport_macro( uint8_t opcode )
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//ADDR[7:0] PORTA
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//============================
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//DDR-PORT MACROS
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case 0: ADDR_IP(); break;
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case 1: ADDR_OP(); break;
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case 2: ADDR_LO(); break;
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case 3: ADDR_HI(); break;
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case ADDR_IP: _ADDR_IP(); break;
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case ADDR_OP: _ADDR_OP(); break;
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case ADDR_LO: _ADDR_LO(); break;
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case ADDR_HI: _ADDR_HI(); break;
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//============================
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//DATA[7:0] PORTB
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//============================
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//DDR-PORT MACROS
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case 4: DATA_IP(); break;
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case 5: DATA_OP(); break;
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case 6: DATA_LO(); break;
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case 7: DATA_HI(); break;
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case DATA_IP: _DATA_IP(); break;
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case DATA_OP: _DATA_OP(); break;
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case DATA_LO: _DATA_LO(); break;
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case DATA_HI: _DATA_HI(); break;
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//============================
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//CTL PORTC
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//============================
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//DDR-PORT MACROS
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case 8: CTL_IP(); break;
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case CTL_IP: _CTL_IP(); break;
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// No CTL_OP() macro as some of these are inputs or bidir, best to individually assert as output
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case 9: CTL_LO(); break;
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case 10: CTL_HI(); break;
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case CTL_LO: _CTL_LO(); break;
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case CTL_HI: _CTL_HI(); break;
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//PIN MACROS
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case 11: M2_IP(); break;
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case 12: M2_OP(); break;
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case 13: M2_LO(); break;
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case 14: M2_HI(); break;
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case M2_IP: _M2_IP(); break;
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case M2_OP: _M2_OP(); break;
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case M2_LO: _M2_LO(); break;
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case M2_HI: _M2_HI(); break;
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case 15: ROMSEL_IP(); break;
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case 16: ROMSEL_OP(); break;
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case 17: ROMSEL_LO(); break;
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case 18: ROMSEL_HI(); break;
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case ROMSEL_IP: _ROMSEL_IP(); break;
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case ROMSEL_OP: _ROMSEL_OP(); break;
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case ROMSEL_LO: _ROMSEL_LO(); break;
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case ROMSEL_HI: _ROMSEL_HI(); break;
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case 19: CICE_IP(); break;
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case 20: CICE_OP(); break;
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case 21: CICE_LO(); break;
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case 22: CICE_HI(); break;
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case 23: PRGRW_IP(); break;
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case 24: PRGRW_OP(); break;
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case 25: PRGRW_WR(); break; //LO for writes
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case 26: PRGRW_RD(); break; //Hi for reads
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case PRGRW_IP: _PRGRW_IP(); break;
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case PRGRW_OP: _PRGRW_OP(); break;
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case PRGRW_WR: _PRGRW_WR(); break; //LO for writes
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case PRGRW_RD: _PRGRW_RD(); break; //Hi for reads
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//give each def different version numbers to detect errors
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//where command given to board which doesn't have that function
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#ifdef PURPLE_KAZZO //purple boards only
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case 27: p_AXL_ip(); break; //Don't use these, use software tied together versions instead.
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case 28: p_AXL_op(); break; //Increases compatibility between versions
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case 29: p_AXL_lo(); break; //Don't recommend calling lo/hi, use CLK instead
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case 30: p_AXL_hi(); break;
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case p_AXL_ip: _p_AXL_ip(); break; //Don't use these, use software tied together versions instead.
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case p_AXL_op: _p_AXL_op(); break; //Increases compatibility between versions
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case p_AXL_lo: _p_AXL_lo(); break; //Don't recommend calling lo/hi, use CLK instead
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case p_AXL_hi: _p_AXL_hi(); break;
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#else //Green and final design
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case 31: FREE_IP(); break;
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case 32: FREE_OP(); break;
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case 33: FREE_LO(); break;
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case 34: FREE_HI(); break;
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case FREE_IP: _FREE_IP(); break;
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case FREE_OP: _FREE_OP(); break;
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case FREE_LO: _FREE_LO(); break;
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case FREE_HI: _FREE_HI(); break;
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#endif
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case 35: CSRD_IP(); break;
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case 36: CSRD_OP(); break;
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case 37: CSRD_LO(); break;
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case 38: CSRD_HI(); break;
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case CSRD_IP: _CSRD_IP(); break;
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case CSRD_OP: _CSRD_OP(); break;
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case CSRD_LO: _CSRD_LO(); break;
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case CSRD_HI: _CSRD_HI(); break;
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case 39: CSWR_IP(); break;
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case 40: CSWR_OP(); break;
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case 41: CSWR_LO(); break;
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case 42: CSWR_HI(); break;
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case CSWR_IP: _CSWR_IP(); break;
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case CSWR_OP: _CSWR_OP(); break;
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case CSWR_LO: _CSWR_LO(); break;
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case CSWR_HI: _CSWR_HI(); break;
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case 43: CICE_IP(); break;
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case 44: CICE_OP(); break;
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case 45: CICE_LO(); break;
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case 46: CICE_HI(); break;
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case CICE_IP: _CICE_IP(); break;
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case CICE_OP: _CICE_OP(); break;
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case CICE_LO: _CICE_LO(); break;
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case CICE_HI: _CICE_HI(); break;
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#ifdef GREEN_KAZZO
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case 47: g_AXHL_IP(); break;
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case 48: g_AXHL_OP(); break;
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case 49: g_AXHL_lo(); break; //Don't recommend calling these as AXHL should be left low
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case 50: g_AXHL_hi(); break; //That way AXHL_CLK(); is always effective
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case g_AXHL_IP: _g_AXHL_IP(); break;
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case g_AXHL_OP: _g_AXHL_OP(); break;
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case g_AXHL_lo: _g_AXHL_lo(); break; //Don't recommend calling these as AXHL should be left low
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case g_AXHL_hi: _g_AXHL_hi(); break; //That way AXHL_CLK(); is always effective
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#endif
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//purple and final design, safe to pretend green is similar due to software AHL/AXL CLK
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case 51: AHL_IP(); break;
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case 52: AHL_OP(); break;
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case 53: AHL_lo(); break; //Don't recommend calling these as AHL should be left low
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case 54: AHL_hi(); break; //That way AHL_CLK(); is always effective.
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case AHL_IP: _AHL_IP(); break;
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case AHL_OP: _AHL_OP(); break;
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case AHL_lo: _AHL_lo(); break; //Don't recommend calling these as AHL should be left low
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case AHL_hi: _AHL_hi(); break; //That way AHL_CLK(); is always effective.
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//also helps maintain validity of software AHL/AXL CLK
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//============================
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//AUX PORTD
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//============================
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//DDR-PORT MACROS
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case 55: AUX_IP(); break; //Don't touch USB pins!!!
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case AUX_IP: _AUX_IP(); break; //Don't touch USB pins!!!
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// No AUX_OP(); macro as many of these are inputs or bidir, best to individually assert as output
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case 56: AUX_LO(); break;
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case 57: AUX_HI(); break;
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case AUX_LO: _AUX_LO(); break;
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case AUX_HI: _AUX_HI(); break;
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//PIN MACROS
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//lower case aren't meant to be called unless certain pin is 5v tolerant
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case 58: EXP0_ip(); break;
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case 59: EXP0_op(); break;
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case 60: EXP0_lo(); break; //Don't call this assuming EXP0 DDR is set to o/p
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case 61: EXP0_hi(); break; //Don't call this unless you're certain pin is 5v tolerant
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case EXP0_ip: _EXP0_ip(); break;
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case EXP0_op: _EXP0_op(); break;
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case EXP0_lo: _EXP0_lo(); break; //Don't call this assuming EXP0 DDR is set to o/p
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case EXP0_hi: _EXP0_hi(); break; //Don't call this unless you're certain pin is 5v tolerant
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//User options pull up, force low, and float
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case 62: EXP0_LO(); break; //Sets low then DDR to o/p
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case 63: EXP0_PU(); break; //maybe add some NOP(); to allow time for pull up
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case 64: EXP0_FLT(); break; //Set to i/p w/o pullup
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case EXP0_LO: _EXP0_LO(); break; //Sets low then DDR to o/p
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case EXP0_PU: _EXP0_PU(); break; //maybe add some NOP(); to allow time for pull up
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case EXP0_FLT: _EXP0_FLT(); break; //Set to i/p w/o pullup
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case 65: LED_IP(); break;
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case 66: LED_OP(); break;
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case 67: LED_OFF(); break;
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case 68: LED_ON(); break;
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case LED_IP: _LED_IP(); break;
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case LED_OP: _LED_OP(); break;
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case LED_OFF: _LED_OFF(); break;
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case LED_ON: _LED_ON(); break;
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case 69: IRQ_IP(); break;
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case 70: IRQ_OP(); break;
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case 71: IRQ_LO(); break;
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case 72: IRQ_HI(); break;
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case IRQ_IP: _IRQ_IP(); break;
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case IRQ_OP: _IRQ_OP(); break;
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case IRQ_LO: _IRQ_LO(); break;
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case IRQ_HI: _IRQ_HI(); break;
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case 73: CIA10_IP(); break;
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case 74: CIA10_OP(); break;
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case 75: CIA10_LO(); break;
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case 76: CIA10_HI(); break;
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case CIA10_IP: _CIA10_IP(); break;
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case CIA10_OP: _CIA10_OP(); break;
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case CIA10_LO: _CIA10_LO(); break;
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case CIA10_HI: _CIA10_HI(); break;
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case 77: BL_IP(); break;
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case 78: BL_OP(); break;
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case 79: BL_LO(); break;
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case 80: BL_HI(); break;
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case BL_IP: _BL_IP(); break;
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case BL_OP: _BL_OP(); break;
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case BL_LO: _BL_LO(); break;
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case BL_HI: _BL_HI(); break;
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//#ifndef pg_XOE //FINAL_DESIGN
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//purple and green have versions of these which tie two pins together in software
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case 81: AXLOE_IP(); break;
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case 82: AXLOE_OP(); break;
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case AXLOE_IP: _AXLOE_IP(); break;
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case AXLOE_OP: _AXLOE_OP(); break;
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//Caution AXL_CLK() relies on EXPFF_OP() to be called beforehand
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// Think of it like you must enable the output before you can clock it.
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// Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled.
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#ifdef PURPLE_KAZZO or GREEN_KAZZO //purple and green versions
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case 83: XOE_ip(); break; //Don't call these, use AXLOE instead
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case 84: XOE_op(); break;
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case 85: XOE_lo(); break;
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case 86: XOE_hi(); break;
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case XOE_ip: _XOE_ip(); break; //Don't call these, use AXLOE instead
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case XOE_op: _XOE_op(); break;
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case XOE_lo: _XOE_lo(); break;
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case XOE_hi: _XOE_hi(); break;
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#endif
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//Same definition on all board versions
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//Only need to be cognizant that AXL_CLK won't work if EXPFF_FLT was called beforehand
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//This is only an issue on final design, so an error here should only cause probs on final design
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//Net effect is it it works on final design should be fine on other versions which is the goal
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case 87: EXPFF_OP(); break; //FF /OE pin low->enable o/p
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case 88: EXPFF_FLT(); break; //FF /OE pin high->disable o/p
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case EXPFF_OP: _EXPFF_OP(); break; //FF /OE pin low->enable o/p
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case EXPFF_FLT: _EXPFF_FLT(); break; //FF /OE pin high->disable o/p
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//AXL_CLK this is similar between purple and green versions, just on a different pin.
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//green boards don't have an AXL_CLK nor a AHL_CLK, as the two are combined.
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@ -183,8 +180,8 @@ uint8_t pinport_macro( uint8_t opcode )
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//case 88: software_AHL_CLK(); break;
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//#else
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//these two cases covers all designs with macro calling sofware versions for green board.
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case 89: AXL_CLK(); break;
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case 90: AHL_CLK(); break;
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case AXL_CLK: _AXL_CLK(); break;
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case AHL_CLK: _AHL_CLK(); break;
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//#endif
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//these work fine in hardware for purple and final.
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//green had to separate these two with software.
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@ -235,13 +232,13 @@ void software_AXL_CLK()
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DATA_OUT = curAHLaddr;
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//set ADDR as O/P and place desired value on bus
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ADDR_OP(); //should already be set, but in case not
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_ADDR_OP(); //should already be set, but in case not
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ADDR_OUT = curAXLaddr;
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//Clock both latches
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g_AXHL_OP(); //can't be sure "AHL" is OP as assumption is AXL will be used as latch
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g_AXHL_lo(); //can't be sure it's low either
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AXHL_CLK(); //clock values
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_g_AXHL_OP(); //can't be sure "AHL" is OP as assumption is AXL will be used as latch
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_g_AXHL_lo(); //can't be sure it's low either
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_AXHL_CLK(); //clock values
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//finally restore original DATA & ADDR values
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DATA_OUT = curAXLaddr;
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@ -271,13 +268,13 @@ void software_AHL_CLK()
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//Desired AHL latch value should have already been placed on DATA_OUT.
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//set ADDR as O/P and place curAXLaddr on bus other function should have updated it last latch
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ADDR_OP(); //should already be set, but in case not
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_ADDR_OP(); //should already be set, but in case not
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ADDR_OUT = curAXLaddr;
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//Clock both latches
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//Can assume AHL is OP as other versions would require it to latch AHL
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//Can also assume it was left low, if not causes issues in all board versions
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AXHL_CLK(); //clock values
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_AXHL_CLK(); //clock values
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//finally restore original DATA & ADDR values
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//never changed: DATA_OUT = curAHLaddr;
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@ -1,7 +1,7 @@
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#include <avr/io.h>
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#include "logic.h"
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uint8_t pinport_macro( uint8_t opcode );
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uint8_t pinport_opcode2macro( uint8_t opcode );
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void software_AHL_CLK();
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void software_AXL_CLK();
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@ -158,6 +158,13 @@ void software_AXL_CLK();
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//
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//Firmware macro "functions" have underscore prefix
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//opcode macros have identical name but without the prefix
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//Haven't decided if PIN/PORT macros should be given underscore as well.
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// Good chance I will want them with _ when writing read functions
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// Easier to add them than take them out maybe..?
|
||||
//Current rule is _ goes with () type macro
|
||||
|
||||
|
||||
//============================
|
||||
//ADDR[7:0] PORTA
|
||||
|
|
@ -167,10 +174,10 @@ void software_AXL_CLK();
|
|||
#define ADDR_IN PINA
|
||||
#define ADDR_DDR DDRA
|
||||
//DDR-PORT MACROS
|
||||
#define ADDR_IP() ADDR_DDR = LO
|
||||
#define ADDR_OP() ADDR_DDR = HI
|
||||
#define ADDR_LO() ADDR_OUT = LO
|
||||
#define ADDR_HI() ADDR_OUT = HI
|
||||
#define _ADDR_IP() ADDR_DDR = LO
|
||||
#define _ADDR_OP() ADDR_DDR = HI
|
||||
#define _ADDR_LO() ADDR_OUT = LO
|
||||
#define _ADDR_HI() ADDR_OUT = HI
|
||||
|
||||
|
||||
//============================
|
||||
|
|
@ -181,10 +188,10 @@ void software_AXL_CLK();
|
|||
#define DATA_IN PINB
|
||||
#define DATA_DDR DDRB
|
||||
//DDR-PORT MACROS
|
||||
#define DATA_IP() DATA_DDR = LO
|
||||
#define DATA_OP() DATA_DDR = HI
|
||||
#define DATA_LO() DATA_OUT = LO
|
||||
#define DATA_HI() DATA_OUT = HI
|
||||
#define _DATA_IP() DATA_DDR = LO
|
||||
#define _DATA_OP() DATA_DDR = HI
|
||||
#define _DATA_LO() DATA_OUT = LO
|
||||
#define _DATA_HI() DATA_OUT = HI
|
||||
|
||||
|
||||
//============================
|
||||
|
|
@ -195,10 +202,10 @@ void software_AXL_CLK();
|
|||
#define CTL_IN PINC
|
||||
#define CTL_DDR DDRC
|
||||
//DDR-PORT MACROS
|
||||
#define CTL_IP() CTL_DDR = LO
|
||||
#define _CTL_IP() CTL_DDR = LO
|
||||
// No CTL_OP() macro as some of these are inputs or bidir, best to individually assert as output
|
||||
#define CTL_LO() CTL_OUT = LO
|
||||
#define CTL_HI() CTL_OUT = HI
|
||||
#define _CTL_LO() CTL_OUT = LO
|
||||
#define _CTL_HI() CTL_OUT = HI
|
||||
|
||||
//PIN DEFN
|
||||
#define M2 PC0 //NES, FC, & SNES (SYSCLK)
|
||||
|
|
@ -222,75 +229,70 @@ void software_AXL_CLK();
|
|||
#endif
|
||||
|
||||
//PIN MACROS
|
||||
#define M2_IP() CTL_DDR &= ~(1<<M2)
|
||||
#define M2_OP() CTL_DDR |= (1<<M2)
|
||||
#define M2_LO() CTL_OUT &= ~(1<<M2)
|
||||
#define M2_HI() CTL_OUT |= (1<<M2)
|
||||
#define _M2_IP() CTL_DDR &= ~(1<<M2)
|
||||
#define _M2_OP() CTL_DDR |= (1<<M2)
|
||||
#define _M2_LO() CTL_OUT &= ~(1<<M2)
|
||||
#define _M2_HI() CTL_OUT |= (1<<M2)
|
||||
//TODO read M2 PIN as input
|
||||
|
||||
#define ROMSEL_IP() CTL_DDR &= ~(1<<ROMSEL)
|
||||
#define ROMSEL_OP() CTL_DDR |= (1<<ROMSEL)
|
||||
#define ROMSEL_LO() CTL_OUT &= ~(1<<ROMSEL)
|
||||
#define ROMSEL_HI() CTL_OUT |= (1<<ROMSEL)
|
||||
#define _ROMSEL_IP() CTL_DDR &= ~(1<<ROMSEL)
|
||||
#define _ROMSEL_OP() CTL_DDR |= (1<<ROMSEL)
|
||||
#define _ROMSEL_LO() CTL_OUT &= ~(1<<ROMSEL)
|
||||
#define _ROMSEL_HI() CTL_OUT |= (1<<ROMSEL)
|
||||
|
||||
#define CICE_IP() CTL_DDR &= ~(1<<CICE)
|
||||
#define CICE_OP() CTL_DDR |= (1<<CICE)
|
||||
#define CICE_LO() CTL_OUT &= ~(1<<CICE)
|
||||
#define CICE_HI() CTL_OUT |= (1<<CICE)
|
||||
|
||||
#define PRGRW_IP() CTL_DDR &= ~(1<<PRGRW)
|
||||
#define PRGRW_OP() CTL_DDR |= (1<<PRGRW)
|
||||
#define PRGRW_WR() CTL_OUT &= ~(1<<PRGRW) //LO for writes
|
||||
#define PRGRW_RD() CTL_OUT |= (1<<PRGRW) //HI for reads
|
||||
#define _PRGRW_IP() CTL_DDR &= ~(1<<PRGRW)
|
||||
#define _PRGRW_OP() CTL_DDR |= (1<<PRGRW)
|
||||
#define _PRGRW_WR() CTL_OUT &= ~(1<<PRGRW) //LO for writes
|
||||
#define _PRGRW_RD() CTL_OUT |= (1<<PRGRW) //HI for reads
|
||||
|
||||
#ifdef PURPLE_KAZZO
|
||||
#define p_AXL_ip() CTL_DDR &= ~(1<<p_AXL) //Don't use these, use software tied together versions instead.
|
||||
#define p_AXL_op() CTL_DDR |= (1<<p_AXL) //Increases compatibility between versions
|
||||
#define p_AXL_lo() CTL_OUT &= ~(1<<p_AXL) //Don't recommend calling lo/hi, use CLK instead
|
||||
#define p_AXL_hi() CTL_OUT |= (1<<p_AXL)
|
||||
//AXL_CLK assumes AXL was previously left in default low state
|
||||
#define AXL_CLK() p_AXL_hi(); p_AXL_lo(); //same name and convention on final design
|
||||
#define _p_AXL_ip() CTL_DDR &= ~(1<<p_AXL) //Don't use these, use software tied together versions instead.
|
||||
#define _p_AXL_op() CTL_DDR |= (1<<p_AXL) //Increases compatibility between versions
|
||||
#define _p_AXL_lo() CTL_OUT &= ~(1<<p_AXL) //Don't recommend calling lo/hi, use CLK instead
|
||||
#define _p_AXL_hi() CTL_OUT |= (1<<p_AXL)
|
||||
//_AXL_CLK assumes AXL was previously left in default low state
|
||||
#define _AXL_CLK() _p_AXL_hi(); _p_AXL_lo(); //same name and convention on final design
|
||||
#else //Green and final design
|
||||
#define FREE_IP() CTL_DDR &= ~(1<<FREE)
|
||||
#define FREE_OP() CTL_DDR |= (1<<FREE)
|
||||
#define FREE_LO() CTL_OUT &= ~(1<<FREE)
|
||||
#define FREE_HI() CTL_OUT |= (1<<FREE)
|
||||
#define _FREE_IP() CTL_DDR &= ~(1<<FREE)
|
||||
#define _FREE_OP() CTL_DDR |= (1<<FREE)
|
||||
#define _FREE_LO() CTL_OUT &= ~(1<<FREE)
|
||||
#define _FREE_HI() CTL_OUT |= (1<<FREE)
|
||||
#endif
|
||||
|
||||
#define CSRD_IP() CTL_DDR &= ~(1<<CSRD)
|
||||
#define CSRD_OP() CTL_DDR |= (1<<CSRD)
|
||||
#define CSRD_LO() CTL_OUT &= ~(1<<CSRD)
|
||||
#define CSRD_HI() CTL_OUT |= (1<<CSRD)
|
||||
#define _CSRD_IP() CTL_DDR &= ~(1<<CSRD)
|
||||
#define _CSRD_OP() CTL_DDR |= (1<<CSRD)
|
||||
#define _CSRD_LO() CTL_OUT &= ~(1<<CSRD)
|
||||
#define _CSRD_HI() CTL_OUT |= (1<<CSRD)
|
||||
|
||||
#define CSWR_IP() CTL_DDR &= ~(1<<CSWR)
|
||||
#define CSWR_OP() CTL_DDR |= (1<<CSWR)
|
||||
#define CSWR_LO() CTL_OUT &= ~(1<<CSWR)
|
||||
#define CSWR_HI() CTL_OUT |= (1<<CSWR)
|
||||
#define _CSWR_IP() CTL_DDR &= ~(1<<CSWR)
|
||||
#define _CSWR_OP() CTL_DDR |= (1<<CSWR)
|
||||
#define _CSWR_LO() CTL_OUT &= ~(1<<CSWR)
|
||||
#define _CSWR_HI() CTL_OUT |= (1<<CSWR)
|
||||
|
||||
#define CICE_IP() CTL_DDR &= ~(1<<CICE)
|
||||
#define CICE_OP() CTL_DDR |= (1<<CICE)
|
||||
#define CICE_LO() CTL_OUT &= ~(1<<CICE)
|
||||
#define CICE_HI() CTL_OUT |= (1<<CICE)
|
||||
#define _CICE_IP() CTL_DDR &= ~(1<<CICE)
|
||||
#define _CICE_OP() CTL_DDR |= (1<<CICE)
|
||||
#define _CICE_LO() CTL_OUT &= ~(1<<CICE)
|
||||
#define _CICE_HI() CTL_OUT |= (1<<CICE)
|
||||
|
||||
#ifdef GREEN_KAZZO
|
||||
#define g_AXHL_IP() CTL_DDR &= ~(1<<g_AXHL)
|
||||
#define g_AXHL_OP() CTL_DDR |= (1<<g_AXHL)
|
||||
#define g_AXHL_lo() CTL_OUT &= ~(1<<g_AXHL) //Don't recommend calling these as AXHL should be left low
|
||||
#define g_AXHL_hi() CTL_OUT |= (1<<g_AXHL) //That way AXHL_CLK(); is always effective
|
||||
#define AXHL_CLK() g_AXHL_hi(); g_AXHL_lo();
|
||||
#define AHL_CLK() software_AHL_CLK();
|
||||
#define AXL_CLK() software_AXL_CLK();
|
||||
#define _g_AXHL_IP() CTL_DDR &= ~(1<<g_AXHL)
|
||||
#define _g_AXHL_OP() CTL_DDR |= (1<<g_AXHL)
|
||||
#define _g_AXHL_lo() CTL_OUT &= ~(1<<g_AXHL) //Don't recommend calling these as AXHL should be left low
|
||||
#define _g_AXHL_hi() CTL_OUT |= (1<<g_AXHL) //That way _AXHL_CLK(); is always effective
|
||||
#define _AXHL_CLK() _g_AXHL_hi(); _g_AXHL_lo();
|
||||
#define _AHL_CLK() software_AHL_CLK();
|
||||
#define _AXL_CLK() software_AXL_CLK();
|
||||
//can ~safely consider this pin as if it were only AHL due to software AHL/AXL CLK
|
||||
#define AHL_IP() g_AXHL_IP();
|
||||
#define AHL_OP() g_AXHL_OP();
|
||||
#define AHL_lo() g_AXHL_lo();
|
||||
#define AHL_hi() g_AXHL_hi();
|
||||
#define _AHL_IP() _g_AXHL_IP();
|
||||
#define _AHL_OP() _g_AXHL_OP();
|
||||
#define _AHL_lo() _g_AXHL_lo();
|
||||
#define _AHL_hi() _g_AXHL_hi();
|
||||
#else //purple and final design
|
||||
#define AHL_IP() CTL_DDR &= ~(1<<AHL)
|
||||
#define AHL_OP() CTL_DDR |= (1<<AHL)
|
||||
#define AHL_lo() CTL_OUT &= ~(1<<AHL) //Don't recommend calling these as AHL should be left low
|
||||
#define AHL_hi() CTL_OUT |= (1<<AHL) //That way AHL_CLK(); is always effective
|
||||
#define AHL_CLK() AHL_hi(); AHL_lo();
|
||||
#define _AHL_IP() CTL_DDR &= ~(1<<AHL)
|
||||
#define _AHL_OP() CTL_DDR |= (1<<AHL)
|
||||
#define _AHL_lo() CTL_OUT &= ~(1<<AHL) //Don't recommend calling these as AHL should be left low
|
||||
#define _AHL_hi() CTL_OUT |= (1<<AHL) //That way _AHL_CLK(); is always effective
|
||||
#define _AHL_CLK() _AHL_hi(); _AHL_lo();
|
||||
#endif
|
||||
|
||||
//green board software AXL & AHL are separated in software in pinport.c
|
||||
|
|
@ -303,10 +305,10 @@ void software_AXL_CLK();
|
|||
#define AUX_IN PIND
|
||||
#define AUX_DDR DDRD
|
||||
//DDR-PORT MACROS
|
||||
#define AUX_IP() AUX_DDR &= ((1<<USBP) | (1<<USBM)) //Don't touch USB pins!!!
|
||||
#define _AUX_IP() AUX_DDR &= ((1<<USBP) | (1<<USBM)) //Don't touch USB pins!!!
|
||||
// No AUX_OP() macro as many of these are inputs or bidir, best to individually assert as output
|
||||
#define AUX_LO() AUX_OUT &= ((1<<USBP) | (1<<USBM))
|
||||
#define AUX_HI() AUX_OUT |= ~((1<<USBP) | (1<<USBM))
|
||||
#define _AUX_LO() AUX_OUT &= ((1<<USBP) | (1<<USBM))
|
||||
#define _AUX_HI() AUX_OUT |= ~((1<<USBP) | (1<<USBM))
|
||||
|
||||
//PIN DEFN
|
||||
#define EXP0 PD0 //NES EXP0 controls a number of varying flash cart features...
|
||||
|
|
@ -335,61 +337,61 @@ void software_AXL_CLK();
|
|||
|
||||
//PIN MACROS
|
||||
//lower case aren't meant to be called unless certain pin is 5v tolerant
|
||||
#define EXP0_ip() AUX_DDR &= ~(1<<EXP0)
|
||||
#define EXP0_op() AUX_DDR |= (1<<EXP0)
|
||||
#define EXP0_lo() AUX_OUT &= ~(1<<EXP0) //Don't call this assuming EXP0 DDR is set to o/p
|
||||
#define EXP0_hi() AUX_OUT |= (1<<EXP0) //Don't call this unless you're certain pin is 5v tolerant
|
||||
#define _EXP0_ip() AUX_DDR &= ~(1<<EXP0)
|
||||
#define _EXP0_op() AUX_DDR |= (1<<EXP0)
|
||||
#define _EXP0_lo() AUX_OUT &= ~(1<<EXP0) //Don't call this assuming EXP0 DDR is set to o/p
|
||||
#define _EXP0_hi() AUX_OUT |= (1<<EXP0) //Don't call this unless you're certain pin is 5v tolerant
|
||||
//User options pull up, force low, and float
|
||||
#define EXP0_LO() EXP0_lo(); EXP0_op(); //Sets low then DDR to o/p
|
||||
#define EXP0_PU() EXP0_ip(); EXP0_hi(); //maybe add some NOP() to allow time for pull up
|
||||
#define EXP0_FLT() EXP0_ip(); EXP0_lo(); //Set to i/p w/o pullup
|
||||
#define _EXP0_LO() _EXP0_lo(); _EXP0_op(); //Sets low then DDR to o/p
|
||||
#define _EXP0_PU() _EXP0_ip(); _EXP0_hi(); //maybe add some NOP() to allow time for pull up
|
||||
#define _EXP0_FLT() _EXP0_ip(); _EXP0_lo(); //Set to i/p w/o pullup
|
||||
|
||||
|
||||
#define LED_IP() AUX_DDR &= ~(1<<LED)
|
||||
#define LED_OP() AUX_DDR |= (1<<LED)
|
||||
#define LED_OFF() AUX_OUT &= ~(1<<LED)
|
||||
#define LED_ON() AUX_OUT |= (1<<LED)
|
||||
#define _LED_IP() AUX_DDR &= ~(1<<LED)
|
||||
#define _LED_OP() AUX_DDR |= (1<<LED)
|
||||
#define _LED_OFF() AUX_OUT &= ~(1<<LED)
|
||||
#define _LED_ON() AUX_OUT |= (1<<LED)
|
||||
|
||||
#define IRQ_IP() AUX_DDR &= ~(1<<IRQ)
|
||||
#define IRQ_OP() AUX_DDR |= (1<<IRQ)
|
||||
#define IRQ_LO() AUX_OUT &= ~(1<<IRQ)
|
||||
#define IRQ_HI() AUX_OUT |= (1<<IRQ)
|
||||
#define _IRQ_IP() AUX_DDR &= ~(1<<IRQ)
|
||||
#define _IRQ_OP() AUX_DDR |= (1<<IRQ)
|
||||
#define _IRQ_LO() AUX_OUT &= ~(1<<IRQ)
|
||||
#define _IRQ_HI() AUX_OUT |= (1<<IRQ)
|
||||
|
||||
#define CIA10_IP() AUX_DDR &= ~(1<<CIA10)
|
||||
#define CIA10_OP() AUX_DDR |= (1<<CIA10)
|
||||
#define CIA10_LO() AUX_OUT &= ~(1<<CIA10)
|
||||
#define CIA10_HI() AUX_OUT |= (1<<CIA10)
|
||||
#define _CIA10_IP() AUX_DDR &= ~(1<<CIA10)
|
||||
#define _CIA10_OP() AUX_DDR |= (1<<CIA10)
|
||||
#define _CIA10_LO() AUX_OUT &= ~(1<<CIA10)
|
||||
#define _CIA10_HI() AUX_OUT |= (1<<CIA10)
|
||||
|
||||
#define BL_IP() AUX_DDR &= ~(1<<BL)
|
||||
#define BL_OP() AUX_DDR |= (1<<BL)
|
||||
#define BL_LO() AUX_OUT &= ~(1<<BL)
|
||||
#define BL_HI() AUX_OUT |= (1<<BL)
|
||||
#define _BL_IP() AUX_DDR &= ~(1<<BL)
|
||||
#define _BL_OP() AUX_DDR |= (1<<BL)
|
||||
#define _BL_LO() AUX_OUT &= ~(1<<BL)
|
||||
#define _BL_HI() AUX_OUT |= (1<<BL)
|
||||
|
||||
#ifndef pg_XOE //FINAL_DESIGN
|
||||
#define AXLOE_IP() AUX_DDR &= ~(1<<AXLOE)
|
||||
#define AXLOE_OP() AUX_DDR |= (1<<AXLOE)
|
||||
#define EXPFF_OP() AUX_OUT &= ~(1<<AXLOE) //FF /OE pin low->enable o/p
|
||||
#define EXPFF_FLT() AUX_OUT |= (1<<AXLOE) //FF /OE pin high->disable o/p
|
||||
//Caution AXL_CLK() relies on EXPFF_OP() to be called beforehand
|
||||
#define _AXLOE_IP() AUX_DDR &= ~(1<<AXLOE)
|
||||
#define _AXLOE_OP() AUX_DDR |= (1<<AXLOE)
|
||||
#define _EXPFF_OP() AUX_OUT &= ~(1<<AXLOE) //FF /OE pin low->enable o/p
|
||||
#define _EXPFF_FLT() AUX_OUT |= (1<<AXLOE) //FF /OE pin high->disable o/p
|
||||
//Caution _AXL_CLK() relies on _EXPFF_OP() to be called beforehand
|
||||
// Think of it like you must enable the output before you can clock it.
|
||||
// Floating EXPFF also happens to clock it. Think of it like it looses it's value if disabled.
|
||||
#define AXL_CLK() EXPFF_FLT(); EXPFF_OP(); //same name and convention as purple
|
||||
#define _AXL_CLK() _EXPFF_FLT(); _EXPFF_OP(); //same name and convention as purple
|
||||
#else //purple and green versions
|
||||
#define XOE_ip() AUX_DDR &= ~(1<<pg_XOE) //don't use these, use software tied together AXLOE instead
|
||||
#define XOE_op() AUX_DDR |= (1<<pg_XOE)
|
||||
#define XOE_lo() AUX_OUT &= ~(1<<pg_XOE) //FF /OE pin low->enable o/p
|
||||
#define XOE_hi() AUX_OUT |= (1<<pg_XOE) //FF /OE pin high->disable o/p
|
||||
#define _XOE_ip() AUX_DDR &= ~(1<<pg_XOE) //don't use these, use software tied together AXLOE instead
|
||||
#define _XOE_op() AUX_DDR |= (1<<pg_XOE)
|
||||
#define _XOE_lo() AUX_OUT &= ~(1<<pg_XOE) //FF /OE pin low->enable o/p
|
||||
#define _XOE_hi() AUX_OUT |= (1<<pg_XOE) //FF /OE pin high->disable o/p
|
||||
//Final version ties XOEn and AXL to same pin, we can do this in software to make other ver behave similarly
|
||||
#endif
|
||||
#ifdef PURPLE_KAZZO
|
||||
#define AXLOE_IP() XOE_ip(); p_AXL_ip();
|
||||
#define AXLOE_OP() XOE_op(); p_AXL_op();
|
||||
#define EXPFF_OP() XOE_lo(); p_AXL_lo();
|
||||
#define EXPFF_FLT() XOE_hi(); p_AXL_hi();
|
||||
#define _AXLOE_IP() _XOE_ip(); _p_AXL_ip();
|
||||
#define _AXLOE_OP() _XOE_op(); _p_AXL_op();
|
||||
#define _EXPFF_OP() _XOE_lo(); _p_AXL_lo();
|
||||
#define _EXPFF_FLT() _XOE_hi(); _p_AXL_hi();
|
||||
#endif
|
||||
#ifdef GREEN_KAZZO //green can't tie AXL, just don't worry about clocking effect while enabling/disabling
|
||||
#define AXLOE_IP() XOE_ip(); //run risk that AHL isn't O/P because AXL was made O/P instead
|
||||
#define AXLOE_OP() XOE_op(); //sofware AXL/AHL clock covers this case though.
|
||||
#define EXPFF_OP() XOE_lo();
|
||||
#define EXPFF_FLT() XOE_hi();
|
||||
#define _AXLOE_IP() _XOE_ip(); //run risk that AHL isn't O/P because AXL was made O/P instead
|
||||
#define _AXLOE_OP() _XOE_op(); //sofware AXL/AHL clock covers this case though.
|
||||
#define _EXPFF_OP() _XOE_lo();
|
||||
#define _EXPFF_FLT() _XOE_hi();
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,16 +1,14 @@
|
|||
#ifndef _pinport_h
|
||||
#define _pinport_h
|
||||
#ifndef _shared_pinport_h
|
||||
#define _shared_pinport_h
|
||||
|
||||
//This file was created based on firmware version of pinport.h and pinport.c
|
||||
//the close relationship between these two files must be kept in mind when making changes.
|
||||
//This file is also very dependent on macro definitions in firmware.
|
||||
//Any changes to this file must be applied to firmware.
|
||||
//Don't recommend changing opcodes or anything here, change them in fw first then apply here.
|
||||
//making this a shared file helps cut room for error as changing opcode numbers here will
|
||||
//inherently get forwarded to both firmware and app at same time.
|
||||
|
||||
//these should be simple macros only for now
|
||||
//ie only changes one pin/port, macro doesn't call other macros yet
|
||||
//made exception to this rule for EXP0 since doesn't vary on board versions
|
||||
//switch (opcode) {
|
||||
//============================
|
||||
//ADDR[7:0] PORTA
|
||||
//============================
|
||||
|
|
@ -51,10 +49,12 @@
|
|||
#define ROMSEL_LO 17
|
||||
#define ROMSEL_HI 18
|
||||
|
||||
#define CICE_IP 19
|
||||
#define CICE_OP 20
|
||||
#define CICE_LO 21
|
||||
#define CICE_HI 22
|
||||
//accidentally doubly defined...
|
||||
//having this shared .h file helped as the compiler points out these issues...
|
||||
//#define CICE_IP 19
|
||||
//#define CICE_OP 20
|
||||
//#define CICE_LO 21
|
||||
//#define CICE_HI 22
|
||||
|
||||
#define PRGRW_IP 23
|
||||
#define PRGRW_OP 24
|
||||
Loading…
Reference in New Issue