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INL-retro-progdump
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lowercasing soldermask color denotations for signals.

This commit is contained in:
Paul Molloy 2016-11-22 00:30:03 -06:00
parent 42e8339600
commit ab52b30d8d
1 changed files with 3 additions and 3 deletions
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6
firmware/source/pinport.h
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@ -195,7 +195,7 @@
#define ROMSEL PC1 //(aka PRG/CE) NES, FC, & SNES #define ROMSEL PC1 //(aka PRG/CE) NES, FC, & SNES
#define PRGRW PC2 //PRG R/W on NES & FC #define PRGRW PC2 //PRG R/W on NES & FC
#define P_AXL PC3 //EXP FF CLK on purple boards #define p_AXL PC3 //EXP FF CLK on purple boards
#define FREE PC3 //Free pin on all other boards #define FREE PC3 //Free pin on all other boards
#define C_RD PC4 //NES & FC CHR /RD #define C_RD PC4 //NES & FC CHR /RD
@ -207,7 +207,7 @@
#define CICE PC6 //NES & FC CIRAM /CE, most carts are 2screen tying this to CHR A13 making this an I/P #define CICE PC6 //NES & FC CIRAM /CE, most carts are 2screen tying this to CHR A13 making this an I/P
#define AHL PC7 //ADDR MID FF CLK per orig kazzo design #define AHL PC7 //ADDR MID FF CLK per orig kazzo design
#define G_AXL PC7 //Also EXP/ADDRHI FF CLK on green prototype #define g_AXL PC7 //Also EXP/ADDRHI FF CLK on green prototype
//PIN MACROS //PIN MACROS
#define M2_IP() CTL_DDR &= ~(1<<M2) #define M2_IP() CTL_DDR &= ~(1<<M2)
@ -265,7 +265,7 @@
#define CIA10 PD5 //NES & FC CIRAM A10 (aka VRAM A10) #define CIA10 PD5 //NES & FC CIRAM A10 (aka VRAM A10)
#define BL PD6 //Bootloader switch BL->GND, RUN->float #define BL PD6 //Bootloader switch BL->GND, RUN->float
#define P_XOE PD7 //EXP/ADDRHI FF /OE pin on purple and green boards #define p_XOE PD7 //EXP/ADDRHI FF /OE pin on purple and green boards
#define AXLOE PD7 //EXP/ADDRHI FF CLK & /OE pin on final board versions #define AXLOE PD7 //EXP/ADDRHI FF CLK & /OE pin on final board versions
//PIN MACROS //PIN MACROS