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------------------------------------------- 

Firmware application version #3 release
-------------------------------------------

N64 updates:
Some extra timing delays were necessary for consistent dumping.
Includes fixes for N64 dumping that proved working for me on 10+ carts I
dumped successfully.  There is now a .csv in docs folder with cart size
in bytes, divide that number by 131,072 to get size in mbits for -z
flag.  Includes CRC32 checksum that can be verified using HxD hex
editor.  N64 file output is big-endian so it reads as it should in hex
editor which is .z64 file format.  lua script updated to print out the
game name from the in rom header.

NES updates:
flashing support for quite a few different mappers including GTROM,
MMC2, MMC4, action53, easyNSF, and other tweaks to rd/wr timings.

FIRMWARE UPDATES:
inlretro2.lua script now tries to poll the firmware "application
version" and suggest updating your firmware if you're not running the
version in this release.  You can always update your firmware using the
bootloader method in the readme.  But there is an easier method if you
have an stm32 based device (translated: you purchased your device in
2018 or later). AND you're already running firmware version v2.3.x

simply run the new scripts which were added in this commit:

	PCB version 2.0 or 2.1 (large square PCB with option for 6 connectors)
	>inlretro.exe -s scripts\inlretro_inl6fwupdate.lua

	PCB version 2.0N (smaller PCB with NES connector only:
	>inlretro.exe -s scripts\inlretro_inlNESfwupdate.lua

Now that it's easier for the host software to detect the firmware
application version can work towards having the scripts automatically
update the device firmware for you..  But still need to implement this..
This commit is contained in:
Paul Desktop ASUS-C7H 2019-08-16 10:27:19 -05:00
parent 16f4f55ab2
commit cc4aa6c67c
53 changed files with 6864 additions and 4247 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

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docs/Nintendo - Nintendo 64 - Dump Status (BigEndian) (2019-07-24).csv Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "DTD/xhtml1-strict.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8" />
<meta name="Generator" content="Kate, the KDE Advanced Text Editor" />
<title>n64crc.c</title>
</head>
<body>
<pre style='color:#141312;background-color:#ffffff;'>
<i><span style='color:#888786;'>/*</span></i><i><span style='color:#888786;'> snesrc - SNES Recompiler</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * Mar 23, 2010: addition by spinout to actually fix CRC if it is incorrect</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * Copyright notice for this file:</span></i>
<i><span style='color:#888786;'> * Copyright (C) 2005 Parasyte</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * Based on uCON64's N64 checksum algorithm by Andreas Sterbenz</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * This program is free software; you can redistribute it and/or modify</span></i>
<i><span style='color:#888786;'> * it under the terms of the GNU General Public License as published by</span></i>
<i><span style='color:#888786;'> * the Free Software Foundation; either version 2 of the License, or</span></i>
<i><span style='color:#888786;'> * (at your option) any later version.</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * This program is distributed in the hope that it will be useful,</span></i>
<i><span style='color:#888786;'> * but WITHOUT ANY WARRANTY; without even the implied warranty of</span></i>
<i><span style='color:#888786;'> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span></i>
<i><span style='color:#888786;'> * GNU General Public License for more details.</span></i>
<i><span style='color:#888786;'> *</span></i>
<i><span style='color:#888786;'> * You should have received a copy of the GNU General Public License</span></i>
<i><span style='color:#888786;'> * along with this program; if not, write to the Free Software</span></i>
<i><span style='color:#888786;'> * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</span></i>
<i><span style='color:#888786;'> </span></i><i><span style='color:#888786;'>*/</span></i>
<span style='color:#006e28;'>#include </span><span style='color:#006e28;'>&lt;stdio.h&gt;</span>
<span style='color:#006e28;'>#include </span><span style='color:#006e28;'>&lt;stdlib.h&gt;</span>
<span style='color:#006e28;'>#define ROL(i, b) (((i) </span><span style='color:#006e28;'>&lt;&lt; (b)) | ((i) &gt;</span><span style='color:#006e28;'>&gt; (32 - (b))))</span>
<span style='color:#006e28;'>#define BYTES2LONG(b) ( (b)[0] &lt;&lt; 24 | \</span>
<span style='color:#006e28;'> (b)[1] &lt;&lt; 16 | \</span>
<span style='color:#006e28;'> (b)[2] &lt;&lt; 8 | \</span>
<span style='color:#006e28;'> (b)[3] )</span>
<span style='color:#006e28;'>#define N64_HEADER_SIZE 0x40</span>
<span style='color:#006e28;'>#define N64_BC_SIZE (0x1000 - N64_HEADER_SIZE)</span>
<span style='color:#006e28;'>#define N64_CRC1 0x10</span>
<span style='color:#006e28;'>#define N64_CRC2 0x14</span>
<span style='color:#006e28;'>#define CHECKSUM_START 0x00001000</span>
<span style='color:#006e28;'>#define CHECKSUM_LENGTH 0x00100000</span>
<span style='color:#006e28;'>#define CHECKSUM_CIC6102 0xF8CA4DDC</span>
<span style='color:#006e28;'>#define CHECKSUM_CIC6103 0xA3886759</span>
<span style='color:#006e28;'>#define CHECKSUM_CIC6105 0xDF26F436</span>
<span style='color:#006e28;'>#define CHECKSUM_CIC6106 0x1FEA617A</span>
<span style='color:#006e28;'>#define Write32(Buffer, Offset, Value)\</span>
<span style='color:#006e28;'> Buffer[Offset] = (Value &amp; 0xFF000000) &gt;&gt; 24;\</span>
<span style='color:#006e28;'> Buffer[Offset + 1] = (Value &amp; 0x00FF0000) &gt;&gt; 16;\</span>
<span style='color:#006e28;'> Buffer[Offset + 2] = (Value &amp; 0x0000FF00) &gt;&gt; 8;\</span>
<span style='color:#006e28;'> Buffer[Offset + 3] = (Value &amp; 0x000000FF);\</span>
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> crc_table[<span style='color:#b08000;'>256</span>];
<span style='color:#0057ae;'>void</span> gen_table() {
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> crc, poly;
<span style='color:#0057ae;'>int</span> i, j;
poly = <span style='color:#b08000;'>0xEDB88320</span>;
<b>for</b> (i = <span style='color:#b08000;'>0</span>; i &lt; <span style='color:#b08000;'>256</span>; i++) {
crc = i;
<b>for</b> (j = <span style='color:#b08000;'>8</span>; j &gt; <span style='color:#b08000;'>0</span>; j--) {
<b>if</b> (crc &amp; <span style='color:#b08000;'>1</span>) crc = (crc &gt;&gt; <span style='color:#b08000;'>1</span>) ^ poly;
<b>else</b> crc &gt;&gt;= <span style='color:#b08000;'>1</span>;
}
crc_table[i] = crc;
}
}
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> crc32(<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>char</span> *data, <span style='color:#0057ae;'>int</span> len) {
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> crc = ~<span style='color:#b08000;'>0</span>;
<span style='color:#0057ae;'>int</span> i;
<b>for</b> (i = <span style='color:#b08000;'>0</span>; i &lt; len; i++) {
crc = (crc &gt;&gt; <span style='color:#b08000;'>8</span>) ^ crc_table[(crc ^ data[i]) &amp; <span style='color:#b08000;'>0xFF</span>];
}
<b>return</b> ~crc;
}
<span style='color:#0057ae;'>int</span> N64GetCIC(<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>char</span> *data) {
<b>switch</b> (crc32(&amp;data[N64_HEADER_SIZE], N64_BC_SIZE)) {
<b>case</b> <span style='color:#b08000;'>0x6170A4A1</span>: <b>return</b> <span style='color:#b08000;'>6101</span>;
<b>case</b> <span style='color:#b08000;'>0x90BB6CB5</span>: <b>return</b> <span style='color:#b08000;'>6102</span>;
<b>case</b> <span style='color:#b08000;'>0x0B050EE0</span>: <b>return</b> <span style='color:#b08000;'>6103</span>;
<b>case</b> <span style='color:#b08000;'>0x98BC2C86</span>: <b>return</b> <span style='color:#b08000;'>6105</span>;
<b>case</b> <span style='color:#b08000;'>0xACC8580A</span>: <b>return</b> <span style='color:#b08000;'>6106</span>;
}
<b>return</b> <span style='color:#b08000;'>6105</span>;
}
<span style='color:#0057ae;'>int</span> N64CalcCRC(<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> *crc, <span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>char</span> *data) {
<span style='color:#0057ae;'>int</span> bootcode, i;
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> seed;
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> t1, t2, t3;
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> t4, t5, t6;
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> r, d;
<b>switch</b> ((bootcode = N64GetCIC(data))) {
<b>case</b> <span style='color:#b08000;'>6101</span>:
<b>case</b> <span style='color:#b08000;'>6102</span>:
seed = CHECKSUM_CIC6102;
<b>break</b>;
<b>case</b> <span style='color:#b08000;'>6103</span>:
seed = CHECKSUM_CIC6103;
<b>break</b>;
<b>case</b> <span style='color:#b08000;'>6105</span>:
seed = CHECKSUM_CIC6105;
<b>break</b>;
<b>case</b> <span style='color:#b08000;'>6106</span>:
seed = CHECKSUM_CIC6106;
<b>break</b>;
<b>default</b>:
<b>return</b> <span style='color:#b08000;'>1</span>;
}
t1 = t2 = t3 = t4 = t5 = t6 = seed;
i = CHECKSUM_START;
<b>while</b> (i &lt; (CHECKSUM_START + CHECKSUM_LENGTH)) {
d = BYTES2LONG(&amp;data[i]);
<b>if</b> ((t6 + d) &lt; t6) t4++;
t6 += d;
t3 ^= d;
r = ROL(d, (d &amp; <span style='color:#b08000;'>0x1F</span>));
t5 += r;
<b>if</b> (t2 &gt; d) t2 ^= r;
<b>else</b> t2 ^= t6 ^ d;
<b>if</b> (bootcode == <span style='color:#b08000;'>6105</span>) t1 += BYTES2LONG(&amp;data[N64_HEADER_SIZE + <span style='color:#b08000;'>0x0710</span> + (i &amp; <span style='color:#b08000;'>0xFF</span>)]) ^ d;
<b>else</b> t1 += t5 ^ d;
i += <span style='color:#b08000;'>4</span>;
}
<b>if</b> (bootcode == <span style='color:#b08000;'>6103</span>) {
crc[<span style='color:#b08000;'>0</span>] = (t6 ^ t4) + t3;
crc[<span style='color:#b08000;'>1</span>] = (t5 ^ t2) + t1;
}
<b>else</b> <b>if</b> (bootcode == <span style='color:#b08000;'>6106</span>) {
crc[<span style='color:#b08000;'>0</span>] = (t6 * t4) + t3;
crc[<span style='color:#b08000;'>1</span>] = (t5 * t2) + t1;
}
<b>else</b> {
crc[<span style='color:#b08000;'>0</span>] = t6 ^ t4 ^ t3;
crc[<span style='color:#b08000;'>1</span>] = t5 ^ t2 ^ t1;
}
<b>return</b> <span style='color:#b08000;'>0</span>;
}
<span style='color:#0057ae;'>int</span> main(<span style='color:#0057ae;'>int</span> argc, <span style='color:#0057ae;'>char</span> **argv) {
FILE *fin;
<span style='color:#0057ae;'>int</span> cic;
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>int</span> crc[<span style='color:#b08000;'>2</span>];
<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>char</span> *buffer;
<i><span style='color:#888786;'>//Init CRC algorithm</span></i>
gen_table();
<i><span style='color:#888786;'>//Check args</span></i>
<b>if</b> (argc != <span style='color:#b08000;'>2</span>) {
printf(<span style='color:#bf0303;'>&quot;Usage: n64sums &lt;infile&gt;</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
<b>return</b> <span style='color:#b08000;'>1</span>;
}
<i><span style='color:#888786;'>//Open file</span></i>
<b>if</b> (!(fin = fopen(argv[<span style='color:#b08000;'>1</span>], <span style='color:#bf0303;'>&quot;r+b&quot;</span>))) {
printf(<span style='color:#bf0303;'>&quot;Unable to open </span><span style='color:#ff80e0;'>\&quot;</span><span style='color:#bf0303;'>%s</span><span style='color:#ff80e0;'>\&quot;</span><span style='color:#bf0303;'> in mode </span><span style='color:#ff80e0;'>\&quot;</span><span style='color:#bf0303;'>%s</span><span style='color:#ff80e0;'>\&quot;\n</span><span style='color:#bf0303;'>&quot;</span>, argv[<span style='color:#b08000;'>1</span>], <span style='color:#bf0303;'>&quot;r+b&quot;</span>);
<b>return</b> <span style='color:#b08000;'>1</span>;
}
<i><span style='color:#888786;'>//Allocate memory</span></i>
<b>if</b> (!(buffer = (<span style='color:#0057ae;'>unsigned</span> <span style='color:#0057ae;'>char</span>*)malloc((CHECKSUM_START + CHECKSUM_LENGTH)))) {
printf(<span style='color:#bf0303;'>&quot;Unable to allocate %d bytes of memory</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>, (CHECKSUM_START + CHECKSUM_LENGTH));
fclose(fin);
<b>return</b> <span style='color:#b08000;'>1</span>;
}
<i><span style='color:#888786;'>//Read data</span></i>
<b>if</b> (fread(buffer, <span style='color:#b08000;'>1</span>, (CHECKSUM_START + CHECKSUM_LENGTH), fin) != (CHECKSUM_START + CHECKSUM_LENGTH)) {
printf(<span style='color:#bf0303;'>&quot;Unable to read %d bytes of data (invalid N64 image?)</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>, (CHECKSUM_START + CHECKSUM_LENGTH));
fclose(fin);
free(buffer);
<b>return</b> <span style='color:#b08000;'>1</span>;
}
<i><span style='color:#888786;'>//Check CIC BootChip</span></i>
cic = N64GetCIC(buffer);
printf(<span style='color:#bf0303;'>&quot;BootChip: &quot;</span>);
printf((cic ? <span style='color:#bf0303;'>&quot;CIC-NUS-%d</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span> : <span style='color:#bf0303;'>&quot;Unknown</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>), cic);
<i><span style='color:#888786;'>//Calculate CRC</span></i>
<b>if</b> (N64CalcCRC(crc, buffer)) {
printf(<span style='color:#bf0303;'>&quot;Unable to calculate CRC</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
}
<b>else</b> {
printf(<span style='color:#bf0303;'>&quot;CRC 1: 0x%08X &quot;</span>, BYTES2LONG(&amp;buffer[N64_CRC1]));
printf(<span style='color:#bf0303;'>&quot;Calculated: 0x%08X &quot;</span>, crc[<span style='color:#b08000;'>0</span>]);
<b>if</b> (crc[<span style='color:#b08000;'>0</span>] == BYTES2LONG(&amp;buffer[N64_CRC1]))
printf(<span style='color:#bf0303;'>&quot;(Good)</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
<b>else</b>{
Write32(buffer, N64_CRC1, crc[<span style='color:#b08000;'>0</span>]);
fseek(fin, N64_CRC1, SEEK_SET);
fwrite(&amp;buffer[N64_CRC1], <span style='color:#b08000;'>1</span>, <span style='color:#b08000;'>4</span>, fin);
printf(<span style='color:#bf0303;'>&quot;(Bad, fixed)</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
}
printf(<span style='color:#bf0303;'>&quot;CRC 2: 0x%08X &quot;</span>, BYTES2LONG(&amp;buffer[N64_CRC2]));
printf(<span style='color:#bf0303;'>&quot;Calculated: 0x%08X &quot;</span>, crc[<span style='color:#b08000;'>1</span>]);
<b>if</b> (crc[<span style='color:#b08000;'>1</span>] == BYTES2LONG(&amp;buffer[N64_CRC2]))
printf(<span style='color:#bf0303;'>&quot;(Good)</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
<b>else</b>{
Write32(buffer, N64_CRC2, crc[<span style='color:#b08000;'>1</span>]);
fseek(fin, N64_CRC2, SEEK_SET);
fwrite(&amp;buffer[N64_CRC2], <span style='color:#b08000;'>1</span>, <span style='color:#b08000;'>4</span>, fin);
printf(<span style='color:#bf0303;'>&quot;(Bad, fixed)</span><span style='color:#ff80e0;'>\n</span><span style='color:#bf0303;'>&quot;</span>);
}
}
fclose(fin);
free(buffer);
<b>return</b> <span style='color:#b08000;'>0</span>;
}
</pre>
</body>
</html>

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#Single Makefile for all devices
all:
make -f Make_stm_nes clean all
cp -r build_stm/* build_stmn
make -f Make_stm_inl6 clean all
cp -r build_stm/* build_stm6
make -f Make_avr clean hex
make -f Make_stm_inl6 clean
make -f Make_stm_inl6
avr:
make -f Make_avr clean program

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Archive member included to satisfy reference by file (symbol)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
C:\Users\paul\AppData\Local\Temp\cc55YkeK.o (__aeabi_unwind_cpp_pr0)
C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o (__aeabi_unwind_cpp_pr0)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o) (restore_core_regs)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
@ -51,9 +51,9 @@ c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o) (_exit)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o)
C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o (__gnu_thumb1_case_uqi)
C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o (__gnu_thumb1_case_uqi)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uhi.o)
C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o (__gnu_thumb1_case_uhi)
C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o (__gnu_thumb1_case_uhi)
Allocating common symbols
Common symbol size file
@ -133,39 +133,39 @@ Discarded input sections
.ARM.exidx 0x00000000 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.ARM.attributes
0x00000000 0x1b c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.text 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.stack 0x00000000 0xc00 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.heap 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.debug_line 0x00000000 0x7c C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.debug_info 0x00000000 0x22 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.debug_abbrev 0x00000000 0x12 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.text 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.stack 0x00000000 0xc00 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.heap 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_line 0x00000000 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_info 0x00000000 0x22 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_abbrev 0x00000000 0x12 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_aranges
0x00000000 0x28 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.debug_str 0x00000000 0x68 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.debug_ranges 0x00000000 0x20 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
0x00000000 0x28 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_str 0x00000000 0x70 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.debug_ranges 0x00000000 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.ARM.attributes
0x00000000 0x1b C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.text 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text 0x00000000 0x4 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.ARM.extab 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.ARM.exidx 0x00000000 0x8 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.debug_line 0x00000000 0x49 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.debug_info 0x00000000 0x26 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.debug_abbrev 0x00000000 0x14 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
0x00000000 0x1b C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.text 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text 0x00000000 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.ARM.extab 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.ARM.exidx 0x00000000 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.debug_line 0x00000000 0x49 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.debug_info 0x00000000 0x26 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.debug_abbrev 0x00000000 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.debug_aranges
0x00000000 0x20 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.debug_str 0x00000000 0x65 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
0x00000000 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.debug_str 0x00000000 0x6d C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.ARM.attributes
0x00000000 0x21 C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.ARM.extab 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
0x00000000 0x21 C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.ARM.extab 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.data 0x00000000 0x0 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.bss 0x00000000 0x0 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.debug_frame 0x00000000 0x2b4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
@ -428,10 +428,10 @@ Linker script and memory map
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
LOAD C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
LOAD C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
LOAD C:\Users\paul\AppData\Local\Temp\cc55YkeK.o
LOAD C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\ccYiu3Ln.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
START GROUP
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a
@ -445,17 +445,17 @@ END GROUP
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtend.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtn.o
.text 0x08000000 0x5610
.text 0x08000000 0x5740
*(.isr_vector)
.isr_vector 0x08000000 0xc0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.isr_vector 0x08000000 0xc0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
0x08000000 __isr_vector
*(.usb_driver)
.usb_driver 0x080000c0 0x3bc C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.usb_driver 0x080000c0 0x3bc C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x08000198 USB_IRQHandler
*(.usb_desc)
.usb_desc 0x0800047c 0xb8 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.usb_desc 0x0800047c 0xb8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*(.hardfault)
.hardfault 0x08000534 0x2 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.hardfault 0x08000534 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
0x08000534 TIM1_CC_IRQHandler
0x08000534 TSC_IRQHandler
0x08000534 ADC1_COMP_IRQHandler
@ -494,7 +494,7 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
0x08000534 USART1_IRQHandler
0x08000534 TIM1_BRK_UP_TRG_COM_IRQHandler
*fill* 0x08000536 0x2 ff
.hardfault 0x08000538 0xc C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.hardfault 0x08000538 0xc C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x08000538 HardFault_Handler
*_thumb1_case_uqi.o()
.text 0x08000544 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o)
@ -510,11 +510,11 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
0x0800058c 0x1e c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uhi.o)
*(.fw_update)
*fill* 0x080005aa 0x2 ff
.fw_update 0x080005ac 0x150 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.fw_update 0x080005ac 0x150 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x00000770 . = 0x770
*fill* 0x080006fc 0x74 ff
*(.fw_up_main)
.fw_up_main 0x08000770 0x70 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.fw_up_main 0x08000770 0x70 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x00000800 . = 0x800
*fill* 0x080007e0 0x20 ff
*(.appver)
@ -522,180 +522,187 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*fill* 0x08000800 0x4 ff
*(.reset_handler)
.reset_handler
0x08000804 0x3c C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
0x08000804 0x3c C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
0x08000804 Reset_Handler
*(.usbFuncWrite)
.usbFuncWrite 0x08000840 0x44 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.usbFuncWrite 0x08000840 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*(.usbFuncSetup)
.usbFuncSetup 0x08000884 0x1c7c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.usbFuncSetup 0x08000884 0x1d04 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*(.text*)
.text.snes_page_rd_poll.constprop.27
0x08002500 0x7c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.nes_cpu_page_rd_poll.constprop.26
0x0800257c 0x6c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.nes_ppu_page_rd_poll.constprop.23
0x080025e8 0x68 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.snes_page_rd_poll.constprop.29
0x08002588 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_cpu_page_rd_poll.constprop.28
0x08002604 0x6c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_ppu_page_rd_poll.constprop.25
0x08002670 0x68 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.append_pairity
0x08002650 0x1e C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080026d8 0x1e C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.delay_us
0x0800266e 0x14 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
*fill* 0x08002682 0x2 ff
.text.lfsr_32 0x08002684 0x30 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.snes_wr 0x080026b4 0x60 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.snes_rd 0x08002714 0x48 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080026f6 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x0800270a 0x2 ff
.text.lfsr_32 0x0800270c 0x30 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.snes_wr 0x0800273c 0x60 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.snes_rd 0x0800279c 0x48 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.write_page_snes.constprop.34
0x0800275c 0x194 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080027e4 0x194 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.snes_3v_flash_wr
0x080028f0 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002978 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.snes_5v_flash_wr
0x08002940 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080029c8 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.genesis_page_rd
0x08002990 0xa4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002a18 0xa4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc3s_prgrom_flash_wr
0x08002abc 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_dualport_wr
0x08002a34 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002ac0 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_dualport_rd
0x08002a84 0x38 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002b10 0x38 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_ppu_wr
0x08002abc 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002b48 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_ppu_rd
0x08002b0c 0x38 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002b98 0x38 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc3_chrrom_flash_wr
0x08002b44 0x44 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002bd0 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nrom_chrrom_flash_wr
0x08002b88 0x44 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002c14 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_m2_high_wr
0x08002c58 0x60 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_cpu_wr
0x08002bcc 0x6c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002cb8 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.cdream_chrrom_flash_wr
0x08002c38 0x8c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002d34 0x8c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc4_chrrom_flash_wr
0x08002cc4 0x74 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002dc0 0x74 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.cnrom_chrrom_flash_wr
0x08002d38 0x7c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002e34 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nes_cpu_rd
0x08002db4 0x40 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002eb0 0x38 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.tssop_prgrom_flash_wr
0x08002ee8 0x2a C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.a53_tssop_prgrom_flash_wr
0x08002f12 0x36 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.gtrom_prgrom_flash_wr
0x08002df4 0x44 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002f48 0x4c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.map30_prgrom_flash_wr
0x08002e38 0x74 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.mmc4_prgrom_sop_flash_wr
0x08002eac 0x54 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08002f94 0x74 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc4_prgrom_flash_wr
0x08003008 0x54 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc3_prgrom_flash_wr
0x08002f00 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x0800305c 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.disc_push_exp0_prgrom_wr
0x08002f50 0x48 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080030ac 0x48 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.discrete_exp0_prgrom_wr
0x08002f98 0x58 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080030f4 0x58 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.unrom_prgrom_flash_wr
0x08002ff0 0x64 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x0800314c 0x64 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.nrom_prgrom_flash_wr
0x08003054 0x44 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080031b0 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.n64_latch_addr
0x08003098 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080031f4 0x60 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.pbje_scan
0x080030e8 0x10c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08003254 0x10c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.pbje_state_change
0x080031f4 0x88 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08003360 0x88 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.jtag_init_pbje
0x0800327c 0xe0 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080033e8 0xe0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.jtag_run_pbje.part.0
0x0800335c 0xb8 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080034c8 0xb8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.io_reset
0x08003414 0x174 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.text.gba_rd 0x08003588 0x4c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08003580 0x174 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.gba_rd 0x080036f4 0x4c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.write_page_verify
0x080035d4 0x5c C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08003740 0x5c C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.write_page
0x08003630 0x34 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x0800379c 0x34 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.get_next_buff
0x08003664 0x54 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080037d0 0x54 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc1_wr.constprop.12
0x080036b8 0x22 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
*fill* 0x080036da 0x2 ff
0x08003824 0x22 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x08003846 0x2 ff
.text.mmc1_chrrom_flash_wr
0x080036dc 0x60 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x08003848 0x60 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.mmc1_prgrom_flash_wr
0x0800373c 0x50 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080038a8 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.swim_wotf
0x0800378c 0xb4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080038f8 0xb4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.swim_rotf
0x08003840 0xac C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080039ac 0xac C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.text.startup.main
0x080038ec 0xb78 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x080038ec main
*fill* 0x08004464 0xc ff
.text 0x08004470 0x154 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
0x08004470 swim_xfr
.text 0x080045c4 0xa08 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0x08004880 _Unwind_GetCFA
0x08004884 __gnu_Unwind_RaiseException
0x080048d8 __gnu_Unwind_ForcedUnwind
0x080048ec __gnu_Unwind_Resume
0x08004934 __gnu_Unwind_Resume_or_Rethrow
0x08004950 _Unwind_Complete
0x08004954 _Unwind_DeleteException
0x08004964 _Unwind_VRS_Get
0x080049ac _Unwind_VRS_Set
0x080049f4 __gnu_Unwind_Backtrace
0x08004d44 __aeabi_unwind_cpp_pr0
0x08004d50 __aeabi_unwind_cpp_pr1
0x08004d5c __aeabi_unwind_cpp_pr2
0x08004d68 _Unwind_VRS_Pop
.text 0x08004fcc 0x144 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
0x08004fcc __restore_core_regs
0x08004fcc restore_core_regs
0x08004ff8 __gnu_Unwind_Restore_VFP
0x08004ffc __gnu_Unwind_Save_VFP
0x08005000 __gnu_Unwind_Restore_VFP_D
0x08005004 __gnu_Unwind_Save_VFP_D
0x08005008 __gnu_Unwind_Restore_VFP_D_16_to_31
0x0800500c __gnu_Unwind_Save_VFP_D_16_to_31
0x08005010 __gnu_Unwind_Restore_WMMXD
0x08005014 __gnu_Unwind_Save_WMMXD
0x08005018 __gnu_Unwind_Restore_WMMXC
0x0800501c __gnu_Unwind_Save_WMMXC
0x08005020 ___Unwind_RaiseException
0x08005020 _Unwind_RaiseException
0x08005050 _Unwind_Resume
0x08005050 ___Unwind_Resume
0x08005080 _Unwind_Resume_or_Rethrow
0x08005080 ___Unwind_Resume_or_Rethrow
0x080050b0 _Unwind_ForcedUnwind
0x080050b0 ___Unwind_ForcedUnwind
0x080050e0 ___Unwind_Backtrace
0x080050e0 _Unwind_Backtrace
.text 0x08005110 0x39c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08005164 __gnu_unwind_execute
0x08005454 __gnu_unwind_frame
0x0800547c _Unwind_GetRegionStart
0x08005488 _Unwind_GetLanguageSpecificData
0x0800549c _Unwind_GetDataRelBase
0x080054a4 _Unwind_GetTextRelBase
.text.abort 0x080054ac 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o)
0x080054ac abort
.text.memcpy 0x080054bc 0x88 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-memcpy-stub.o)
0x080054bc memcpy
0x08003a58 0xb48 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x08003a58 main
.text 0x080045a0 0x154 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
0x080045a0 swim_xfr
.text 0x080046f4 0xa08 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0x080049b0 _Unwind_GetCFA
0x080049b4 __gnu_Unwind_RaiseException
0x08004a08 __gnu_Unwind_ForcedUnwind
0x08004a1c __gnu_Unwind_Resume
0x08004a64 __gnu_Unwind_Resume_or_Rethrow
0x08004a80 _Unwind_Complete
0x08004a84 _Unwind_DeleteException
0x08004a94 _Unwind_VRS_Get
0x08004adc _Unwind_VRS_Set
0x08004b24 __gnu_Unwind_Backtrace
0x08004e74 __aeabi_unwind_cpp_pr0
0x08004e80 __aeabi_unwind_cpp_pr1
0x08004e8c __aeabi_unwind_cpp_pr2
0x08004e98 _Unwind_VRS_Pop
.text 0x080050fc 0x144 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
0x080050fc __restore_core_regs
0x080050fc restore_core_regs
0x08005128 __gnu_Unwind_Restore_VFP
0x0800512c __gnu_Unwind_Save_VFP
0x08005130 __gnu_Unwind_Restore_VFP_D
0x08005134 __gnu_Unwind_Save_VFP_D
0x08005138 __gnu_Unwind_Restore_VFP_D_16_to_31
0x0800513c __gnu_Unwind_Save_VFP_D_16_to_31
0x08005140 __gnu_Unwind_Restore_WMMXD
0x08005144 __gnu_Unwind_Save_WMMXD
0x08005148 __gnu_Unwind_Restore_WMMXC
0x0800514c __gnu_Unwind_Save_WMMXC
0x08005150 ___Unwind_RaiseException
0x08005150 _Unwind_RaiseException
0x08005180 _Unwind_Resume
0x08005180 ___Unwind_Resume
0x080051b0 _Unwind_Resume_or_Rethrow
0x080051b0 ___Unwind_Resume_or_Rethrow
0x080051e0 _Unwind_ForcedUnwind
0x080051e0 ___Unwind_ForcedUnwind
0x08005210 ___Unwind_Backtrace
0x08005210 _Unwind_Backtrace
.text 0x08005240 0x39c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08005294 __gnu_unwind_execute
0x08005584 __gnu_unwind_frame
0x080055ac _Unwind_GetRegionStart
0x080055b8 _Unwind_GetLanguageSpecificData
0x080055cc _Unwind_GetDataRelBase
0x080055d4 _Unwind_GetTextRelBase
.text.abort 0x080055dc 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o)
0x080055dc abort
.text.memcpy 0x080055ec 0x88 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-memcpy-stub.o)
0x080055ec memcpy
.text._raise_r
0x08005544 0x5c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x08005544 _raise_r
.text.raise 0x080055a0 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x080055a0 raise
.text._kill_r 0x080055b4 0x28 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x080055b4 _kill_r
0x08005674 0x5c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x08005674 _raise_r
.text.raise 0x080056d0 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x080056d0 raise
.text._kill_r 0x080056e4 0x28 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x080056e4 _kill_r
.text._getpid_r
0x080055dc 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x080055dc _getpid_r
.text._getpid 0x080055e4 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)
0x080055e4 _getpid
.text._kill 0x080055f4 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(kill.o)
0x080055f4 _kill
.text._exit 0x08005604 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
0x08005604 _exit
0x0800570c 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x0800570c _getpid_r
.text._getpid 0x08005714 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)
0x08005714 _getpid
.text._kill 0x08005724 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(kill.o)
0x08005724 _kill
.text._exit 0x08005734 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
0x08005734 _exit
*(.init)
.init 0x08005608 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x08005608 _init
.init 0x08005738 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x08005738 _init
*(.fini)
.fini 0x0800560c 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x0800560c _fini
.fini 0x0800573c 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x0800573c _fini
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors)
@ -709,42 +716,42 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*(.rodata*)
*(.eh_frame*)
.glue_7 0x08005610 0x0
.glue_7 0x08005610 0x0 linker stubs
.glue_7 0x08005740 0x0
.glue_7 0x08005740 0x0 linker stubs
.glue_7t 0x08005610 0x0
.glue_7t 0x08005610 0x0 linker stubs
.glue_7t 0x08005740 0x0
.glue_7t 0x08005740 0x0 linker stubs
.vfp11_veneer 0x08005610 0x0
.vfp11_veneer 0x08005610 0x0 linker stubs
.vfp11_veneer 0x08005740 0x0
.vfp11_veneer 0x08005740 0x0 linker stubs
.v4_bx 0x08005610 0x0
.v4_bx 0x08005610 0x0 linker stubs
.v4_bx 0x08005740 0x0
.v4_bx 0x08005740 0x0 linker stubs
.iplt 0x08005610 0x0
.iplt 0x08005610 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.iplt 0x08005740 0x0
.iplt 0x08005740 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.ARM.extab 0x08005610 0x30
.ARM.extab 0x08005740 0x30
*(.ARM.extab* .gnu.linkonce.armextab.*)
.ARM.extab 0x08005610 0x24 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.extab 0x08005634 0xc c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08005640 __exidx_start = .
.ARM.extab 0x08005740 0x24 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.extab 0x08005764 0xc c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08005770 __exidx_start = .
.ARM.exidx 0x08005640 0xd0
.ARM.exidx 0x08005770 0xd0
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
.ARM.exidx 0x08005640 0x8 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.ARM.exidx 0x08005770 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
0x10 (size before relaxing)
.ARM.exidx 0x08005648 0x98 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.exidx 0x08005778 0x98 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0xd8 (size before relaxing)
.ARM.exidx 0x080056e0 0x30 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
.ARM.exidx 0x08005810 0x30 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x48 (size before relaxing)
0x08005710 __exidx_end = .
0x08005710 __etext = ALIGN (0x4)
0x08005840 __exidx_end = .
0x08005840 __etext = ALIGN (0x4)
.rel.dyn 0x08005710 0x0
.rel.iplt 0x08005710 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.rel.dyn 0x08005840 0x0
.rel.iplt 0x08005840 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.data 0x20000000 0x430 load address 0x08005710
.data 0x20000000 0x430 load address 0x08005840
0x20000000 __data_start__ = .
*(vtable)
*(.data*)
@ -772,77 +779,77 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*(.fastrun)
0x20000430 __data_end__ = .
.igot.plt 0x20000430 0x0 load address 0x08005b40
.igot.plt 0x20000430 0x0 C:\Users\paul\AppData\Local\Temp\cccsJC0R.o
.igot.plt 0x20000430 0x0 load address 0x08005c70
.igot.plt 0x20000430 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOm59Pi.o
.bss 0x20000430 0x308 load address 0x08005b40
.bss 0x20000430 0x308 load address 0x08005c70
0x20000430 . = ALIGN (0x4)
0x20000430 __bss_start__ = .
*(.bss*)
.bss.addr_ptr 0x20000430 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.addrh 0x20000434 0x2 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.addr_ptr 0x20000430 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.addrh 0x20000434 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.bank_table
0x20000436 0x2 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.buff0 0x20000438 0x14 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.buff1 0x2000044c 0x14 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.buff2 0x20000460 0x14 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.buff3 0x20000474 0x14 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x20000436 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.buff0 0x20000438 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.buff1 0x2000044c 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.buff2 0x20000460 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.buff3 0x20000474 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.cur_addr_hi
0x20000488 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x20000488 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000489 0x1
.bss.cur_addr_lo
0x2000048a 0x2 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.cur_bank 0x2000048c 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x2000048a 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.cur_bank 0x2000048c 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x2000048d 0x3
.bss.cur_buff 0x20000490 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.cur_buff 0x20000490 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.cur_usb_load_buff
0x20000494 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x20000494 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.incoming_bytes_remain
0x20000498 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x20000498 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000499 0x3
.bss.lfsr 0x2000049c 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.n64_bank 0x200004a0 0x2 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.num_buff.5104
0x200004a2 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.lfsr 0x2000049c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.n64_bank 0x200004a0 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.num_buff.5134
0x200004a2 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.num_prg_banks
0x200004a3 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004a3 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.oper_info_struct
0x200004a4 0x20 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004a4 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.pbje_command
0x200004c4 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004c4 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.pbje_data
0x200004c5 0x20 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004c5 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.pbje_numclk
0x200004e5 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004e5 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.pbje_status
0x200004e6 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004e6 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.raw_bank_status
0x200004e7 0x10 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004e7 0x10 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x200004f7 0x1
.bss.raw_buffer16
0x200004f8 0x200 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200004f8 0x200 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.rv16.4756
0x200006f8 0x8 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.rv16.5024
0x20000700 0x8 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x200006f8 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.rv16.5054
0x20000700 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.stm_debug_disable
0x20000708 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x20000708 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000709 0x3
.bss.swim_base
0x2000070c 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.swim_pin 0x20000710 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x2000070c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.swim_pin 0x20000710 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000711 0x3
.bss.tck_base 0x20000714 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tck_pin 0x20000718 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tck_base 0x20000714 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.tck_pin 0x20000718 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000719 0x3
.bss.tdi_base 0x2000071c 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tdi_pin 0x20000720 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tdi_base 0x2000071c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.tdi_pin 0x20000720 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000721 0x3
.bss.tdo_base 0x20000724 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tdo_pin 0x20000728 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tdo_base 0x20000724 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.tdo_pin 0x20000728 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*fill* 0x20000729 0x3
.bss.tms_base 0x2000072c 0x4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tms_pin 0x20000730 0x1 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.bss.tms_base 0x2000072c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.bss.tms_pin 0x20000730 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
*(COMMON)
*fill* 0x20000731 0x3
COMMON 0x20000734 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-reent.o)
@ -869,45 +876,45 @@ OUTPUT(build_stm/inlretro_stm.elf elf32-littlearm)
.ARM.attributes
0x00000000 0x1e c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
.ARM.attributes
0x0000001e 0x2f C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x0000001e 0x2f C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.ARM.attributes
0x0000004d 0x21 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
0x0000004d 0x21 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.comment 0x00000000 0x7f
.comment 0x00000000 0x7f C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.comment 0x00000000 0x7f C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x80 (size before relaxing)
.debug_info 0x00000000 0x55a8
.debug_info 0x00000000 0x5582 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_info 0x00005582 0x26 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.debug_info 0x00000000 0x57e5
.debug_info 0x00000000 0x57bf C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_info 0x000057bf 0x26 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.debug_abbrev 0x00000000 0x6af
.debug_abbrev 0x00000000 0x69b C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_abbrev 0x0000069b 0x14 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.debug_abbrev 0x00000000 0x6ba
.debug_abbrev 0x00000000 0x6a6 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_abbrev 0x000006a6 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.debug_loc 0x00000000 0x5608
.debug_loc 0x00000000 0x5608 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_loc 0x00000000 0x8e80
.debug_loc 0x00000000 0x8e80 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_aranges 0x00000000 0x1f8
.debug_aranges 0x00000000 0x218
.debug_aranges
0x00000000 0x1d8 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x00000000 0x1f8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_aranges
0x000001d8 0x20 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
0x000001f8 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.debug_ranges 0x00000000 0xde0
.debug_ranges 0x00000000 0xde0 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_ranges 0x00000000 0xe08
.debug_ranges 0x00000000 0xe08 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_line 0x00000000 0x1b54
.debug_line 0x00000000 0x1a61 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_line 0x00001a61 0xf3 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.debug_line 0x00000000 0x1bfa
.debug_line 0x00000000 0x1b07 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.debug_line 0x00001b07 0xf3 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.debug_str 0x00000000 0x1248
.debug_str 0x00000000 0x11e7 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
0x1304 (size before relaxing)
.debug_str 0x000011e7 0x61 C:\Users\paul\AppData\Local\Temp\ccUfmgJG.o
.debug_str 0x00000000 0x12b2
.debug_str 0x00000000 0x1249 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
0x1384 (size before relaxing)
.debug_str 0x00001249 0x69 C:\Users\PAUL_D~1\AppData\Local\Temp\cc21n1gw.o
.debug_frame 0x00000000 0x5f4
.debug_frame 0x00000000 0x5f4 C:\Users\paul\AppData\Local\Temp\ccpDYpEb.ltrans0.ltrans.o
.debug_frame 0x00000000 0x658
.debug_frame 0x00000000 0x658 C:\Users\PAUL_D~1\AppData\Local\Temp\ccu17E4l.ltrans0.ltrans.o
.stabstr 0x00000000 0x76
.stabstr 0x00000000 0x76 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)

BIN
firmware/build_stm6/inlretro_stm.bin → firmware/build_stm6/inlretro_stm_AV02.bin
View File

Binary file not shown.

BIN
firmware/build_stm6/inlretro_stm_AV03.bin Normal file
View File

Binary file not shown.

BIN
firmware/build_stmn/inlretro_stm.axf
View File

Binary file not shown.

BIN
firmware/build_stmn/inlretro_stm.elf
View File

Binary file not shown.

1918
firmware/build_stmn/inlretro_stm.hex
View File

File diff suppressed because it is too large Load Diff

493
firmware/build_stmn/inlretro_stm.map
View File

@ -1,7 +1,7 @@
Archive member included to satisfy reference by file (symbol)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
C:\Users\paul\AppData\Local\Temp\ccSRey5t.o (__aeabi_unwind_cpp_pr0)
C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o (__aeabi_unwind_cpp_pr0)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o) (restore_core_regs)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
@ -51,9 +51,9 @@ c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o) (_exit)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o)
C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o (__gnu_thumb1_case_uqi)
C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o (__gnu_thumb1_case_uqi)
c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uhi.o)
C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o (__gnu_thumb1_case_uhi)
C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o (__gnu_thumb1_case_uhi)
Allocating common symbols
Common symbol size file
@ -88,6 +88,7 @@ __lock___malloc_recursive_mutex
0x1 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-lock.o)
tdi_base 0x4 source/jtag.o (symbol from plugin)
tdo_base 0x4 source/jtag.o (symbol from plugin)
num_prg_banks 0x1 source/nes.o (symbol from plugin)
buff2 0x14 source/buffer.o (symbol from plugin)
cur_bank 0x1 source/nes.o (symbol from plugin)
addr_ptr 0x4 source/bootload.o (symbol from plugin)
@ -131,39 +132,39 @@ Discarded input sections
.ARM.exidx 0x00000000 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.ARM.attributes
0x00000000 0x1b c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.text 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.stack 0x00000000 0xc00 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.heap 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.debug_line 0x00000000 0x7c C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.debug_info 0x00000000 0x22 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.debug_abbrev 0x00000000 0x12 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.text 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.stack 0x00000000 0xc00 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.heap 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_line 0x00000000 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_info 0x00000000 0x22 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_abbrev 0x00000000 0x12 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_aranges
0x00000000 0x28 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.debug_str 0x00000000 0x80 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.debug_ranges 0x00000000 0x20 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
0x00000000 0x28 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_str 0x00000000 0x70 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.debug_ranges 0x00000000 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.ARM.attributes
0x00000000 0x1b C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.text 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.text 0x00000000 0x4 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.ARM.extab 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.ARM.exidx 0x00000000 0x8 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.debug_line 0x00000000 0x49 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.debug_info 0x00000000 0x26 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.debug_abbrev 0x00000000 0x14 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
0x00000000 0x1b C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.text 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text 0x00000000 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.ARM.extab 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.ARM.exidx 0x00000000 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.debug_line 0x00000000 0x49 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.debug_info 0x00000000 0x26 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.debug_abbrev 0x00000000 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.debug_aranges
0x00000000 0x20 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.debug_str 0x00000000 0x7d C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
0x00000000 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.debug_str 0x00000000 0x6d C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.ARM.attributes
0x00000000 0x21 C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
.data 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.bss 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.ARM.extab 0x00000000 0x0 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
0x00000000 0x21 C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
.data 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.bss 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.ARM.extab 0x00000000 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.data 0x00000000 0x0 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.bss 0x00000000 0x0 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.debug_frame 0x00000000 0x2b4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
@ -426,10 +427,10 @@ Linker script and memory map
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
LOAD C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
LOAD C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
LOAD C:\Users\paul\AppData\Local\Temp\ccSRey5t.o
LOAD C:\Users\paul\AppData\Local\Temp\ccK626T0.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\cclouYWi.o
LOAD C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
START GROUP
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a
@ -443,17 +444,17 @@ END GROUP
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtend.o
LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtn.o
.text 0x08000000 0x49b0
.text 0x08000000 0x4c60
*(.isr_vector)
.isr_vector 0x08000000 0xc0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.isr_vector 0x08000000 0xc0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
0x08000000 __isr_vector
*(.usb_driver)
.usb_driver 0x080000c0 0x3bc C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.usb_driver 0x080000c0 0x3bc C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x08000198 USB_IRQHandler
*(.usb_desc)
.usb_desc 0x0800047c 0xb8 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.usb_desc 0x0800047c 0xb8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*(.hardfault)
.hardfault 0x08000534 0x2 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.hardfault 0x08000534 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
0x08000534 TIM1_CC_IRQHandler
0x08000534 TSC_IRQHandler
0x08000534 ADC1_COMP_IRQHandler
@ -492,7 +493,7 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
0x08000534 USART1_IRQHandler
0x08000534 TIM1_BRK_UP_TRG_COM_IRQHandler
*fill* 0x08000536 0x2 ff
.hardfault 0x08000538 0xc C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.hardfault 0x08000538 0xc C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x08000538 HardFault_Handler
*_thumb1_case_uqi.o()
.text 0x08000544 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o)
@ -508,11 +509,11 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
0x0800058c 0x1e c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uhi.o)
*(.fw_update)
*fill* 0x080005aa 0x2 ff
.fw_update 0x080005ac 0x15c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.fw_update 0x080005ac 0x15c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x00000770 . = 0x770
*fill* 0x08000708 0x68 ff
*(.fw_up_main)
.fw_up_main 0x08000770 0x70 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.fw_up_main 0x08000770 0x70 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x00000800 . = 0x800
*fill* 0x080007e0 0x20 ff
*(.appver)
@ -520,163 +521,173 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*fill* 0x08000800 0x4 ff
*(.reset_handler)
.reset_handler
0x08000804 0x3c C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
0x08000804 0x3c C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
0x08000804 Reset_Handler
*(.usbFuncWrite)
.usbFuncWrite 0x08000840 0x44 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.usbFuncWrite 0x08000840 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*(.usbFuncSetup)
.usbFuncSetup 0x08000884 0x152c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.usbFuncSetup 0x08000884 0x1604 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*(.text*)
.text.nes_cpu_page_rd_poll.constprop.19
0x08001db0 0xc4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.text.nes_ppu_page_rd_poll.constprop.17
0x08001e74 0xbc C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.text.nes_cpu_page_rd_poll.constprop.21
0x08001e88 0xc4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_ppu_page_rd_poll.constprop.19
0x08001f4c 0xbc C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.append_pairity
0x08001f30 0x1e C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002008 0x1e C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.delay_us
0x08001f4e 0x14 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
*fill* 0x08001f62 0x2 ff
.text.lfsr_32 0x08001f64 0x30 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002026 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x0800203a 0x2 ff
.text.lfsr_32 0x0800203c 0x30 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc3s_prgrom_flash_wr
0x0800206c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_dualport_wr
0x08001f94 0x8c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002070 0x8c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_dualport_rd
0x08002020 0x80 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080020fc 0x80 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_ppu_wr
0x080020a0 0x90 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x0800217c 0x90 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_ppu_rd
0x08002130 0x84 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x0800220c 0x84 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc3_chrrom_flash_wr
0x080021b4 0x44 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002290 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nrom_chrrom_flash_wr
0x080021f8 0x44 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080022d4 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_m2_high_wr
0x08002318 0x98 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_cpu_wr
0x0800223c 0xa8 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080023b0 0xb4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.cdream_chrrom_flash_wr
0x080022e4 0x84 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002464 0x8c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc4_chrrom_flash_wr
0x08002368 0x74 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080024f0 0x74 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.cnrom_chrrom_flash_wr
0x080023dc 0x7c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002564 0x7c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nes_cpu_rd
0x08002458 0x88 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080025e0 0x84 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.tssop_prgrom_flash_wr
0x08002664 0x2a C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.a53_tssop_prgrom_flash_wr
0x0800268e 0x36 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.gtrom_prgrom_flash_wr
0x080026c4 0x4c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.map30_prgrom_flash_wr
0x080024e0 0x74 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.text.mmc4_prgrom_sop_flash_wr
0x08002554 0x54 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002710 0x74 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc4_prgrom_flash_wr
0x08002784 0x54 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc3_prgrom_flash_wr
0x080025a8 0x50 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080027d8 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.disc_push_exp0_prgrom_wr
0x080025f8 0x84 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002828 0x84 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.discrete_exp0_prgrom_wr
0x0800267c 0x8c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080028ac 0x8c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.unrom_prgrom_flash_wr
0x08002708 0x64 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002938 0x64 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.nrom_prgrom_flash_wr
0x0800276c 0x44 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x0800299c 0x44 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.pbje_scan
0x080027b0 0xb0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x080029e0 0xb0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.pbje_state_change
0x08002860 0x5c C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002a90 0x5c C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.jtag_init_pbje
0x080028bc 0x40 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002aec 0x40 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.jtag_run_pbje.part.0
0x080028fc 0xb8 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002b2c 0xb8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.io_reset
0x080029b4 0x1c4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002be4 0x1c4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.write_page_verify
0x08002b78 0x68 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002da8 0x68 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.write_page
0x08002be0 0x34 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002e10 0x34 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.get_next_buff
0x08002c14 0x54 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002e44 0x54 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc1_wr.constprop.10
0x08002c68 0x22 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
*fill* 0x08002c8a 0x2 ff
0x08002e98 0x22 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x08002eba 0x2 ff
.text.mmc1_chrrom_flash_wr
0x08002c8c 0x60 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002ebc 0x60 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.mmc1_prgrom_flash_wr
0x08002cec 0x50 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002f1c 0x50 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.swim_wotf
0x08002d3c 0xb4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002f6c 0xb4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.swim_rotf
0x08002df0 0xac C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08003020 0xac C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.text.startup.main
0x08002e9c 0x970 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x08002e9c main
*fill* 0x0800380c 0x4 ff
.text 0x08003810 0x154 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
0x08003810 swim_xfr
.text 0x08003964 0xa08 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0x08003c20 _Unwind_GetCFA
0x08003c24 __gnu_Unwind_RaiseException
0x08003c78 __gnu_Unwind_ForcedUnwind
0x08003c8c __gnu_Unwind_Resume
0x08003cd4 __gnu_Unwind_Resume_or_Rethrow
0x08003cf0 _Unwind_Complete
0x08003cf4 _Unwind_DeleteException
0x08003d04 _Unwind_VRS_Get
0x08003d4c _Unwind_VRS_Set
0x08003d94 __gnu_Unwind_Backtrace
0x080040e4 __aeabi_unwind_cpp_pr0
0x080040f0 __aeabi_unwind_cpp_pr1
0x080040fc __aeabi_unwind_cpp_pr2
0x08004108 _Unwind_VRS_Pop
.text 0x0800436c 0x144 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
0x0800436c __restore_core_regs
0x0800436c restore_core_regs
0x08004398 __gnu_Unwind_Restore_VFP
0x0800439c __gnu_Unwind_Save_VFP
0x080043a0 __gnu_Unwind_Restore_VFP_D
0x080043a4 __gnu_Unwind_Save_VFP_D
0x080043a8 __gnu_Unwind_Restore_VFP_D_16_to_31
0x080043ac __gnu_Unwind_Save_VFP_D_16_to_31
0x080043b0 __gnu_Unwind_Restore_WMMXD
0x080043b4 __gnu_Unwind_Save_WMMXD
0x080043b8 __gnu_Unwind_Restore_WMMXC
0x080043bc __gnu_Unwind_Save_WMMXC
0x080043c0 ___Unwind_RaiseException
0x080043c0 _Unwind_RaiseException
0x080043f0 _Unwind_Resume
0x080043f0 ___Unwind_Resume
0x08004420 _Unwind_Resume_or_Rethrow
0x08004420 ___Unwind_Resume_or_Rethrow
0x08004450 _Unwind_ForcedUnwind
0x08004450 ___Unwind_ForcedUnwind
0x08004480 ___Unwind_Backtrace
0x08004480 _Unwind_Backtrace
.text 0x080044b0 0x39c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08004504 __gnu_unwind_execute
0x080047f4 __gnu_unwind_frame
0x0800481c _Unwind_GetRegionStart
0x08004828 _Unwind_GetLanguageSpecificData
0x0800483c _Unwind_GetDataRelBase
0x08004844 _Unwind_GetTextRelBase
.text.abort 0x0800484c 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o)
0x0800484c abort
.text.memcpy 0x0800485c 0x88 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-memcpy-stub.o)
0x0800485c memcpy
0x080030cc 0x9e8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x080030cc main
*fill* 0x08003ab4 0xc ff
.text 0x08003ac0 0x154 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
0x08003ac0 swim_xfr
.text 0x08003c14 0xa08 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0x08003ed0 _Unwind_GetCFA
0x08003ed4 __gnu_Unwind_RaiseException
0x08003f28 __gnu_Unwind_ForcedUnwind
0x08003f3c __gnu_Unwind_Resume
0x08003f84 __gnu_Unwind_Resume_or_Rethrow
0x08003fa0 _Unwind_Complete
0x08003fa4 _Unwind_DeleteException
0x08003fb4 _Unwind_VRS_Get
0x08003ffc _Unwind_VRS_Set
0x08004044 __gnu_Unwind_Backtrace
0x08004394 __aeabi_unwind_cpp_pr0
0x080043a0 __aeabi_unwind_cpp_pr1
0x080043ac __aeabi_unwind_cpp_pr2
0x080043b8 _Unwind_VRS_Pop
.text 0x0800461c 0x144 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(libunwind.o)
0x0800461c __restore_core_regs
0x0800461c restore_core_regs
0x08004648 __gnu_Unwind_Restore_VFP
0x0800464c __gnu_Unwind_Save_VFP
0x08004650 __gnu_Unwind_Restore_VFP_D
0x08004654 __gnu_Unwind_Save_VFP_D
0x08004658 __gnu_Unwind_Restore_VFP_D_16_to_31
0x0800465c __gnu_Unwind_Save_VFP_D_16_to_31
0x08004660 __gnu_Unwind_Restore_WMMXD
0x08004664 __gnu_Unwind_Save_WMMXD
0x08004668 __gnu_Unwind_Restore_WMMXC
0x0800466c __gnu_Unwind_Save_WMMXC
0x08004670 ___Unwind_RaiseException
0x08004670 _Unwind_RaiseException
0x080046a0 _Unwind_Resume
0x080046a0 ___Unwind_Resume
0x080046d0 _Unwind_Resume_or_Rethrow
0x080046d0 ___Unwind_Resume_or_Rethrow
0x08004700 _Unwind_ForcedUnwind
0x08004700 ___Unwind_ForcedUnwind
0x08004730 ___Unwind_Backtrace
0x08004730 _Unwind_Backtrace
.text 0x08004760 0x39c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x080047b4 __gnu_unwind_execute
0x08004aa4 __gnu_unwind_frame
0x08004acc _Unwind_GetRegionStart
0x08004ad8 _Unwind_GetLanguageSpecificData
0x08004aec _Unwind_GetDataRelBase
0x08004af4 _Unwind_GetTextRelBase
.text.abort 0x08004afc 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-abort.o)
0x08004afc abort
.text.memcpy 0x08004b0c 0x88 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-memcpy-stub.o)
0x08004b0c memcpy
.text._raise_r
0x080048e4 0x5c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x080048e4 _raise_r
.text.raise 0x08004940 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x08004940 raise
.text._kill_r 0x08004954 0x28 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x08004954 _kill_r
0x08004b94 0x5c c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x08004b94 _raise_r
.text.raise 0x08004bf0 0x14 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signal.o)
0x08004bf0 raise
.text._kill_r 0x08004c04 0x28 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x08004c04 _kill_r
.text._getpid_r
0x0800497c 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x0800497c _getpid_r
.text._getpid 0x08004984 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)
0x08004984 _getpid
.text._kill 0x08004994 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(kill.o)
0x08004994 _kill
.text._exit 0x080049a4 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
0x080049a4 _exit
0x08004c2c 0x8 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-signalr.o)
0x08004c2c _getpid_r
.text._getpid 0x08004c34 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)
0x08004c34 _getpid
.text._kill 0x08004c44 0x10 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(kill.o)
0x08004c44 _kill
.text._exit 0x08004c54 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(_exit.o)
0x08004c54 _exit
*(.init)
.init 0x080049a8 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x080049a8 _init
.init 0x08004c58 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x08004c58 _init
*(.fini)
.fini 0x080049ac 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x080049ac _fini
.fini 0x08004c5c 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
0x08004c5c _fini
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors)
@ -690,42 +701,42 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*(.rodata*)
*(.eh_frame*)
.glue_7 0x080049b0 0x0
.glue_7 0x080049b0 0x0 linker stubs
.glue_7 0x08004c60 0x0
.glue_7 0x08004c60 0x0 linker stubs
.glue_7t 0x080049b0 0x0
.glue_7t 0x080049b0 0x0 linker stubs
.glue_7t 0x08004c60 0x0
.glue_7t 0x08004c60 0x0 linker stubs
.vfp11_veneer 0x080049b0 0x0
.vfp11_veneer 0x080049b0 0x0 linker stubs
.vfp11_veneer 0x08004c60 0x0
.vfp11_veneer 0x08004c60 0x0 linker stubs
.v4_bx 0x080049b0 0x0
.v4_bx 0x080049b0 0x0 linker stubs
.v4_bx 0x08004c60 0x0
.v4_bx 0x08004c60 0x0 linker stubs
.iplt 0x080049b0 0x0
.iplt 0x080049b0 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.iplt 0x08004c60 0x0
.iplt 0x08004c60 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.ARM.extab 0x080049b0 0x30
.ARM.extab 0x08004c60 0x30
*(.ARM.extab* .gnu.linkonce.armextab.*)
.ARM.extab 0x080049b0 0x24 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.extab 0x080049d4 0xc c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x080049e0 __exidx_start = .
.ARM.extab 0x08004c60 0x24 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.extab 0x08004c84 0xc c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x08004c90 __exidx_start = .
.ARM.exidx 0x080049e0 0xd0
.ARM.exidx 0x08004c90 0xd0
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
.ARM.exidx 0x080049e0 0x8 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.ARM.exidx 0x08004c90 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
0x10 (size before relaxing)
.ARM.exidx 0x080049e8 0x98 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
.ARM.exidx 0x08004c98 0x98 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(unwind-arm.o)
0xd8 (size before relaxing)
.ARM.exidx 0x08004a80 0x30 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
.ARM.exidx 0x08004d30 0x30 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(pr-support.o)
0x48 (size before relaxing)
0x08004ab0 __exidx_end = .
0x08004ab0 __etext = ALIGN (0x4)
0x08004d60 __exidx_end = .
0x08004d60 __etext = ALIGN (0x4)
.rel.dyn 0x08004ab0 0x0
.rel.iplt 0x08004ab0 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.rel.dyn 0x08004d60 0x0
.rel.iplt 0x08004d60 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.data 0x20000000 0x430 load address 0x08004ab0
.data 0x20000000 0x430 load address 0x08004d60
0x20000000 __data_start__ = .
*(vtable)
*(.data*)
@ -753,59 +764,61 @@ LOAD c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eab
*(.fastrun)
0x20000430 __data_end__ = .
.igot.plt 0x20000430 0x0 load address 0x08004ee0
.igot.plt 0x20000430 0x0 C:\Users\paul\AppData\Local\Temp\ccG8tUSZ.o
.igot.plt 0x20000430 0x0 load address 0x08005190
.igot.plt 0x20000430 0x0 C:\Users\PAUL_D~1\AppData\Local\Temp\ccOxWw6f.o
.bss 0x20000430 0x2e4 load address 0x08004ee0
.bss 0x20000430 0x2e4 load address 0x08005190
0x20000430 . = ALIGN (0x4)
0x20000430 __bss_start__ = .
*(.bss*)
.bss.addr_ptr 0x20000430 0x4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.addrh 0x20000434 0x2 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.addr_ptr 0x20000430 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.addrh 0x20000434 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.bank_table
0x20000436 0x2 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.buff0 0x20000438 0x14 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.buff1 0x2000044c 0x14 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.buff2 0x20000460 0x14 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.buff3 0x20000474 0x14 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.cur_bank 0x20000488 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x20000436 0x2 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.buff0 0x20000438 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.buff1 0x2000044c 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.buff2 0x20000460 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.buff3 0x20000474 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.cur_bank 0x20000488 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x20000489 0x3
.bss.cur_buff 0x2000048c 0x4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.cur_buff 0x2000048c 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.cur_usb_load_buff
0x20000490 0x4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.exp_byte 0x20000494 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x20000490 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.exp_byte 0x20000494 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.incoming_bytes_remain
0x20000495 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x20000495 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x20000496 0x2
.bss.lfsr 0x20000498 0x4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.num_buff.5080
0x2000049c 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
*fill* 0x2000049d 0x3
.bss.lfsr 0x20000498 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.num_buff.5127
0x2000049c 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.num_prg_banks
0x2000049d 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x2000049e 0x2
.bss.oper_info_struct
0x200004a0 0x20 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004a0 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.pbje_command
0x200004c0 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004c0 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.pbje_data
0x200004c1 0x20 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004c1 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.pbje_numclk
0x200004e1 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004e1 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.pbje_status
0x200004e2 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004e2 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.raw_bank_status
0x200004e3 0x10 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004e3 0x10 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x200004f3 0x1
.bss.raw_buffer16
0x200004f4 0x200 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200004f4 0x200 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.rv16.4747
0x200006f4 0x8 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.rv16.5000
0x200006fc 0x8 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x200006f4 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.rv16.5047
0x200006fc 0x8 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.stm_debug_disable
0x20000704 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x20000704 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*fill* 0x20000705 0x3
.bss.swim_base
0x20000708 0x4 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.bss.swim_pin 0x2000070c 0x1 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x20000708 0x4 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.bss.swim_pin 0x2000070c 0x1 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
*(COMMON)
*fill* 0x2000070d 0x3
COMMON 0x20000710 0x4 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libg.a(lib_a-reent.o)
@ -832,45 +845,45 @@ OUTPUT(build_stm/inlretro_stm.elf elf32-littlearm)
.ARM.attributes
0x00000000 0x1e c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o
.ARM.attributes
0x0000001e 0x2f C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x0000001e 0x2f C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.ARM.attributes
0x0000004d 0x21 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
0x0000004d 0x21 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.comment 0x00000000 0x7f
.comment 0x00000000 0x7f C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.comment 0x00000000 0x7f C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x80 (size before relaxing)
.debug_info 0x00000000 0x44f6
.debug_info 0x00000000 0x44d0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_info 0x000044d0 0x26 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.debug_info 0x00000000 0x4835
.debug_info 0x00000000 0x480f C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_info 0x0000480f 0x26 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.debug_abbrev 0x00000000 0x693
.debug_abbrev 0x00000000 0x67f C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_abbrev 0x0000067f 0x14 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.debug_abbrev 0x00000000 0x6a7
.debug_abbrev 0x00000000 0x693 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_abbrev 0x00000693 0x14 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.debug_loc 0x00000000 0x4377
.debug_loc 0x00000000 0x4377 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_loc 0x00000000 0x6ecc
.debug_loc 0x00000000 0x6ecc C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_aranges 0x00000000 0x1a8
.debug_aranges 0x00000000 0x1d0
.debug_aranges
0x00000000 0x188 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x00000000 0x1b0 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_aranges
0x00000188 0x20 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
0x000001b0 0x20 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.debug_ranges 0x00000000 0xad0
.debug_ranges 0x00000000 0xad0 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_ranges 0x00000000 0xb18
.debug_ranges 0x00000000 0xb18 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_line 0x00000000 0x155c
.debug_line 0x00000000 0x1469 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_line 0x00001469 0xf3 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.debug_line 0x00000000 0x165d
.debug_line 0x00000000 0x156a C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.debug_line 0x0000156a 0xf3 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.debug_str 0x00000000 0x1008
.debug_str 0x00000000 0xf8f C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
0x10a2 (size before relaxing)
.debug_str 0x00000f8f 0x79 C:\Users\paul\AppData\Local\Temp\ccK626T0.o
.debug_str 0x00000000 0x1073
.debug_str 0x00000000 0x100a C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
0x1123 (size before relaxing)
.debug_str 0x0000100a 0x69 C:\Users\PAUL_D~1\AppData\Local\Temp\ccq24Qmp.o
.debug_frame 0x00000000 0x510
.debug_frame 0x00000000 0x510 C:\Users\paul\AppData\Local\Temp\ccazLwyO.ltrans0.ltrans.o
.debug_frame 0x00000000 0x594
.debug_frame 0x00000000 0x594 C:\Users\PAUL_D~1\AppData\Local\Temp\cclxzrun.ltrans0.ltrans.o
.stabstr 0x00000000 0x76
.stabstr 0x00000000 0x76 c:/arm/gcc-arm-none-eabi-7-2018-q2-update-win32/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v6-m\libnosys.a(getpid.o)

BIN
firmware/build_stmn/inlretro_stm_AV03.bin Normal file
View File

Binary file not shown.

27
firmware/firmware release notes.txt Normal file
View File

@ -0,0 +1,27 @@
Firmware release process:
nightly:
make all
push build_*** folders
full version release: update APP_VERSION in shared_dict_bootloader.h so all firmwares know their version
make all
stm32 firmwares: address 0x800 insert "AV##" number of application version and rename file to match
Create DFU files so people have that as an update option
Creating required .hex files with AV## requires opening the binary with STM32 ST-LINK utility
and then saving the binary as .hex which can be used to then create .dfu file
commit build_*** folders
update inlretro script app version number checked to suggest to people to update their firmware
RELEASE HISTORY:
AV03: Long overdue release.. Fixed N64 dumping including delays for RE2 needed in testing
MMC2/4 flashing support, NES GTROM support, action53 & easyNSF tssop flash support, and others..
AV02: Late versioning, but was a build from ~Feb 2018 I was recommending people try with early
N64 and GBA support.
AV01/00: Oldies, don't really recall. Just the begining of updates without bootloader

19
firmware/source/bootload.c
View File

@ -120,18 +120,21 @@ uint8_t bootload_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8
//can use the pointer to read 4bytes at 0x08000800
//which is the begining of application code space
//should include ascii "AV00" with the digits for version
// case GET_APP_VER:
// rdata[RD_LEN] = WORD_LEN;
// rdata[RD0] = app_version[0];
// rdata[RD1] = app_version[1];
// rdata[RD2] = app_version[2];
// rdata[RD3] = app_version[3];
// break;
#endif //STM_CORE
//application version supported by all devices starting with AV03
case GET_APP_VER:
rdata[RD_LEN] = BYTE_LEN;
rdata[RD0] = APP_VERSION; //defined in shared_dict_bootload.h
//rdata[RD_LEN] = WORD_LEN;
//rdata[RD0] = (uint8_t)'A';
//rdata[RD1] = (uint8_t)'V';
//rdata[RD2] = (uint8_t)'0';
//rdata[RD3] = (uint8_t)'3';
break;
default:
//opcode doesn't exist
return ERR_UNKN_BOOTLOAD_OPCODE;
#endif
}
return SUCCESS;

25
firmware/source/dump.c
View File

@ -25,6 +25,18 @@ uint8_t dump_buff( buffer *buff ) {
buff->last_idx, ~FALSE );
break;
case NESCPU_4KB_TOGGLE:
//mapper lower nibble specifies NES CPU A12-15
if (buff->mapper > 0x0F) {
//mapper can only be 4bits (0-15)
return ERR_BUFF_PART_NUM_RANGE;
}
addrH |= (buff->mapper << 4); // 8 << 12 = shift by 4
buff->cur_byte = nes_cpu_page_rd_toggle( buff->data, addrH, buff->id,
//id contains MSb of page when <256B buffer
buff->last_idx, ~FALSE );
break;
case NESPPU_1KB:
//mapper bits 2-5 specifies NES PPU A10-13
if (buff->mapper & 0xC3) { //make sure bits 7, 6, 1, & 0 aren't set
@ -36,6 +48,17 @@ uint8_t dump_buff( buffer *buff ) {
buff->last_idx, ~FALSE );
break;
case NESPPU_1KB_TOGGLE:
//mapper bits 2-5 specifies NES PPU A10-13
if (buff->mapper & 0xC3) { //make sure bits 7, 6, 1, & 0 aren't set
//mapper can only have bits 2-5 set
return ERR_BUFF_PART_NUM_RANGE;
}
addrH |= buff->mapper; // PPU A10-13 get set based on mapper
buff->cur_byte = nes_ppu_page_rd_toggle( buff->data, addrH, buff->id,
buff->last_idx, ~FALSE );
break;
case NESCPU_PAGE:
//mapper byte specifies CPU A15-8
addrH |= buff->mapper;
@ -149,6 +172,7 @@ uint8_t dump_buff( buffer *buff ) {
nes_cpu_wr(0x8000, bank); //outer bank
nes_cpu_wr(0x5000, 0x00); //chr reg select act like CNROM
}
/* migrated to script controlled
if (buff->mapper == EZNSF) {
//addrH &= 0b1000 1111 A14-12 must always be low
addrH &= 0x8F;
@ -160,6 +184,7 @@ uint8_t dump_buff( buffer *buff ) {
buff->cur_byte = nes_cpu_page_rd_poll( buff->data, addrH, buff->id,
//id contains MSb of page when <256B buffer
buff->last_idx, ~FALSE );
*/
break;
case CHRROM: //$0000

54
firmware/source/flash.c
View File

@ -1,5 +1,6 @@
#include "flash.h"
//TODO replace all use of this function with write_page_verify below
uint8_t write_page( uint8_t addrH, buffer *buff, write_funcptr wr_func )
{
uint16_t cur = buff->cur_byte;
@ -402,9 +403,20 @@ uint8_t flash_buff( buffer *buff ) {
if (buff->mapper == MMC3) {
write_page_verify( (0x80+addrH), buff, mmc3_prgrom_flash_wr);
}
if (buff->mapper == MMC3S) {
write_page_verify( (0x80+addrH), buff, mmc3s_prgrom_flash_wr);
}
//SOP-44
/*
if (buff->mapper == MMC4) {
write_page( (0x80+addrH), buff, mmc4_prgrom_sop_flash_wr);
}
*/
//TODO use mapper variant to differentiate between the two
//PLCC-32
if (buff->mapper == MMC4) {
write_page_verify( (0x80+addrH), buff, mmc4_prgrom_flash_wr);
}
if (buff->mapper == MM2) {
//addrH &= 0b1011 1111 A14 must always be low
addrH &= 0x3F;
@ -430,6 +442,28 @@ uint8_t flash_buff( buffer *buff ) {
write_page_cninja( 0, addrH, 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
}
if (buff->mapper == A53) {
//enter unlock bypass mode
nes_m2_high_wr( 0x8AAA, 0xAA );
nes_m2_high_wr( 0x8555, 0x55 );
nes_m2_high_wr( 0x8AAA, 0x20 );
write_page_verify( (0x80+addrH), buff, a53_tssop_prgrom_flash_wr);
//exit unlock bypass mode
nes_m2_high_wr( 0x8000, 0x90 );
nes_m2_high_wr( 0x8000, 0x00 );
//reset the flash chip, supposed to exit too
nes_m2_high_wr( 0x8000, 0xF0 );
//////////////
// OLD WAY, still used by PLCC flash
// need to uncomment and reflash firmware to get it to work
// Long term solution is to have a mapper variant for each
// or PRG-ROM part number type variable..?
//////////////
/*
//write bank value to bank table
//page_num shift by 7 bits A15 >> A8(0)
bank = (buff->page_num)>>7;
@ -446,11 +480,14 @@ uint8_t flash_buff( buffer *buff ) {
//break;
//WORKS PLCC Action53:
//had problems later not all bytes getting programmed..
//write_page_old( bank, (0x80 | addrH), 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
write_page_old( bank, (0x80 | addrH), 0xD555, 0xAAAA, buff, nes_cpu_wr, nes_cpu_rd );
//TSSOP-28 action53:
write_page_a53( bank, (0x80 | addrH), buff, nes_cpu_wr, nes_cpu_rd );
//write_page_a53( bank, (0x80 | addrH), buff, nes_m2_high_wr, nes_cpu_rd );
//write_page_verify( (0x80+addrH), buff, mmc3_prgrom_flash_wr);
*/
}
if (buff->mapper == EZNSF) {
/*
//addrH &= 0b1000 1111 A14-12 must always be low
addrH &= 0x8F;
//write bank value to bank table
@ -459,6 +496,19 @@ uint8_t flash_buff( buffer *buff ) {
nes_cpu_wr(0x5000, bank); //bank @ $8000-8FFF
write_page_tssop( bank, (0x80 | addrH), buff, nes_cpu_wr, nes_cpu_rd );
*/
//enter unlock bypass mode
nes_m2_high_wr( 0x9AAA, 0xAA );
nes_m2_high_wr( 0x9555, 0x55 );
nes_m2_high_wr( 0x9AAA, 0x20 );
write_page_verify( (0x90+addrH), buff, tssop_prgrom_flash_wr);
//exit unlock bypass mode
nes_m2_high_wr( 0x9000, 0x90 );
nes_m2_high_wr( 0x9000, 0x00 );
//reset the flash chip, supposed to exit too
nes_m2_high_wr( 0x9000, 0xF0 );
}
if (buff->mapper == GTROM) {
write_page_verify( (0x80+addrH), buff, gtrom_prgrom_flash_wr);

33
firmware/source/io.c
View File

@ -56,8 +56,10 @@ uint8_t io_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *rd
#ifdef N64_CONN
case N64_INIT: n64_init(); break;
#endif
#ifdef STM_CORE
case SWIM_INIT:
return swim_init(operand); break;
#endif
case JTAG_INIT:
return jtag_init(operand); break;
@ -177,14 +179,14 @@ void nes_init()
//enable control outputs and disable memories
//PRG-ROM
ROMSEL_OP();
ROMSEL_HI();
ROMSEL_OP();
//WRAM (and state of m2 during first half of CPU cycle)
M2_OP();
M2_LO();
M2_OP();
//CPU RD
PRGRW_OP();
PRGRW_HI();
PRGRW_OP();
//other control pins are inputs, leave as IP pullup from reset
@ -192,10 +194,10 @@ void nes_init()
//prior to setting PPU A13 & /A13 which are /CE pins
//doing this helps ensure data bus is clear before
//using it for AHL clocking
CSRD_OP();
CSRD_HI();
CSWR_OP();
CSRD_OP();
CSWR_HI();
CSWR_OP();
//memories are now disabled Data bus should be clear
DATA_ENABLE();
@ -466,14 +468,17 @@ void sega_init()
//memories are now disabled Data bus should be clear
// SEGA D0-7
DATA_ENABLE();
DATA_IP_PU();
//SEGA D8-15
HADDR_ENABLE();
HADDR_IP();
HADDR_PU();
// // SEGA D0-7
// DATA_ENABLE();
// DATA_IP_PU();
//
// //SEGA D8-15
// HADDR_ENABLE();
// HADDR_IP();
// HADDR_PU();
DATA16_ENABLE();
// DATA16_IP();
// DATA16_PU();
}
#endif
@ -547,6 +552,7 @@ void n64_init()
//that swim lane will be used for all subsequent communications.
//TODO setup to control SWIM pin as (psuedo) open drain.
//if swim lane is unknown or other problem return error, else return SUCCESS
#ifdef STM_CORE
uint8_t swim_init( uint8_t swim_lane )
{
switch (swim_lane) {
@ -587,6 +593,7 @@ uint8_t swim_init( uint8_t swim_lane )
}
return SUCCESS;
}
#endif
//Initialization of JTAG communications
//the JTAG pin depends on INL board design.

20
firmware/source/main.c
View File

@ -18,6 +18,22 @@
#endif
#ifdef AVR_CORE
void wdt_off(void)
{
// __disable_interrupt();
// __watchdog_reset();
/* Clear WDRF in MCUSR */
MCUSR &= ~(1<<WDRF);
/* Write logical one to WDCE and WDE */
/* Keep old prescaler setting to prevent unintentional
* time-out */
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCSR = 0x00;
// __enable_interrupt();
}
#endif
int main(void)
{
@ -25,6 +41,7 @@ int main(void)
#ifdef AVR_CORE
//set watch dog timer with 1 second timer
wdt_enable(WDTO_1S);
// wdt_off();
/* Even if you don't use the watchdog, turn it off here. On newer devices,
* the status of the watchdog (on/off, period) is PRESERVED OVER RESET!
*/
@ -177,9 +194,12 @@ int main(void)
while (1) {
//pet the watch doggie to keep him happy
#ifdef STM_CORE
wdt_reset();
#endif
#ifdef AVR_CORE
wdt_reset();
//must call at regular intervals no longer than 50msec
//keeps 8Byte EP buffer moving from what I understand
usbPoll();

45
firmware/source/n64.c
View File

@ -3,7 +3,7 @@
//only need this file if connector is present on the device
#ifdef N64_CONN
uint16_t n64_bank;
uint16_t n64_bank; //A16-31 the upper 16bits that gets latched with ALE_H
//=================================================================================================
//
@ -114,6 +114,19 @@ void n64_latch_addr( uint16_t addr_lo )
//leave AD0-15 as input for subsequent access
ADDR_IP();
//give the address decoder some time before permitting data to be read out
//The N64 system supposedly waits ~1.040usec
//STM32 @ 48Mhz = 20.8nsec cycle time -> would be ~50cycles
//But that seems crazy long... and not necessary
NOP(); NOP(); NOP(); NOP();
NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
// NOP(); NOP(); NOP(); NOP();
return;
}
@ -135,6 +148,13 @@ uint16_t n64_rd()
NOP();
NOP();
//added more delay helps RE2 second read and some other bad reads
NOP();
NOP();
//N64 console appears to have a /RD low time of 300nsec
//But that seems crazy long... and not necessary
read = ADDR_VAL;
CSRD_HI();
@ -149,9 +169,23 @@ uint8_t n64_page_rd( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len )
uint16_t read;
uint8_t i;
n64_latch_addr( addrH<<8 | first );
//need to set the addr every 512Bytes, else will wrap around
//effectively every 0x0200 bytes, the address needs latched
//read0 addrH=0 first=0 (128B read)
//read0 addrH=0 first=128 (128B read)
//read0 addrH=1 first=0 (128B read) <-- odd addrH values don't need address latched
//read0 addrH=1 first=128 (128B read)
//read0 addrH=2 first=0 (128B read) <== latch addrH again
if ((first == 0) && (addrH|0x01))
n64_latch_addr( addrH<<8 | first );
//only need to latch address on even buffers
//odd buffers are reading second half of 256Byte page,
//so the previous latching should be valid
//now can call n64_rd to get 16bits of data
//needed a delay between latching address, and reading data for the first time
//NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); NOP(); // --> Moved to the n64_latch_addr function
for( i=0; i<=len; i++ ) {
@ -160,14 +194,13 @@ uint8_t n64_page_rd( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len )
//read 16bits
read = n64_rd();
//store lower byte little endian
//now stores entire 16bit read at once
//store upper byte big endian
data[i] = read>>8;
//upper byte
//lower byte
i++;
//store upper byte
//store lower byte
data[i] = read;
}

321
firmware/source/nes.c
View File

@ -51,9 +51,12 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
case NES_CPU_WR:
nes_cpu_wr( operand, miscdata );
break;
case NES_M2_LOW_WR:
case M2_LOW_WR:
nes_m2_low_wr( operand, miscdata );
break;
case M2_HIGH_WR:
nes_m2_high_wr( operand, miscdata );
break;
case NES_DUALPORT_WR:
nes_dualport_wr( operand, miscdata );
break;
@ -99,6 +102,9 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
case MMC4_PRG_SOP_FLASH_WR:
mmc4_prgrom_sop_flash_wr( operand, miscdata );
break;
case MMC4_PRG_FLASH_WR:
mmc4_prgrom_flash_wr( operand, miscdata );
break;
case MMC4_CHR_FLASH_WR:
mmc4_chrrom_flash_wr( operand, miscdata );
break;
@ -111,6 +117,9 @@ uint8_t nes_call( uint8_t opcode, uint8_t miscdata, uint16_t operand, uint8_t *r
case GTROM_PRG_FLASH_WR:
gtrom_prgrom_flash_wr( operand, miscdata );
break;
case MMC3S_PRG_FLASH_WR:
mmc3s_prgrom_flash_wr( operand, miscdata );
break;
//8bit return values:
@ -397,13 +406,14 @@ uint8_t nes_cpu_rd( uint16_t addr )
ADDR_SET(addr);
//set M2 and /ROMSEL
M2_HI();
if( addr >= 0x8000 ) { //addressing cart rom space
ROMSEL_LO(); //romsel trails M2 during CPU operations
}
M2_HI();
//couple more NOP's waiting for data
//zero nop's returned previous databus value
//wdt_reset();
NOP(); //one nop got most of the bits right
NOP(); //two nop got all the bits right
NOP(); //add third nop for some extra
@ -455,14 +465,23 @@ void nes_cpu_wr( uint16_t addr, uint8_t data )
DATA_SET(data);
//set M2 and /ROMSEL
M2_HI();
//this was bad for $6000 WRAM decoding!
//we're creating our own /ROMSEL delay which can cause problems!!!
if( addr >= 0x8000 ) { //addressing cart rom space
ROMSEL_LO(); //romsel trails M2 during CPU operations
}
M2_HI();
//give some time
NOP();
NOP();
NOP(); //Writting to MMC4 SRAM 2 NOPs wasn't enough..
NOP();
NOP();
NOP();
NOP();
NOP();
NOP();
//latch data to cart memory/mapper
M2_LO();
@ -531,6 +550,69 @@ void nes_m2_low_wr( uint16_t addr, uint8_t data )
}
/* Desc:NES CPU Write, but M2 remains high
* Created for action53 mapper where board's level shifter /OE pin
* is driven by inverse of M2. So for address to be applied to flash,
* M2 must be high.
* A15 decoded to enable /ROMSEL
* Note:addrH bit7 has no effect (ends up on PPU /A13)
* EXP0 as-is
* Pre: nes_init() setup of io pins
* Post:data latched by anything listening on the bus
* address left on bus
* data left on bus, but pullup only
* Rtn: None
*/
void nes_m2_high_wr( uint16_t addr, uint8_t data )
{
M2_HI();
//Float EXP0 as it should be in NES
//EXP0_IP_FL();
//need for whole function
//_DATA_OP();
//set addrL
//ADDR_OUT = addrL;
//latch addrH
//DATA_OUT = addrH;
//_AHL_CLK();
ADDR_SET(addr);
//PRG R/W LO
PRGRW_LO();
//put data on bus
DATA_OP();
DATA_SET(data);
//set M2 and /ROMSEL
// M2_HI();
if( addr >= 0x8000 ) { //addressing cart rom space
ROMSEL_LO(); //romsel trails M2 during CPU operations
}
//give some time
NOP();
NOP();
//latch data to cart memory/mapper
// M2_LO();
ROMSEL_HI();
//retore PRG R/W to default
PRGRW_HI();
//Free data bus
DATA_IP();
//return M2 to default state
M2_LO();
}
/* Desc:NES PPU Read
* decode A13 from addrH to set /A13 as expected
@ -775,6 +857,10 @@ uint8_t nes_cpu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8
} else {
usbPoll(); //Call usbdrv.h usb polling while waiting for data
}
//add some delay for 4-8MByte 3v flash
NOP();
//latch data
DATA_RD(data[i]);
//set lower address bits
@ -791,6 +877,61 @@ uint8_t nes_cpu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8
return i;
}
uint8_t nes_cpu_page_rd_toggle( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
{
uint8_t i;
//set address bus
ADDRH(addrH);
//set M2 and /ROMSEL
if( addrH >= 0x80 ) { //addressing cart rom space
ROMSEL_LO(); //romsel trails M2 during CPU operations
}
//set lower address bits
ADDRL(first); //doing this prior to entry and right after latching
//extra NOP was needed on stm6 as address hadn't settled in time for the very first read
NOP();
//gives longest delay between address out and latching data
for( i=0; i<=len; i++ ) {
M2_HI();
//testing shows that having this if statement doesn't affect overall dumping speed
if ( poll == FALSE ) {
NOP(); //couple more NOP's waiting for data
NOP(); //one prob good enough considering the if/else
} else {
usbPoll(); //Call usbdrv.h usb polling while waiting for data
}
//add some delay for 4-8MByte 3v flash
NOP();
NOP();
NOP();
NOP();
NOP();
NOP();
NOP();
NOP();
//latch data
DATA_RD(data[i]);
M2_LO();
//set lower address bits
//ADDRL(++first); THIS broke things, on stm adapter because macro expands it twice!
first++;
ADDRL(first);
}
//return bus to default
M2_LO();
ROMSEL_HI();
//return index of last byte read
return i;
}
/* Desc:NES PPU Page Read with optional USB polling
* decode A13 from addrH to set /A13 as expected
* if poll is true calls usbdrv.h usbPoll fuction
@ -845,6 +986,64 @@ uint8_t nes_ppu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8
return i;
}
uint8_t nes_ppu_page_rd_toggle( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll )
{
uint8_t i;
if (addrH < 0x20) { //below $2000 A13 clear, /A13 set
//ADDRH(addrH | PPU_A13N_BYTE);
//Don't do weird stuff like above! logic inside macro expansions can have weird effects!!
addrH |= PPU_A13N_BYTE;
ADDRH(addrH);
} else { //above PPU $1FFF, A13 set, /A13 clear
ADDRH(addrH);
}
//set lower address bits
ADDRL(first); //doing this prior to entry and right after latching
//dual port assumes address is valid shortly after /RD & /WR are both high
CSRD_LO();
CSRD_HI();
NOP();
NOP();
NOP();
//now it'll go fetch the current address
for( i=0; i<=len; i++ ) {
//set CHR /RD and /WR
CSRD_LO();
//couple more NOP's waiting for data
NOP();
NOP();
if ( poll == FALSE ) {
NOP(); //one prob good enough considering the if/else
NOP();
} else {
usbPoll();
}
//latch data
DATA_RD(data[i]);
//set lower address bits
first ++;
ADDRL(first);
//return bus to default
//also triggers fetch of the current address
CSRD_HI();
NOP();
NOP();
}
//return index of last byte read
return i;
}
/* Desc:NES PPU Page Write Random from LFSR
* decode A13 from addrH to set /A13 as expected
* NOTE: this is a /WE controlled write
@ -1203,7 +1402,7 @@ uint8_t mmc3_prgrom_flash_wr( uint16_t addr, uint8_t data )
nes_cpu_wr(addr, data);
//reset $8000 bank select register to a CHR reg
nes_cpu_wr(0x8000, 0x00);
nes_cpu_wr(0x8000, 0x02); //0x02 also maintains flash mode for custom
do {
rv = nes_cpu_rd(addr);
@ -1213,6 +1412,21 @@ uint8_t mmc3_prgrom_flash_wr( uint16_t addr, uint8_t data )
return rv;
}
/* Desc:NES MMC3 PRG-ROM FLASH Write
* Pre: nes_init() setup of io pins
* MMC3 must be properly inialized for flashing
* addr must be between $8000-9FFF as prescribed by init
* Post:Byte written and ready for another write
* Rtn: None
*/
uint8_t mmc3s_prgrom_flash_wr( uint16_t addr, uint8_t data )
{
uint8_t rv;
return rv;
}
/* Desc:NES MMC3 CHR-ROM FLASH Write
* Pre: nes_init() setup of io pins
@ -1274,6 +1488,40 @@ void mmc4_prgrom_sop_flash_wr( uint16_t addr, uint8_t data )
return;
}
/* Desc:NES MMC4 PRG-ROM FLASH Write for standard PLCC SST flash
* Pre: nes_init() setup of io pins
* MMC4 must be properly inialized for flashing
* addr must be between $8000-BFFF as prescribed by init
* desired bank must already be selected
* cur_bank must be set to desired bank for recovery
* Post:Byte written and ready for another write
* Rtn: None
*/
uint8_t mmc4_prgrom_flash_wr( uint16_t addr, uint8_t data )
{
uint8_t rv;
//unlock and write data SOP-44 flash
nes_cpu_wr(0xD555, 0xAA);
nes_cpu_wr(0xEAAA, 0x55);
nes_cpu_wr(0xD555, 0xA0);
nes_cpu_wr(addr, data); //corrupts bank register if addr $A000-AFFF
//recover bank register as data write would have corrupted
nes_cpu_wr(0xA000, cur_bank);
do {
rv = nes_cpu_rd(addr);
usbPoll(); //orignal kazzo needs this frequently to slurp up incoming data
} while (rv != nes_cpu_rd(addr));
//TODO handle timeout
return rv;
}
/* Desc:NES MMC4 CHR-ROM FLASH Write
* Pre: nes_init() setup of io pins
@ -1418,6 +1666,10 @@ uint8_t gtrom_prgrom_flash_wr( uint16_t addr, uint8_t data )
{
uint8_t rv;
//uint8_t rv1;
//select bank, don't think needed, but having problems...
nes_cpu_wr(0x5000, cur_bank);
//unlock the flash
nes_cpu_wr(0xD555, 0xAA);
@ -1427,6 +1679,46 @@ uint8_t gtrom_prgrom_flash_wr( uint16_t addr, uint8_t data )
//write the data
nes_cpu_wr(addr, data);
// nes_cpu_wr(0x5000, cur_bank);
/*
do {
rv = nes_cpu_rd(0x8000);
rv1 = nes_cpu_rd(0x8000);
usbPoll(); //orignal kazzo needs this frequently to slurp up incoming data
//} while (rv != nes_cpu_rd(8000));
} while (rv != rv1);
*/
// while( data != nes_cpu_rd(addr)) { }
//requires final data to be present
rv = nes_cpu_rd(addr);
while (rv != data) {
rv = nes_cpu_rd(addr);
}
return rv;
}
/* Desc:NES ACTION53 TSSOP PRG-ROM FLASH Write
* Pre: nes_init() setup of io pins
* Flash must already be in unlock bypass mode
* Post:Byte written and ready for another write
* Rtn: None
*/
uint8_t a53_tssop_prgrom_flash_wr( uint16_t addr, uint8_t data )
{
uint8_t rv;
//chr reg select act like CNROM & enable flash writes
nes_cpu_wr(0x5000, 0x54);
//unlock and write data
nes_m2_high_wr(addr, 0xA0);
nes_m2_high_wr(addr, data);
do {
rv = nes_cpu_rd(addr);
usbPoll(); //orignal kazzo needs this frequently to slurp up incoming data
@ -1435,5 +1727,26 @@ uint8_t gtrom_prgrom_flash_wr( uint16_t addr, uint8_t data )
return rv;
}
/* Desc:NES TSSOP PRG-ROM FLASH Write
* Pre: nes_init() setup of io pins
* Flash must already be in unlock bypass mode
* Rtn: None
*/
uint8_t tssop_prgrom_flash_wr( uint16_t addr, uint8_t data )
{
uint8_t rv;
//unlock and write data
nes_m2_high_wr(addr, 0xA0);
nes_m2_high_wr(addr, data);
do {
rv = nes_cpu_rd(addr);
usbPoll(); //orignal kazzo needs this frequently to slurp up incoming data
} while (rv != nes_cpu_rd(addr));
return rv;
}
#endif //NES_CONN

9
firmware/source/nes.h
View File

@ -16,13 +16,17 @@ uint8_t emulate_nes_cpu_rd( uint16_t addr );
uint8_t nes_cpu_rd( uint16_t addr );
void nes_cpu_wr( uint16_t addr, uint8_t data );
void nes_m2_low_wr( uint16_t addr, uint8_t data );
//TODO combine m2_low & m2_high into one function with an arg
void nes_m2_high_wr( uint16_t addr, uint8_t data );
uint8_t nes_ppu_rd( uint16_t addr );
void nes_ppu_wr( uint16_t addr, uint8_t data );
uint8_t nes_dualport_rd( uint16_t addr );
void nes_dualport_wr( uint16_t addr, uint8_t data );
//uint8_t ciram_a10_mirroring( void );
uint8_t nes_cpu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t last, uint8_t poll );
uint8_t nes_cpu_page_rd_toggle( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t last, uint8_t poll );
uint8_t nes_ppu_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t last, uint8_t poll );
uint8_t nes_ppu_page_rd_toggle( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll );
uint8_t nes_dualport_page_rd_poll( uint8_t *data, uint8_t addrH, uint8_t first, uint8_t len, uint8_t poll );
void mmc1_wr( uint16_t addr, uint8_t data, uint8_t reset );
@ -34,13 +38,18 @@ void mmc1_chrrom_flash_wr( uint16_t addr, uint8_t data );
void unrom_prgrom_flash_wr( uint16_t addr, uint8_t data );
void cnrom_chrrom_flash_wr( uint16_t addr, uint8_t data );
uint8_t mmc3_prgrom_flash_wr( uint16_t addr, uint8_t data );
uint8_t mmc3s_prgrom_flash_wr( uint16_t addr, uint8_t data );
void mmc3_chrrom_flash_wr( uint16_t addr, uint8_t data );
void mmc4_prgrom_sop_flash_wr( uint16_t addr, uint8_t data );
uint8_t mmc4_prgrom_flash_wr( uint16_t addr, uint8_t data );
void mmc2_prgrom_flash_wr( uint16_t addr, uint8_t data );
void mmc4_chrrom_flash_wr( uint16_t addr, uint8_t data );
void cdream_chrrom_flash_wr( uint16_t addr, uint8_t data );
uint8_t map30_prgrom_flash_wr( uint16_t addr, uint8_t data );
uint8_t gtrom_prgrom_flash_wr( uint16_t addr, uint8_t data );
void ppu_page_wr_lfsr( uint16_t addr, uint8_t data );
uint8_t a53_tssop_prgrom_flash_wr( uint16_t addr, uint8_t data );
uint8_t tssop_prgrom_flash_wr( uint16_t addr, uint8_t data );

4
firmware/source/swim.c
View File

@ -1,5 +1,7 @@
#include "swim.h"
#ifdef STM_CORE
//=================================================================================================
//
// SWIM operations
@ -475,3 +477,5 @@ __asm("stream_end:\n\t");
return ACK;
}
*/
#endif

2
firmware/source/usb.c
View File

@ -150,9 +150,11 @@ USBSETUP uint16_t usbFunctionSetup(uint8_t data[8]) {
break;
#endif
#ifdef STM_CORE
case DICT_SWIM:
rv[RETURN_ERR_IDX] = swim_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );
break;
#endif
case DICT_JTAG:
rv[RETURN_ERR_IDX] = jtag_call( spacket->opcode, spacket->miscdata, spacket->operand, &rv[RETURN_LEN_IDX] );

11
host/scripts/app/dict.lua
View File

@ -629,7 +629,7 @@ local function jtag( opcode, operand, misc, data )
end
-- external call for bootload dictionary
local function bootload( opcode, operand, misc, data )
local function bootload( opcode, operand, misc, data, permiterror )
assert ( op_bootload[opcode] , "\nERROR undefined opcode: " .. opcode .. " must be defined in shared_dict_bootload.h")
@ -657,7 +657,14 @@ local function bootload( opcode, operand, misc, data )
end
--print("error:", error_code, "data_len:", data_len)
assert ( (error_code == err_codes["SUCCESS"]), "\n ERROR!!! problem with opcode: " .. opcode .. " operand: " .. operand .. " misc: " .. misc .. " device error code: " .. error_code)
if not permiterror then
assert ( (error_code == err_codes["SUCCESS"]), "\n ERROR!!! problem with opcode: " .. opcode .. " operand: " .. operand .. " misc: " .. misc .. " device error code: " .. error_code)
else
--called with permission of error
if error_code ~= err_codes["SUCCESS"] then
print("Permitted Error with opcode: " .. opcode .. " operand: " .. operand .. " misc: " .. misc .. " device error code: " .. error_code)
end
end
if data_len and data_len ~= (wLength - RETURN_LEN_IDX) then
print("WARNING!! Device's return data length:", data_len, "did not match expected:", wLength-RETURN_LEN_IDX)

2
host/scripts/app/flash.lua
View File

@ -54,7 +54,9 @@ local function write_file( file, sizeKB, map, mem, debug )
local i = 1
local nak = 0
--print("file is:", file)
for bytes in file:lines(buff_size) do
--if debug then print("payload out") end
dict.buffer_payload_out( buff_size, bytes )
cur_buff_status = dict.buffer("GET_CUR_BUFF_STATUS")

34
host/scripts/app/fwupdate.lua
View File

@ -41,6 +41,23 @@ local function erase_main()
end
local function get_fw_appver(printit)
dict.bootload("SET_PTR_HI", 0x0800)
dict.bootload("SET_PTR_LO", 0x0800) --application version 0x08000800 "AV00"
local av = dict.bootload("RD_PTR_OFFSET")
local ver = dict.bootload("RD_PTR_OFFSET",1)
local avstring = string.format("%s%s%s%s", string.char(av&0x00FF), string.char(av>>8),
string.char(ver&0x00FF), string.char(ver>>8))
if (printit) then
print("device firmware app ver:", avstring)
end
return avstring
end
--skip is used because there is a ram pointer that often varies between builds
--we're never going back to main so this mismatch is allowed
local function update_firmware(newbuild, skip, forceup)
@ -55,18 +72,14 @@ local function update_firmware(newbuild, skip, forceup)
--TODO read the fwupdater & app version from the provided file
--compare to current device and determine if they're compatible
--test let's tinker with SRAM
dict.bootload("SET_PTR_HI", 0x0800)
dict.bootload("SET_PTR_LO", 0x0800) --application version 0x08000800 "AV00"
local av = dict.bootload("RD_PTR_OFFSET")
local ver = dict.bootload("RD_PTR_OFFSET",1)
local avstring = string.format("%s%s%s%s", string.char(av&0x00FF), string.char(av>>8),
string.char(ver&0x00FF), string.char(ver>>8))
print("current firmware prior to update:")
local avstring = get_fw_appver(true)
if avstring == "AV00" then
print("application version:", avstring)
if string.sub(avstring, 1, 2) ~= "AV" then
print("current firmware is not versioned, may need to update to firmware v2.3 or later using STmicro dfuse")
print("may be running nightly build in which case can probably ignore")
else
print("app version", avstring, "unknown, may need to update to firmware v2.3 or later using STmicro dfuse")
print("current firmware", avstring, "expected to support USB update process")
end
@ -237,6 +250,7 @@ end
-- functions other modules are able to call
fwupdate.update_firmware = update_firmware
fwupdate.get_fw_appver = get_fw_appver
-- return the module's table
return fwupdate

11
host/scripts/gb/mbc1.lua
View File

@ -6,6 +6,7 @@ local mbc1 = {}
local dict = require "scripts.app.dict"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local files = require "scripts.app.files"
-- file constants
local mapname = "MBC1"
@ -69,7 +70,8 @@ local function process(process_opts, console_opts)
-- TODO: test the cart
if process_opts["test"] then
unsupported("test")
print("no test function yet")
--unsupported("test")
end
-- Dump the cart to dumpfile
@ -114,6 +116,11 @@ local function process(process_opts, console_opts)
assert(file:close())
print("DONE post dumping ROM")
if (files.compare( process_opts["verify_filename"], "ignore/madden96_bank0.gb", true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")
@ -129,4 +136,4 @@ end
mbc1.process = process
-- return the module's table
return mbc1
return mbc1

30
host/scripts/gb/romonly.lua
View File

@ -4,6 +4,8 @@ local romonly = {}
-- import required modules
local dict = require "scripts.app.dict"
local dump = require "scripts.app.dump"
local files = require "scripts.app.files"
local jtag = require "scripts.app.jtag"
-- file constants
local mapname = "ROMONLY"
@ -46,7 +48,25 @@ local function process(process_opts, console_opts)
-- test the cart
if process_opts["test"] then
unsupported("test")
print("no test function yet")
-- unsupported("test")
-- 5v - 3v power cycle test
--[[
dict.io("GB_POWER_3V")
print("GBP high 3v GBA")
jtag.sleep(1)
dict.io("GB_POWER_5V")
print("GBP low 5v GB")
jtag.sleep(1)
dict.io("GB_POWER_3V")
print("GBP high 3v GBA")
jtag.sleep(1)
dict.io("GB_POWER_5V")
print("GBP low 5v GB")
jtag.sleep(1)
print("GBP reset (pullup) = 3v")
--]]
end
-- dump the cart to dumpfile
@ -89,6 +109,12 @@ local function process(process_opts, console_opts)
--close file
assert(file:close())
print("DONE post dumping ROM")
if (files.compare( process_opts["verify_filename"], "ignore/Boxxle.gb", true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")
@ -105,4 +131,4 @@ end
romonly.process = process
-- return the module's table
return romonly
return romonly

296
host/scripts/gb/romonly_paul.lua Normal file
View File

@ -0,0 +1,296 @@
-- create the module's table
local romonly = {}
-- import required modules
local dict = require "scripts.app.dict"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local files = require "scripts.app.files"
-- file constants
local mapname = "ROMONLY"
-- local functions
--read PRG-ROM flash ID
local function rom_manf_id( debug )
--init_mapper()
if debug then print("reading PRG-ROM manf ID") end
--enter software mode
--ROMSEL controls PRG-ROM /OE which needs to be low for flash writes
--So unlock commands need to be addressed below $8000
--DISCRETE_EXP0_PRGROM_WR doesn't toggle /ROMSEL by definition though, so A15 is unused
-- 15 14 13 12
-- 0x5 = 0b 0 1 0 1 -> $5555
-- 0x2 = 0b 0 0 1 0 -> $2AAA
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x90)
--read manf ID
local rv = dict.nes("NES_CPU_RD", 0x8000)
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
--read prod ID
rv = dict.nes("NES_CPU_RD", 0x8001)
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
--exit software
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x8000, 0xF0)
--verify exited
-- rv = dict.nes("NES_CPU_RD", 0x8001)
-- if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
end
--dump the ROM
local function dump_rom( file, rom_size_KB, debug )
--ROM ONLY dump all 32KB, most of this code is overkill for no MBC.
-- but follows same format as MBC's
local KB_per_read = 32 --$0000-7FFF is ROM space (32KByte)
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x00 -- $0000 base address for ROM
while ( read_count < num_reads ) do
if debug then print( "dump ROM part ", read_count, " of ", num_reads) end
dump.dumptofile( file, KB_per_read, addr_base, "GAMEBOY_PAGE", false )
read_count = read_count + 1
end
end
--write a single byte to ROM flash
local function wr_flash_byte(addr, value, debug)
if (addr < 0x8000 or addr > 0xFFFF) then
print("\n ERROR! flash write to PRG-ROM", string.format("$%X", addr), "must be $8000-FFFF \n\n")
return
end
--send unlock command and write byte
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xA0)
dict.nes("DISCRETE_EXP0_PRGROM_WR", addr, value)
local rv = dict.nes("NES_CPU_RD", addr)
local i = 0
while ( rv ~= value ) do
rv = dict.nes("NES_CPU_RD", addr)
i = i + 1
end
if debug then print(i, "naks, done writing byte.") end
--TODO handle timeout for problems
--TODO return pass/fail/info
end
--fast host flash one bank at a time...
--this is controlled from the host side one bank at a time
--but requires specific firmware MMC3 flashing functions
--there is super slow version commented out that doesn't require MMC3 specific firmware code
local function flash_rom(file, rom_size_KB, debug)
--init_mapper()
--test some bytes
--wr_flash_byte(0x8000, 0xA5, true)
--wr_flash_byte(0xFFFF, 0x5A, true)
print("\nProgramming PRG-ROM flash")
--most of this is overkill for NROM, but it's how we want to handle things for bigger mappers
local base_addr = 0x8000 --writes occur $8000-9FFF
local bank_size = 32*1024 --MMC3 8KByte per PRG bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
while cur_bank < total_banks do
if (cur_bank %8 == 0) then
print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
end
--program the entire bank's worth of data
flash.write_file( file, 32, mapname, "PRGROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming PRG-ROM flash")
end
--Cart should be in reset state upon calling this function
--this function processes all user requests for this specific board/mapper
--local function process( test, read, erase, program, verify, dumpfile, flashfile, verifyfile, mirror)
local function process(process_opts, console_opts)
local test = process_opts["test"]
local read = process_opts["read"]
local erase = process_opts["erase"]
local program = process_opts["program"]
local verify = process_opts["verify"]
local dumpfile = process_opts["dump_filename"]
local flashfile = process_opts["flash_filename"]
local verifyfile = process_opts["verify_filename"]
local rv = nil
local file
local rom_size = 32
local ram_size = 0
--initialize device i/o for NES
dict.io("IO_RESET")
dict.io("GAMEBOY_INIT")
dict.io("GB_POWER_5V") --gameboy carts prob run fine at 3v if want to be safe
--test the cart
if test then
-- print("Testing ", mapname)
-- nes.detect_mapper_mirroring(true)
-- print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))
-- --nes.read_flashID_prgrom_exp0(true)
-- rom_manf_id(true)
-- --nes.read_flashID_chrrom_8K(true)
-- chrrom_manf_id(true)
end
--dump the cart to dumpfile
if read then
print("\nDumping ROM...")
--init_mapper()
file = assert(io.open(dumpfile, "wb"))
--dump cart into file
dump_rom(file, rom_size, false)
--close file
assert(file:close())
print("DONE Dumping ROM")
end
--erase the cart
if erase then
-- print("\nErasing ", mapname);
--
-- --init_mapper()
--
-- print("erasing PRG-ROM");
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x80)
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0xAA)
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x2AAA, 0x55)
-- dict.nes("DISCRETE_EXP0_PRGROM_WR", 0x5555, 0x10)
-- rv = dict.nes("NES_CPU_RD", 0x8000)
--
-- local i = 0
--
-- --TODO create some function to pass the read value
-- --that's smart enough to figure out if the board is actually erasing or not
-- while ( rv ~= 0xFF ) do
-- rv = dict.nes("NES_CPU_RD", 0x8000)
-- i = i + 1
-- end
-- print(i, "naks, done erasing prg.");
--
-- print("erasing CHR-ROM");
-- dict.nes("NES_PPU_WR", 0x1555, 0xAA)
-- dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
-- dict.nes("NES_PPU_WR", 0x1555, 0x80)
-- dict.nes("NES_PPU_WR", 0x1555, 0xAA)
-- dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
-- dict.nes("NES_PPU_WR", 0x1555, 0x10)
-- rv = dict.nes("NES_PPU_RD", 0x0000)
--
-- i = 0
-- while ( rv ~= 0xFF ) do
-- rv = dict.nes("NES_PPU_RD", 0x0000)
-- i = i + 1
-- end
-- print(i, "naks, done erasing chr.\n");
end
--program flashfile to the cart
if program then
-- --open file
-- file = assert(io.open(flashfile, "rb"))
-- --determine if auto-doubling, deinterleaving, etc,
-- --needs done to make board compatible with rom
-- --flash cart
-- flash_rom(file, rom_size, true)
-- --close file
-- assert(file:close())
--
end
--verify flashfile is on the cart
if verify then
--for now let's just dump the file and verify manually
print("\nPost dumping ROM...")
--init_mapper()
file = assert(io.open(verifyfile, "wb"))
--dump cart into file
dump_rom(file, rom_size, false)
--close file
assert(file:close())
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")
end
-- global variables so other modules can use them
-- call functions desired to run when script is called/imported
-- functions other modules are able to call
romonly.process = process
-- return the module's table
return romonly

29
host/scripts/inlretro2.lua
View File

@ -75,17 +75,19 @@ function nes_exec(process_opts, console_opts)
mapper30 = require "scripts.nes.mapper30",
mapper30v2 = require "scripts.nes.mapper30v2",
mmc1 = require "scripts.nes.mmc1",
mmc2 = require "scripts.nes.mmc2",
mmc3 = require "scripts.nes.mmc3",
mmc4 = require "scripts.nes.mmc4",
mmc5 = require "scripts.nes.mmc5",
nrom = require "scripts.nes.nrom",
unrom = require "scripts.nes.unrom",
gtrom = require "scripts.nes.gtrom"
unrom_tsop = require "scripts.nes.unrom_tsop",
gtrom = require "scripts.nes.gtrom",
}
dict.io("IO_RESET")
dict.io("NES_INIT")
nes.detect_mapper_mirroring(true)
--dict.io("IO_RESET")
-- dict.io("NES_INIT")
--nes.detect_mapper_mirroring(true)
m = mappers[console_opts["mapper"]]
if m == nil then
@ -117,6 +119,23 @@ function main()
-- TODO: This should probably be one level up.
-- TODO: Ram probably needs a verify file as well?
-- Print application version of the firmware for debug/support
-- Should work on all hardware versions
local dict = require "scripts.app.dict"
local help = require "scripts.app.help"
local appver = help.hex(dict.bootload("GET_APP_VER", nil, nil, nil, true ))
print("firmware app ver request:", appver )
if appver < "3" then
print("firmware is out of date, recommend updating")
end
-- this method only works for STM32 based devices and reads version from flash address 0x0800-0800
-- local fwupdate = require "scripts.app.fwupdate"
-- local appver = fwupdate.get_fw_appver(true)
-- if appver ~= "AV03" then
-- print("new firmware has been released, recommend upgrading")
-- end
-- Always test!
local do_test = true
@ -166,7 +185,9 @@ function main()
nes = require "scripts.app.nes",
gba = require "scripts.gba.basic",
genesis = require "scripts.sega.genesis_v1",
--genesis = require "scripts.sega.genesis_v2",
snes = require "scripts.snes.v2proto_hirom"
--snes = require "scripts.snes.v2manual_hirom"
}
local console_exec = consoles[console_name]
local console_process_script = console_scripts[console_name]

42
host/scripts/inlretro_inl6fwupdate.lua Normal file
View File

@ -0,0 +1,42 @@
-- main script that runs application logic and flow
-- initial function called from C main
function main ()
print("\n")
local dict = require "scripts.app.dict"
local fwupdate = require "scripts.app.fwupdate"
--Firmware update without bootloader
--fwupdate.get_fw_appver(true)
--active development path (based on makefile in use)
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", 0x6E8, false) --INL_NES skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", nil, true ) --Know what I'm doing? force the update
--released INL6 path (big square boards)
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV00.bin")
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV01.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV02.bin", 0x6DC, false) --INL6 skip ram pointer
fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV03.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm.bin", 0x6DC, false) --nightly build
--released INL_N path (smaller NESmaker boards)
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV00.bin")
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV01.bin", 0x6E8, false) --INL_NES skip ram pointer
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV03.bin", 0x6E8, false) --INL_NES skip ram pointer
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm.bin", 0x6E8, false) --nightly build
end
main ()

42
host/scripts/inlretro_inlNESfwupdate.lua Normal file
View File

@ -0,0 +1,42 @@
-- main script that runs application logic and flow
-- initial function called from C main
function main ()
print("\n")
local dict = require "scripts.app.dict"
local fwupdate = require "scripts.app.fwupdate"
--Firmware update without bootloader
--fwupdate.get_fw_appver(true)
--active development path (based on makefile in use)
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", 0x6E8, false) --INL_NES skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm/inlretro_stm.bin", nil, true ) --Know what I'm doing? force the update
--released INL6 path (big square boards)
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV00.bin")
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV01.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV02.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm_AV03.bin", 0x6DC, false) --INL6 skip ram pointer
--fwupdate.update_firmware("../firmware/build_stm6/inlretro_stm.bin", 0x6DC, false) --nightly build
--released INL_N path (smaller NESmaker boards)
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV00.bin")
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV01.bin", 0x6E8, false) --INL_NES skip ram pointer
fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm_AV03.bin", 0x6E8, false) --INL_NES skip ram pointer
--fwupdate.update_firmware("../firmware/build_stmn/inlretro_stm.bin", 0x6E8, false) --nightly build
end
main ()

61
host/scripts/n64/basic.lua
View File

@ -7,6 +7,7 @@ local dict = require "scripts.app.dict"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local help = require "scripts.app.help"
local time = require "scripts.app.time"
-- file constants
@ -23,16 +24,24 @@ local function dump_rom( file, rom_size_KB, debug )
local num_reads = rom_size_KB / KB_per_bank
local read_count = 0
-- local read_count = 512 --second half of RE2
-- dict.n64("N64_SET_BANK", bank_base + 0)
-- dict.n64("N64_LATCH_ADDR", 0x0000)
-- print("read: ", help.hex(dict.n64("N64_RD")))
-- print("read: ", help.hex(dict.n64("N64_RD")))
-- dict.n64("N64_SET_BANK", bank_base + 0)
-- dict.n64("N64_LATCH_ADDR", 0x0000)
-- dump.dumptofile( file, KB_per_bank, addr_base, "N64_ROM_PAGE", false )
-- dict.n64("N64_RELEASE_BUS")
--[[
dict.n64("N64_SET_BANK", bank_base + 0)
dict.n64("N64_LATCH_ADDR", 0x0000)
print("read: ", help.hex(dict.n64("N64_RD")))
print("read: ", help.hex(dict.n64("N64_RD")))
dict.n64("N64_SET_BANK", bank_base + 0)
dict.n64("N64_LATCH_ADDR", 0x0000)
dump.dumptofile( file, KB_per_bank, addr_base, "N64_ROM_PAGE", false )
dict.n64("N64_LATCH_ADDR", 0x0000)
print("read: ", help.hex(dict.n64("N64_RD")))
print("read: ", help.hex(dict.n64("N64_RD")))
dict.n64("N64_LATCH_ADDR", 0x0000)
dump.dumptofile( file, KB_per_bank, addr_base, "N64_ROM_PAGE", false )
--]]
while ( read_count < num_reads ) do
@ -85,6 +94,37 @@ local function process(process_opts, console_opts)
--test cart by reading manf/prod ID
if test then
--read rom header
print("\nN64 attempt to read in rom header:")
local bank_base = 0x1000 --N64 roms start at address 0x1000_0000
dict.n64("N64_SET_BANK", bank_base + 0)
local i = 0, rv
local header = {}
local header_start = 0x0020
dict.n64("N64_LATCH_ADDR", header_start)
local header_len = 32
while i < header_len do
rv = dict.n64("N64_RD")
header[i+1] = rv>>8
i = i+1
header[i+1] = (rv & 0x00FF)
i = i+1
end
i = 1
while header[i] do
io.write(string.char(header[i]))
--io.write("B-",i,"=",header[i], " ")
i = i+1
end
print("\n")
-- print("Testing SNES board");
--
-- --SNES detect HiROM or LoROM & RAM
@ -120,11 +160,14 @@ local function process(process_opts, console_opts)
--dump the cart to dumpfile
if read then
print("\nDumping N64 ROM...")
print("Ouput format is Big Endian (.z64 format)")
file = assert(io.open(dumpfile, "wb"))
--dump cart into file
time.start()
dump_rom(file, rom_size, false)
time.report(rom_size)
--close file
assert(file:close())
@ -200,4 +243,4 @@ end
n64.process = process
-- return the module's table
return n64
return n64

213
host/scripts/nes/action53_tsop.lua
View File

@ -7,6 +7,7 @@ local nes = require "scripts.app.nes"
local dict = require "scripts.app.dict"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local files = require "scripts.app.files"
local buffers = require "scripts.app.buffers"
-- file constants
@ -71,20 +72,145 @@ local function prgrom_manf_id( debug )
if debug then print("reading PRG-ROM manf ID") end
--A0-A14 are all directly addressable in CNROM mode
--and mapper writes don't affect PRG banking
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x90)
--address doesn't get applied to flash unless M2 is high
--prg_data-addr_oe levelshifter pin is driven by ~M2
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x90)
rv = dict.nes("NES_CPU_RD", 0x8000)
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end --0x01
rv = dict.nes("NES_CPU_RD", 0x8002)
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end --0xDA(top), 0x5B(bot)
--exit software
dict.nes("NES_CPU_WR", 0x8000, 0xF0)
dict.nes("FLASH_3V_WR", 0x8000, 0xF0)
end
--host flash one bank at a time...
--this is controlled from the host side one bank at a time
--but requires mapper specific firmware flashing functions
--there is super slow version commented out that doesn't require MMC3 specific firmware code
local function flash_prgrom(file, rom_size_KB, debug)
init_mapper()
--test some bytes
--wr_prg_flash_byte(0x0000, 0xA5, true)
--wr_prg_flash_byte(0x0FFF, 0x5A, true)
print("\nProgramming PRG-ROM flash")
--initial testing of MMC3 with no specific MMC3 flash firmware functions 6min per 256KByte = 0.7KBps
local base_addr = 0x8000 --writes occur $8000-9FFF
local bank_size = 32*1024 --in CNROM mode 32KB PRG bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
while cur_bank < total_banks do
if (cur_bank %8 == 0) then
print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
end
--write the current bank to the mapper register
--nes_cpu_wr(0x5000, 0x81); //outer reg select mode
dict.nes("NES_CPU_WR", 0x5000, 0x81)
--nes_cpu_wr(0x8000, bank); //outer bank
dict.nes("NES_CPU_WR", 0x8000, cur_bank)
--nes_cpu_wr(0x5000, 0x54); //
dict.nes("NES_CPU_WR", 0x5000, 0x54)
--program the entire bank's worth of data
--[[ This version of the code programs a single byte at a time but doesn't require
-- MMC3 specific functions in the firmware
print("This is slow as molasses, but gets the job done")
byte_num = 0 --current byte within the bank
while byte_num < bank_size do
--read next byte from the file and convert to binary
byte_str = file:read(buff_size)
data = string.unpack("B", byte_str, 1)
--write the data
--SLOWEST OPTION: no firmware MMC3 specific functions 100% host flash algo:
--wr_prg_flash_byte(base_addr+byte_num, data, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create MMC3 write byte function:
dict.nes("MMC3_PRG_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
--NEXT STEP: firmware write page/bank function can use function pointer for the function above
-- this may cause issues with more complex algos
-- sometimes cur bank is needed
-- for this to work, need to have function post conditions meet the preconditions
-- that way host intervention is only needed for bank controls
-- Is there a way to allow for double buffering though..?
-- YES! just think of the bank as a complete memory
-- this greatly simplifies things and is exactly where we want to go
-- This is completed below outside the byte while loop @ 39KBps
if (verify) then
readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
if readdata ~= data then
print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
end
end
byte_num = byte_num + 1
end
--]]
--Have the device write a banks worth of data
--FAST! 13sec for 512KB = 39KBps
flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming PRG-ROM flash")
end
--dump the PRG ROM
local function dump_prgrom( file, rom_size_KB, debug )
--PRG-ROM dump 32KB at a time in CNROM mode with supervisor register
local KB_per_read = 32
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x80 -- $8000 PAGE
while ( read_count < num_reads ) do
if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
--select desired bank(s) to dump
--nes_cpu_wr(0x5000, 0x81); //outer reg select mode
--nes_cpu_wr(0x8000, bank); //outer bank
--nes_cpu_wr(0x5000, 0x00); //chr reg select act like CNROM
dict.nes("NES_CPU_WR", 0x5000, 0x81)
dict.nes("NES_CPU_WR", 0x8000, read_count)
dict.nes("NES_CPU_WR", 0x5000, 0x54)
--dump bank's worth of data
dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_PAGE", false )
read_count = read_count + 1
end
end
local function read_gift( base, len )
local rv
@ -127,19 +253,19 @@ local function write_gift(base, off)
dict.nes("NES_CPU_WR", 0x5000, 0x54)
--enter unlock bypass mode
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x20)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x20)
--write 0xA0 to address of byte to write, then write data
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, 0x00) --end previous line
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, 0x00) --end previous line
off=off+1
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, 0x15) --line number..?
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, 0x15) --line number..?
off=off+1
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, string.byte("(",1)) --start with open parenth
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, string.byte("(",1)) --start with open parenth
--off = off + 1 --increase to start of message but index starting at 1
@ -156,22 +282,22 @@ local function write_gift(base, off)
local len = string.len(msg1)
while (i <= len) do
dict.nes("NES_CPU_WR", base+off+i, 0xA0)
dict.nes("NES_CPU_WR", base+off+i, string.byte(msg1,i)) --line 1 of message
dict.nes("FLASH_3V_WR", base+off+i, 0xA0)
dict.nes("FLASH_3V_WR", base+off+i, string.byte(msg1,i)) --line 1 of message
print("write:", string.byte(msg1,i))
i=i+1
end
off = off + i
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, 0x00) --end current line
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, 0x00) --end current line
off=off+1
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, 0x16) --line number..?
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, 0x16) --line number..?
off=off+1
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, string.byte("(",1)) --start with open parenth
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, string.byte("(",1)) --start with open parenth
i = 1
@ -179,16 +305,16 @@ local function write_gift(base, off)
len = string.len(msg2)
while (i <= len) do
dict.nes("NES_CPU_WR", base+off+i, 0xA0)
dict.nes("NES_CPU_WR", base+off+i, string.byte(msg2,i)) --line 2 of message
dict.nes("FLASH_3V_WR", base+off+i, 0xA0)
dict.nes("FLASH_3V_WR", base+off+i, string.byte(msg2,i)) --line 2 of message
print("write:", string.byte(msg2,i))
i=i+1
end
off = off + i
dict.nes("NES_CPU_WR", base+off, 0xA0)
dict.nes("NES_CPU_WR", base+off, 0x00) --end current line
dict.nes("FLASH_3V_WR", base+off, 0xA0)
dict.nes("FLASH_3V_WR", base+off, 0x00) --end current line
--]]
@ -199,10 +325,10 @@ local function write_gift(base, off)
--exit unlock bypass
dict.nes("NES_CPU_WR", 0x8000, 0x90)
dict.nes("NES_CPU_WR", 0x8000, 0x00)
dict.nes("FLASH_3V_WR", 0x8000, 0x90)
dict.nes("FLASH_3V_WR", 0x8000, 0x00)
--reset the flash chip
dict.nes("NES_CPU_WR", 0x8000, 0xF0)
dict.nes("FLASH_3V_WR", 0x8000, 0xF0)
end
@ -246,6 +372,8 @@ local function process(process_opts, console_opts)
--dump the cart to dumpfile
if read then
print("\nDumping PRG & CHR ROMs...")
--initialize the mapper for dumping
init_mapper(debug)
@ -255,13 +383,16 @@ local function process(process_opts, console_opts)
create_header(file, prg_size, chr_size)
--dump cart into file
dump.dumptofile( file, prg_size, "A53", "PRGROM", true )
dump_prgrom(file, prg_size, false)
--close file
assert(file:close())
print("DONE Dumping PRG & CHR ROMs")
end
--erase the cart
-- erase = nil
if erase then
--initialize the mapper for erasing
@ -273,12 +404,12 @@ local function process(process_opts, console_opts)
--A0-A14 are all directly addressable in CNROM mode
--only A0-A11 are required to be valid for tsop-48
--and mapper writes don't affect PRG banking
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x80)
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x10)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x80)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x10)
rv = dict.nes("NES_CPU_RD", 0x8000)
local i = 0
@ -308,7 +439,8 @@ local function process(process_opts, console_opts)
--not susceptible to bus conflicts
--flash cart
flash.write_file( file, 1024, "A53", "PRGROM", true )
flash_prgrom(file, prg_size, true)
--close file
assert(file:close())
@ -324,10 +456,17 @@ local function process(process_opts, console_opts)
file = assert(io.open(verifyfile, "wb"))
--dump cart into file
dump.dumptofile( file, 1024, "A53", "PRGROM", true )
dump_prgrom(file, prg_size, false)
--close file
assert(file:close())
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")

146
host/scripts/nes/cdream.lua
View File

@ -7,18 +7,38 @@ local dict = require "scripts.app.dict"
local nes = require "scripts.app.nes"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local help = require "scripts.app.help"
local time = require "scripts.app.time"
local files = require "scripts.app.files"
local buffers = require "scripts.app.buffers"
-- file constants & variables
local mapname = "CDREAM"
local banktable_base = 0xCC43 --MTales, bank0 only though..
local rom_FF_addr = 0xCD42 --this is only present in first bank, so go there first
local rom_00_addr = 0x800C
--local banktable_base = 0xCC43 --MTales, bank0 only though..
--local banktable_base = 0xCC29 --MTales, bank0 only though..
----local rom_FF_addr = 0xCD42 --Alfonzo present in each bank write any value here will work if zeros always win
--local rom_FF_addr = 0xCD28 --Alfonzo present in each bank write any value here will work if zeros always win
--local rom_00_addr = 0x800C --Alfonzo present in each bank write 0 here to ensure bank 0
--local num_prg_banks = 16 --bank table size and organization depends on number of PRG banks
local banktable_base = 0xFF9E --Alfonzo all banks
local num_prg_banks = 4 --bank table size and organization depends on number of PRG banks
local rom_FF_addr = 0x8008 --Alfonzo present in each bank write any value here will work if zeros always win
local rom_00_addr = 0xFF9E --Alfonzo present in each bank write 0 here to ensure bank 0
--perhaps can use this to always get back to first bank which has a complete bank table
--MTales does have a zero in each and every bank at $800C which could be used to get back to bank0
--but for now let's rely on 0 always overriding 1 to allow us to always be able to get to bank0
-- local functions
local function create_header( file, prgKB, chrKB )
local mirroring = nes.detect_mapper_mirroring()
--write_header( file, prgKB, chrKB, mapper, mirroring )
nes.write_header( file, prgKB, chrKB, op_buffer[mapname], mirroring)
end
--read PRG-ROM flash ID
local function prgrom_manf_id( debug )
@ -129,26 +149,26 @@ local function wr_chr_flash_byte(bank, addr, value, debug)
--send unlock command
--dict.nes("NES_CPU_WR", rom_00_addr, 0x00) --assumes mcu wins bus conflicts if rom is high
--dict.nes("NES_CPU_WR", rom_FF_addr, 0x20) --assumes mcu wins bus conflicts if rom is high
dict.nes("NES_CPU_WR", banktable_base+0x20, 0x20)
--dict.nes("NES_CPU_WR", banktable_base+2, 0x02)
--dict.nes("NES_CPU_WR", banktable_base+0x20, 0x20) --alfonzo doesn't have this large of bank table
dict.nes("NES_CPU_WR", banktable_base+ num_prg_banks*2 , 0x20)
dict.nes("NES_PPU_WR", 0x1555, 0xAA)
--dict.nes("NES_CPU_WR", rom_00_addr, 0x00) --assumes mcu wins bus conflicts if rom is high
--dict.nes("NES_CPU_WR", rom_FF_addr, 0x10) --assumes mcu wins bus conflicts if rom is high
dict.nes("NES_CPU_WR", banktable_base+0x10, 0x10)
--dict.nes("NES_CPU_WR", banktable_base+1, 0x01)
--dict.nes("NES_CPU_WR", banktable_base+0x10, 0x10)
dict.nes("NES_CPU_WR", banktable_base+ num_prg_banks*1 , 0x10)
dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
--dict.nes("NES_CPU_WR", rom_00_addr, 0x00) --assumes mcu wins bus conflicts if rom is high
--dict.nes("NES_CPU_WR", rom_FF_addr, 0x20) --assumes mcu wins bus conflicts if rom is high
dict.nes("NES_CPU_WR", banktable_base+0x20, 0x20)
--dict.nes("NES_CPU_WR", banktable_base+2, 0x02)
--dict.nes("NES_CPU_WR", banktable_base+0x20, 0x20)
dict.nes("NES_CPU_WR", banktable_base+ num_prg_banks*2 , 0x20)
dict.nes("NES_PPU_WR", 0x1555, 0xA0)
--select desired bank
--dict.nes("NES_CPU_WR", rom_00_addr, 0x00) --assumes mcu wins bus conflicts if rom is high
--dict.nes("NES_CPU_WR", rom_FF_addr, bank<<4) --assumes mcu wins bus conflicts if rom is high
dict.nes("NES_CPU_WR", banktable_base+(bank<<4), (bank<<4))
dict.nes("NES_CPU_WR", banktable_base+(bank*num_prg_banks), (bank<<4))
--dict.nes("NES_CPU_WR", banktable_base+bank, bank)
--write the byte
dict.nes("NES_PPU_WR", addr, value)
@ -157,9 +177,15 @@ local function wr_chr_flash_byte(bank, addr, value, debug)
local i = 0
while ( rv ~= value ) do
rv = dict.nes("NES_PPU_RD", addr)
while ( rv ~= dict.nes("NES_PPU_RD", addr) ) do
i = i + 1
print(help.hex(rv))
if i > 100 then
print("naks > 100, write failed, addr:", help.hex(addr), "data:", help.hex(value),"readback:", help.hex(rv) )
return
end
end
if debug then print(i, "naks, done writing byte.") end
@ -251,8 +277,8 @@ local function dump_chrrom( file, rom_size_KB, debug )
--select the proper CHR-ROM bank
--dump/read size is equal to bank size, so read_count is equal to bank number
--dict.nes("NES_CPU_WR", rom_FF_addr, read_count)
dict.nes("NES_CPU_WR", banktable_base+(read_count<<4), (read_count<<4))
dict.nes("NES_CPU_WR", rom_FF_addr, read_count<<4)
--dict.nes("NES_CPU_WR", banktable_base+(read_count<<4), (read_count<<4))
--dump the bank
dump.dumptofile( file, KB_per_read, addr_base, "NESPPU_1KB", false )
@ -345,42 +371,29 @@ local function flash_chrrom(file, rom_size_KB, debug)
--init_mapper()
--test some bytes
--wr_chr_flash_byte(0x00, 0x0000, 0x03, true)
--wr_chr_flash_byte(0x00, 0x1FFF, 0x0C, true)
--wr_chr_flash_byte(0x01, 0x0000, 0x13, true)
--wr_chr_flash_byte(0x01, 0x1FFF, 0x1C, true)
--wr_chr_flash_byte(0x02, 0x0000, 0x23, true)
--wr_chr_flash_byte(0x02, 0x1FFF, 0x2C, true)
--wr_chr_flash_byte(0x03, 0x0000, 0x33, true)
--wr_chr_flash_byte(0x03, 0x1FFF, 0x3C, true)
--wr_chr_flash_byte(0x04, 0x0000, 0x43, true)
--wr_chr_flash_byte(0x04, 0x1FFF, 0x4C, true)
--wr_chr_flash_byte(0x05, 0x0000, 0x53, true)
--wr_chr_flash_byte(0x05, 0x1FFF, 0x5C, true)
--wr_chr_flash_byte(0x06, 0x0000, 0x63, true)
--wr_chr_flash_byte(0x06, 0x1FFF, 0x6C, true)
--wr_chr_flash_byte(0x07, 0x0000, 0x73, true)
--wr_chr_flash_byte(0x07, 0x1FFF, 0x7C, true)
--wr_chr_flash_byte(0x08, 0x0000, 0x83, true)
--wr_chr_flash_byte(0x08, 0x1FFF, 0x8C, true)
--wr_chr_flash_byte(0x09, 0x0000, 0x93, true)
--wr_chr_flash_byte(0x09, 0x1FFF, 0x9C, true)
--wr_chr_flash_byte(0x0A, 0x0000, 0xA3, true)
--wr_chr_flash_byte(0x0A, 0x1FFF, 0xAC, true)
--wr_chr_flash_byte(0x0B, 0x0000, 0xB3, true)
--wr_chr_flash_byte(0x0B, 0x1FFF, 0xBC, true)
--wr_chr_flash_byte(0x0C, 0x0000, 0xC3, true)
--wr_chr_flash_byte(0x0C, 0x1FFF, 0xCC, true)
--wr_chr_flash_byte(0x0D, 0x0000, 0xD3, true)
--wr_chr_flash_byte(0x0D, 0x1FFF, 0xDC, true)
--wr_chr_flash_byte(0x0E, 0x0000, 0xE3, true)
--wr_chr_flash_byte(0x0E, 0x1FFF, 0xEC, true)
--wr_chr_flash_byte(0x0F, 0x0000, 0xF3, true)
--wr_chr_flash_byte(0x0F, 0x1FFF, 0xFC, true)
--print("test writes")
--wr_chr_flash_byte(0x00, 0x0000, 0x03, true) wr_chr_flash_byte(0x00, 0x1FFF, 0x0C, true)
--wr_chr_flash_byte(0x01, 0x0000, 0x13, true) wr_chr_flash_byte(0x01, 0x1FFF, 0x1C, true)
--wr_chr_flash_byte(0x02, 0x0000, 0x23, true) wr_chr_flash_byte(0x02, 0x1FFF, 0x2C, true)
--wr_chr_flash_byte(0x03, 0x0000, 0x33, true) wr_chr_flash_byte(0x03, 0x1FFF, 0x3C, true)
--wr_chr_flash_byte(0x04, 0x0000, 0x43, true) wr_chr_flash_byte(0x04, 0x1FFF, 0x4C, true)
--wr_chr_flash_byte(0x05, 0x0000, 0x53, true) wr_chr_flash_byte(0x05, 0x1FFF, 0x5C, true)
--wr_chr_flash_byte(0x06, 0x0000, 0x63, true) wr_chr_flash_byte(0x06, 0x1FFF, 0x6C, true)
--wr_chr_flash_byte(0x07, 0x0000, 0x73, true) wr_chr_flash_byte(0x07, 0x1FFF, 0x7C, true)
--wr_chr_flash_byte(0x08, 0x0000, 0x83, true) wr_chr_flash_byte(0x08, 0x1FFF, 0x8C, true)
--wr_chr_flash_byte(0x09, 0x0000, 0x93, true) wr_chr_flash_byte(0x09, 0x1FFF, 0x9C, true)
--wr_chr_flash_byte(0x0A, 0x0000, 0xA3, true) wr_chr_flash_byte(0x0A, 0x1FFF, 0xAC, true)
--wr_chr_flash_byte(0x0B, 0x0000, 0xB3, true) wr_chr_flash_byte(0x0B, 0x1FFF, 0xBC, true)
--wr_chr_flash_byte(0x0C, 0x0000, 0xC3, true) wr_chr_flash_byte(0x0C, 0x1FFF, 0xCC, true)
--wr_chr_flash_byte(0x0D, 0x0000, 0xD3, true) wr_chr_flash_byte(0x0D, 0x1FFF, 0xDC, true)
--wr_chr_flash_byte(0x0E, 0x0000, 0xE3, true) wr_chr_flash_byte(0x0E, 0x1FFF, 0xEC, true)
--wr_chr_flash_byte(0x0F, 0x0000, 0xF3, true) wr_chr_flash_byte(0x0F, 0x1FFF, 0xFC, true)
print("\nProgramming CHR-ROM flash")
--most of this is overkill for NROM, but it's how we want to handle things for bigger mappers
--if 1 then return end
local base_addr = 0x0000
local bank_size = 8*1024
local buff_size = 1 --number of bytes to write at a time
@ -391,12 +404,18 @@ local function flash_chrrom(file, rom_size_KB, debug)
local byte_str, data, readdata
--start with the first bank selected so the bank table is visible
--only really need banktable present in a single PRG bank
--having it in the first bank is easiest to access with assumption that 0 beats 1 on bus conflicts
dict.nes("NES_CPU_WR", rom_00_addr, 0x00) --assumes mcu wins bus conflicts if rom is high
--set the bank table address
dict.nes("SET_BANK_TABLE", banktable_base)
if debug then print("get banktable:", string.format("%X", dict.nes("GET_BANK_TABLE"))) end
--tell firmware number of PRG-ROM banks so it knows the structure of the banktable
dict.nes("SET_NUM_PRG_BANKS", num_prg_banks)
if debug then print("get num prg banks:", dict.nes("GET_NUM_PRG_BANKS")) end
while cur_bank < total_banks do
if (cur_bank %2 == 0) then
@ -424,7 +443,7 @@ local function flash_chrrom(file, rom_size_KB, debug)
--SLOWEST OPTION: no firmware MMC3 specific functions 100% host flash algo:
--wr_chr_flash_byte(cur_bank, base_addr+byte_num, data, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
dict.nes("CDREAM_CHR_FLASH_WR", base_addr+byte_num, data)
--dict.nes("CDREAM_CHR_FLASH_WR", base_addr+byte_num, data)
--FASTEST have the firmware handle flashing a bank's worth of data
--control the init and banking from the host side
@ -482,6 +501,22 @@ local function process(process_opts, console_opts)
prgrom_manf_id(true)
chrrom_manf_id(true)
--verify mirroring if desired
--if ( nes.detect_mapper_mirroring() == "VERT" ) then
-- if debug then print("pass VERT mirror test") end
--else
-- print("\n\n\nFAIL MIRRORING JUMPER IS NOT VERTICAL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n\n")
-- --don't continue
-- return false
--end
--if ( nes.detect_mapper_mirroring() == "HORZ" ) then
-- if debug then print("pass VERT mirror test") end
--else
-- print("\n\n\nFAIL MIRRORING JUMPER IS NOT HORIZONTAL!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n\n")
-- --don't continue
-- return false
--end
end
--dump the cart to dumpfile
@ -489,6 +524,9 @@ local function process(process_opts, console_opts)
print("\nDumping PRG & CHR ROMs...")
file = assert(io.open(dumpfile, "wb"))
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
--TODO find bank table to avoid bus conflicts!
--dump cart into file
dump_prgrom(file, prg_size, false)
@ -554,7 +592,8 @@ local function process(process_opts, console_opts)
--find bank table in the rom
--write bank table to all banks of cartridge
--Mojontales bank table is at $CC43 so hard code that for now
wr_bank_table(banktable_base, 256)
--wr_bank_table(banktable_base, 256)
wr_bank_table(banktable_base, 4)
--flash cart
flash_prgrom(file, prg_size, false)
@ -567,19 +606,24 @@ local function process(process_opts, console_opts)
--verify flashfile is on the cart
if verify then
--for now let's just dump the file and verify manually
print("\nPost dumping PRG & CHR ROMs...")
file = assert(io.open(verifyfile, "wb"))
--dump cart into file
time.start()
dump_prgrom(file, prg_size, false)
dump_chrrom(file, chr_size, false)
time.report(prg_size+chr_size)
--close file
assert(file:close())
print("DONE post dumping PRG & CHR ROMs")
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")

4
host/scripts/nes/cnrom.lua
View File

@ -13,8 +13,8 @@ local buffers = require "scripts.app.buffers"
-- file constants & variables
local mapname = "CNROM"
local banktable_base = 0xFFC8 --galf
local rom_FF_addr = 0x8008 --galf
local banktable_base = 0x8000 --alwa
local rom_FF_addr = banktable_base+3 --generic 32KB CHR-ROM
-- local functions

158
host/scripts/nes/easyNSF.lua
View File

@ -8,6 +8,8 @@ local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local buffers = require "scripts.app.buffers"
local nes = require "scripts.app.nes"
local files = require "scripts.app.files"
local time = require "scripts.app.time"
-- file constants
local mapname = "EZNSF"
@ -54,6 +56,8 @@ local function init_mapper( debug )
dict.nes("NES_CPU_WR", 0x5006, 0x00)
dict.nes("NES_CPU_WR", 0x5007, 0x00)
--flash /WE signal only goes low for $9000-9FFF
end
@ -66,19 +70,128 @@ local function prgrom_manf_id( debug )
if debug then print("reading PRG-ROM manf ID") end
--A0-A14 are all directly addressable in CNROM mode
--and mapper writes don't affect PRG banking
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x90)
dict.nes("FLASH_3V_WR", 0x9AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x9555, 0x55)
dict.nes("FLASH_3V_WR", 0x9AAA, 0x90)
rv = dict.nes("NES_CPU_RD", 0x8000)
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end --0x01
rv = dict.nes("NES_CPU_RD", 0x8002)
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end --0xDA(top), 0x5B(bot)
--exit software
dict.nes("NES_CPU_WR", 0x8000, 0xF0)
dict.nes("FLASH_3V_WR", 0x9000, 0xF0)
end
--host flash one bank at a time...
--this is controlled from the host side one bank at a time
--but requires mapper specific firmware flashing functions
--there is super slow version commented out that doesn't require MMC3 specific firmware code
local function flash_prgrom(file, rom_size_KB, debug)
init_mapper()
--test some bytes
--wr_prg_flash_byte(0x0000, 0xA5, true)
--wr_prg_flash_byte(0x0FFF, 0x5A, true)
print("\nProgramming PRG-ROM flash")
--initial testing of MMC3 with no specific MMC3 flash firmware functions 6min per 256KByte = 0.7KBps
local base_addr = 0x9000 --writes occur $9000-9FFF
local bank_size = 4*1024 --4KB PRG bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
while cur_bank < total_banks do
if (cur_bank %32 == 0) then
print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
end
--write the current bank to the mapper register
dict.nes("NES_CPU_WR", 0x5001, cur_bank) --bank at $9000
--program the entire bank's worth of data
--[[ This version of the code programs a single byte at a time but doesn't require
-- MMC3 specific functions in the firmware
print("This is slow as molasses, but gets the job done")
byte_num = 0 --current byte within the bank
while byte_num < bank_size do
--read next byte from the file and convert to binary
byte_str = file:read(buff_size)
data = string.unpack("B", byte_str, 1)
--write the data
--SLOWEST OPTION: no firmware MMC3 specific functions 100% host flash algo:
--wr_prg_flash_byte(base_addr+byte_num, data, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create MMC3 write byte function:
dict.nes("MMC3_PRG_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
--NEXT STEP: firmware write page/bank function can use function pointer for the function above
-- this may cause issues with more complex algos
-- sometimes cur bank is needed
-- for this to work, need to have function post conditions meet the preconditions
-- that way host intervention is only needed for bank controls
-- Is there a way to allow for double buffering though..?
-- YES! just think of the bank as a complete memory
-- this greatly simplifies things and is exactly where we want to go
-- This is completed below outside the byte while loop @ 39KBps
if (verify) then
readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
if readdata ~= data then
print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
end
end
byte_num = byte_num + 1
end
--]]
--Have the device write a banks worth of data
--FAST! 13sec for 512KB = 39KBps
flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming PRG-ROM flash")
end
--dump the PRG ROM
local function dump_prgrom( file, rom_size_KB, debug )
local KB_per_read = 4
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x80 -- $8000
while ( read_count < num_reads ) do
if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
--select desired bank(s) to dump
--mapper 30 bank register is $C000-FFFF
dict.nes("NES_CPU_WR", 0x5000, read_count) --16KB @ CPU $8000
dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_PAGE", false )
read_count = read_count + 1
end
end
@ -113,6 +226,8 @@ local function process(process_opts, console_opts)
--dump the cart to dumpfile
if read then
print("\nDumping PRG-ROM...")
--initialize the mapper for dumping
init_mapper(debug)
@ -122,10 +237,13 @@ local function process(process_opts, console_opts)
create_header(file, prg_size, chr_size)
--dump cart into file
dump.dumptofile( file, 1024, "EZNSF", "PRGROM", true )
time.start()
dump_prgrom(file, prg_size, false)
time.report(prg_size)
--close file
assert(file:close())
print("DONE Dumping PRG-ROM")
end
--erase the cart
@ -140,12 +258,12 @@ local function process(process_opts, console_opts)
--A0-A14 are all directly addressable in CNROM mode
--only A0-A11 are required to be valid for tsop-48
--and mapper writes don't affect PRG banking
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x80)
dict.nes("NES_CPU_WR", 0x8AAA, 0xAA)
dict.nes("NES_CPU_WR", 0x8555, 0x55)
dict.nes("NES_CPU_WR", 0x8AAA, 0x10)
dict.nes("FLASH_3V_WR", 0x9AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x9555, 0x55)
dict.nes("FLASH_3V_WR", 0x9AAA, 0x80)
dict.nes("FLASH_3V_WR", 0x9AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x9555, 0x55)
dict.nes("FLASH_3V_WR", 0x9AAA, 0x10)
rv = dict.nes("NES_CPU_RD", 0x8000)
local i = 0
@ -175,7 +293,10 @@ local function process(process_opts, console_opts)
--not susceptible to bus conflicts
--flash cart
flash.write_file( file, 1024, "EZNSF", "PRGROM", true )
--flash.write_file( file, 1024, "EZNSF", "PRGROM", true )
time.start()
flash_prgrom(file, prg_size, true)
time.report(prg_size)
--close file
assert(file:close())
@ -184,6 +305,7 @@ local function process(process_opts, console_opts)
--verify flashfile is on the cart
if verify then
--for now let's just dump the file and verify manually
print("\nVerifing PRG-ROM...")
--initialize the mapper for dumping
init_mapper(debug)
@ -191,10 +313,20 @@ local function process(process_opts, console_opts)
file = assert(io.open(verifyfile, "wb"))
--dump cart into file
dump.dumptofile( file, 1024, "EZNSF", "PRGROM", true )
time.start()
--dump.dumptofile( file, 1024, "EZNSF", "PRGROM", true )
dump_prgrom(file, prg_size, false)
time.report(prg_size)
--close file
assert(file:close())
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")

1
host/scripts/nes/mapper30v2.lua
View File

@ -10,7 +10,6 @@ local flash = require "scripts.app.flash"
local time = require "scripts.app.time"
local files = require "scripts.app.files"
local ciccom = require "scripts.app.ciccom"
local time = require "scripts.app.time"
local swim = require "scripts.app.swim"
local mapper30_legacy = require "scripts.nes.mapper30"
local buffers = require "scripts.app.buffers"

1
host/scripts/nes/mmc1.lua
View File

@ -217,6 +217,7 @@ local function dump_wram( file, rom_size_KB, debug )
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x06 -- $6000
--TODO update to NES_CPU_PAGE instead of NES_CPU_4KB
while ( read_count < num_reads ) do

762
host/scripts/nes/mmc2.lua Normal file
View File

@ -0,0 +1,762 @@
-- create the module's table
local mmc2 = {}
-- import required modules
local dict = require "scripts.app.dict"
local nes = require "scripts.app.nes"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local buffers = require "scripts.app.buffers"
local time = require "scripts.app.time"
local files = require "scripts.app.files"
-- file constants
local mapname = "MMC2"
-- local functions
local function create_header( file, prgKB, chrKB )
--write_header( file, prgKB, chrKB, mapper, mirroring )
nes.write_header( file, prgKB, chrKB, op_buffer[mapname], 0)
end
--disables WRAM, selects Vertical mirroring
--sets up CHR-ROM flash PT0 for DATA, Commands: $5555->$1555 $2AAA->$1AAA
--sets up PRG-ROM flash DATA: $8000-9FFF, Commands: $5555->D555 $2AAA->$AAAA
--leaves $8000 control reg selected to IRQ value selected so $A000 writes don't affect banking
local function init_mapper( debug )
--RAM is always enabled..
--set mirroring
dict.nes("NES_CPU_WR", 0xF000, 0x00) --bit0: 0-vert 1-horz
--For CHR-ROM flash writes, use lower 4KB (PT0) for writting data & upper 4KB (PT1) for commands
dict.nes("NES_CPU_WR", 0xB000, 0x02) --4KB @ PPU $0000 -> $2AAA cmd & writes
dict.nes("NES_CPU_WR", 0xC000, 0x02) --4KB @ PPU $0000
dict.nes("NES_CPU_WR", 0xD000, 0x05) --4KB @ PPU $1000 -> $5555 cmd
dict.nes("NES_CPU_WR", 0xE000, 0x05) --4KB @ PPU $1000
--can use upper 16KB $D555 for $5555 commands
--need lower bank for $AAAA commands and writes
dict.nes("NES_CPU_WR", 0xA000, 0x00) --16KB @ CPU $8000
end
--test the mapper's mirroring modes to verify working properly
--can be used to help identify board: returns true if pass, false if failed
local function mirror_test( debug )
--put mapper in known state (mirror bits cleared)
init_mapper()
--Vertical
--dict.nes("NES_CPU_WR", 0xF000, 0x00) --bit0: 0-vert 1-horz
if (nes.detect_mapper_mirroring(false) ~= "VERT") then
print(mapname, " vert mirror test fail")
return false
end
--Horizontal
dict.nes("NES_CPU_WR", 0xF000, 0x01) --bit0: 0-vert 1-horz
if (nes.detect_mapper_mirroring(false) ~= "HORZ") then
print(mapname, " horz mirror test fail")
return false
end
--passed all tests
if(debug) then print(mapname, " mirror test passed") end
return true
end
--debug CHR-ROM banking with special CHR-ROM image where first
--byte in bank is set to bank number
local function chr_bank_test()
print("TESTING CHR-ROM BANKS")
--address that has different values in different banks
local addr = 0x0017
dict.nes("NES_CPU_WR", 0xB000, 0) -- 0FD8 register
dict.nes("NES_CPU_WR", 0xC000, 0) -- 0FE8 register
print("BANK 0 @ addr:", dict.nes("NES_PPU_RD", addr))
dict.nes("NES_CPU_WR", 0xB000, 1) -- 0FD8 register
dict.nes("NES_CPU_WR", 0xC000, 1) -- 0FE8 register
print("BANK 1 @ addr:", dict.nes("NES_PPU_RD", addr))
dict.nes("NES_CPU_WR", 0xB000, 2) -- 0FD8 register
dict.nes("NES_CPU_WR", 0xC000, 2) -- 0FE8 register
print("BANK 2 @ addr:", dict.nes("NES_PPU_RD", addr))
dict.nes("NES_CPU_WR", 0xB000, 3) -- 0FD8 register
dict.nes("NES_CPU_WR", 0xC000, 3) -- 0FE8 register
print("BANK 3 @ addr:", dict.nes("NES_PPU_RD", addr))
dict.nes("NES_CPU_WR", 0xB000, 0) -- 0FD8 register
dict.nes("NES_CPU_WR", 0xC000, 1) -- 0FE8 register
dict.nes("NES_CPU_WR", 0xD000, 2) -- 1FD8 register
dict.nes("NES_CPU_WR", 0xE000, 3) -- 1FE8 register
print("$0FD7:", dict.nes("NES_PPU_RD", 0x0FE8))
print("$0017:", dict.nes("NES_PPU_RD", 0x0017))
print("$0017:", dict.nes("NES_PPU_RD", 0x0017))
print("$0FD8:", dict.nes("NES_PPU_RD", 0x0FD8))
print("$0017:", dict.nes("NES_PPU_RD", 0x0017))
print("$0017:", dict.nes("NES_PPU_RD", 0x0017))
print("$1FE8:", dict.nes("NES_PPU_RD", 0x1FE8))
print("$1017:", dict.nes("NES_PPU_RD", 0x1017))
print("$1017:", dict.nes("NES_PPU_RD", 0x1017))
print("$1FE8:", dict.nes("NES_PPU_RD", 0x1FD8))
print("$1017:", dict.nes("NES_PPU_RD", 0x1017))
print("$1017:", dict.nes("NES_PPU_RD", 0x1017))
end
--read PRG-ROM flash ID
local function prgrom_manf_id( debug )
init_mapper()
if debug then print("reading PRG-ROM manf ID") end
--SOP
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x90)
--PLCC
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x90)
rv = dict.nes("NES_CPU_RD", 0x8000) --0xC2 = MXIC
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
--rv = dict.nes("NES_CPU_RD", 0x8002) --SOP 0x23/0xAB 512KB top/bottom
--SOP 0x51/0x57 256KB top/bottom
--SOP 0xD6/0x58 1MB top/bottom
rv = dict.nes("NES_CPU_RD", 0x8001) --PLCC 0xB5/B6/B7 128-512KB SST
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
--exit software
dict.nes("NES_CPU_WR", 0x8000, 0xF0)
end
--read CHR-ROM flash ID
local function chrrom_manf_id( debug )
init_mapper()
if debug then print("reading CHR-ROM manf ID") end
--A0-A14 are all directly addressable in CNROM mode
--and mapper writes don't affect PRG banking
dict.nes("NES_PPU_WR", 0x1555, 0xAA)
dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
dict.nes("NES_PPU_WR", 0x1555, 0x90)
rv = dict.nes("NES_PPU_RD", 0x0000)
if debug then print("attempted read CHR-ROM manf ID:", string.format("%X", rv)) end
rv = dict.nes("NES_PPU_RD", 0x0001)
if debug then print("attempted read CHR-ROM prod ID:", string.format("%X", rv)) end
--exit software
dict.nes("NES_PPU_WR", 0x8000, 0xF0)
end
--dump the PRG ROM
local function dump_prgrom( file, rom_size_KB, debug )
--PRG-ROM dump 8KB at a time
local KB_per_read = 8
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x80 -- $8000
while ( read_count < num_reads ) do
if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
--select desired bank(s) to dump
dict.nes("NES_CPU_WR", 0xA000, read_count) --8KB @ CPU $8000
--16 = number of KB to dump per loop
--0x08 = starting read address A12-15 -> $8000
--NESCPU_4KB designate mapper independent read of NES CPU address space
--mapper must be 0-15 to designate A12-15
--dump.dumptofile( file, 16, 0x08, "NESCPU_4KB", true )
dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_PAGE", false )
read_count = read_count + 1
end
end
--dump the CHR ROM
local function dump_chrrom( file, rom_size_KB, debug )
local KB_per_read = 8 --dump both PT at once
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x00 -- $0000
while ( read_count < num_reads ) do
if debug then print( "dump CHR part ", read_count, " of ", num_reads) end
--the bank is half the size of KB per read so must multiply by 2
dict.nes("NES_CPU_WR", 0xB000, (read_count*2)) --4KB @ PPU $0000
dict.nes("NES_CPU_WR", 0xC000, (read_count*2)) --4KB @ PPU $0000
--the bank is half the size of KB per read so must multiply by 2 and add 1 for second 1KB
dict.nes("NES_CPU_WR", 0xD000, (read_count*2+1))--4KB @ PPU $1000
dict.nes("NES_CPU_WR", 0xE000, (read_count*2+1))--4KB @ PPU $1000
--4 = number of KB to dump per loop
--0x00 = starting read address A10-13 -> $0000
--mapper must be 0x00 or 0x04-0x3C to designate A10-13
-- bits 7, 6, 1, & 0 CAN NOT BE SET!
-- 0x04 would designate that A10 is set -> $0400 (the second 1KB PT bank)
-- 0x20 would designate that A13 is set -> $2000 (first name table)
dump.dumptofile( file, KB_per_read, addr_base, "NESPPU_PAGE", false )
read_count = read_count + 1
end
end
--dump the WRAM, assumes the WRAM was enabled/disabled as desired prior to calling
local function dump_wram( file, rom_size_KB, debug )
local KB_per_read = 8
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x06 -- $6000
while ( read_count < num_reads ) do
if debug then print( "dump WRAM part ", read_count, " of ", num_reads) end
dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
read_count = read_count + 1
end
end
--write a single byte to PRG-ROM flash
--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
--REQ: addr must be in the first bank $8000-BFFF
local function wr_prg_flash_byte(addr, value, bank, debug)
if (addr < 0x8000 or addr > 0xBFFF) then
print("\n ERROR! flash write to PRG-ROM", string.format("$%X", addr), "must be $8000-BFFF \n\n")
return
end
--select bank
dict.nes("NES_CPU_WR", 0xA000, bank)
--send unlock command and write byte
--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
--dict.nes("NES_CPU_WR", 0xD555, 0xA0)
dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
dict.nes("NES_CPU_WR", 0xF555, 0x55)
dict.nes("NES_CPU_WR", 0xFAAA, 0xA0)
dict.nes("NES_CPU_WR", addr, value) --if this write was $A000-AFFF it will also corrupt the bank
--recover bank
dict.nes("NES_CPU_WR", 0xA000, bank)
local rv = dict.nes("NES_CPU_RD", addr)
local i = 0
while ( rv ~= value ) do
rv = dict.nes("NES_CPU_RD", addr)
i = i + 1
end
if debug then print(i, "naks, done writing byte.") end
--TODO handle timeout for problems
--TODO return pass/fail/info
end
--write a single byte to CHR-ROM flash
--PRE: assumes mapper is initialized and bank is selected as prescribed in mapper_init
--REQ: addr must be in the first 2 banks $0000-0FFF
local function wr_chr_flash_byte(addr, value, bank, debug)
if (addr < 0x0000 or addr > 0x0FFF) then
print("\n ERROR! flash write to CHR-ROM", string.format("$%X", addr), "must be $0000-0FFF \n\n")
return
end
--set bank for unlock command
dict.nes("NES_CPU_WR", 0xB000, 0x0A) --4KB @ PPU $0000 -> $2AAA cmd & writes
dict.nes("NES_CPU_WR", 0xC000, 0x0A) --4KB @ PPU $0000
--send unlock command
dict.nes("NES_PPU_WR", 0x1555, 0xAA)
dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
dict.nes("NES_PPU_WR", 0x1555, 0xA0)
--select desired bank
dict.nes("NES_CPU_WR", 0xB000, bank) --4KB @ PPU $0000 -> $2AAA cmd & writes
dict.nes("NES_CPU_WR", 0xC000, bank) --4KB @ PPU $0000
--write data
dict.nes("NES_PPU_WR", addr, value)
local rv = dict.nes("NES_PPU_RD", addr)
local i = 0
while ( rv ~= value ) do
rv = dict.nes("NES_PPU_RD", addr)
i = i + 1
end
if debug then print(i, "naks, done writing byte.") end
--TODO handle timeout for problems
--TODO return pass/fail/info
end
--host flash one bank at a time...
--this is controlled from the host side one bank at a time
--but requires mapper specific firmware flashing functions
--there is super slow version commented out that doesn't require mapper specific firmware code
local function flash_prgrom(file, rom_size_KB, debug)
init_mapper()
--test some bytes
-- wr_prg_flash_byte(0x8000, 0xA5, 0, true)
-- wr_prg_flash_byte(0xBFFF, 0x5A, 0, true)
-- wr_prg_flash_byte(0x8000, 0x15, 1, true)
-- wr_prg_flash_byte(0xBFFF, 0x1A, 1, true)
-- wr_prg_flash_byte(0x8000, 0xF5, 0xF, true)
-- wr_prg_flash_byte(0xBFFF, 0xFA, 0xF, true)
print("\nProgramming PRG-ROM flash")
local base_addr = 0x8000 --writes occur $8000-BFFF
local bank_size = 8*1024 --MMC2 8KByte per PRG bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
while cur_bank < total_banks do
if (cur_bank %8 == 0) then
print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
end
--select desired bank, needed for first write
dict.nes("NES_CPU_WR", 0xA000, cur_bank) --16KB @ CPU $8000
--set cur_bank for recovery and subsequent bytes
dict.nes("SET_CUR_BANK", cur_bank)
if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
--program the entire bank's worth of data
--[[ This version of the code programs a single byte at a time but doesn't require
-- mapper specific functions in the firmware
print("This is slow as molasses, but gets the job done")
byte_num = 0 --current byte within the bank
while byte_num < bank_size do
--read next byte from the file and convert to binary
byte_str = file:read(buff_size)
data = string.unpack("B", byte_str, 1)
--write the data
--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
--wr_prg_flash_byte(base_addr+byte_num, data, cur_bank, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
--MMC3 function works on FME7 just fine
dict.nes("MMC4_PRG_SOP_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
--NEXT STEP: firmware write page/bank function can use function pointer for the function above
-- this may cause issues with more complex algos
-- sometimes cur bank is needed
-- for this to work, need to have function post conditions meet the preconditions
-- that way host intervention is only needed for bank controls
-- Is there a way to allow for double buffering though..?
-- YES! just think of the bank as a complete memory
-- this greatly simplifies things and is exactly where we want to go
-- This is completed below outside the byte while loop @ 39KBps
if (verify) then
readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
if readdata ~= data then
print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
end
end
byte_num = byte_num + 1
end
--]]
--Have the device write a banks worth of data
--FAST! but needs firmware specific functions and flash control
flash.write_file( file, bank_size/1024, "MMC4", "PRGROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming PRG-ROM flash")
end
--slow host flash one byte at a time...
--this is controlled from the host side byte by byte making it slow
--but doesn't require specific firmware mapper flashing functions
local function flash_chrrom(file, rom_size_KB, debug)
init_mapper()
--test some bytes
--wr_chr_flash_byte(0x0000, 0xA5, 0, true)
--wr_chr_flash_byte(0x0FFF, 0x5A, 0, true)
print("\nProgramming CHR-ROM flash")
local base_addr = 0x0000
local bank_size = 4*1024 --MMC4 4KByte CHR bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
while cur_bank < total_banks do
if (cur_bank %8 == 0) then
print("writting CHR bank: ", cur_bank, " of ", total_banks-1)
end
--set cur_bank so firmware can select desired bank during the write
dict.nes("SET_CUR_BANK", cur_bank)
if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
--program the entire bank's worth of data
--[[ This version of the code programs a single byte at a time but doesn't require
-- mapper specific functions in the firmware
print("This is slow as molasses, but gets the job done")
byte_num = 0 --current byte within the bank
while byte_num < bank_size do
--read next byte from the file and convert to binary
byte_str = file:read(buff_size)
data = string.unpack("B", byte_str, 1)
--write the data
--SLOWEST OPTION: no firmware mapper specific functions 100% host flash algo:
wr_chr_flash_byte(base_addr+byte_num, data, cur_bank, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create mapper write byte function:
--dict.nes("MMC4_CHR_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
--FASTEST have the firmware handle flashing a bank's worth of data
--control the init and banking from the host side
if (verify) then
readdata = dict.nes("NES_PPU_RD", base_addr+byte_num)
if readdata ~= data then
print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
end
end
byte_num = byte_num + 1
end
--]]
--Have the device write a "banks" worth of data, actually 2x banks of 2KB each
--FAST! 13sec for 512KB = 39KBps
flash.write_file( file, bank_size/1024, "MMC4", "CHRROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming CHR-ROM flash")
end
--Cart should be in reset state upon calling this function
local function process(process_opts, console_opts)
local test = process_opts["test"]
local read = process_opts["read"]
local erase = process_opts["erase"]
local program = process_opts["program"]
local verify = process_opts["verify"]
local dumpfile = process_opts["dump_filename"]
local flashfile = process_opts["flash_filename"]
local verifyfile = process_opts["verify_filename"]
-- MMC4 has RAM capability present in some carts.
local dumpram = process_opts["dumpram"]
local ramdumpfile = process_opts["dumpram_filename"]
local writeram = process_opts["writeram"]
local ramwritefile = process_opts["writeram_filename"]
local rv = nil
local file
local prg_size = console_opts["prg_rom_size_kb"]
local chr_size = console_opts["chr_rom_size_kb"]
local wram_size = console_opts["wram_size_kb"]
local filetype = "nes"
--local filetype = "bin"
--initialize device i/o for NES
dict.io("IO_RESET")
dict.io("NES_INIT")
--test cart by reading manf/prod ID
if test then
print("Testing ", mapname)
init_mapper()
--verify mirroring is behaving as expected
mirror_test(true)
nes.ppu_ram_sense(0x1000, true)
print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))
--attempt to read PRG-ROM flash ID
prgrom_manf_id(true)
--attempt to read CHR-ROM flash ID
chrrom_manf_id(true)
--debug CHR-ROM banking with special CHR-ROM image where first
--byte in bank is set to bank number
--chr_bank_test()
end
--dump the ram to file
if dumpram then
print("\nDumping WRAM...")
init_mapper()
--SRAM always enabled
file = assert(io.open(ramdumpfile, "wb"))
--dump cart into file
dump_wram(file, wram_size, false)
--close file
assert(file:close())
print("DONE Dumping WRAM")
end
--dump the cart to dumpfile
if read then
print("\nDumping PRG & CHR ROMs...")
init_mapper()
file = assert(io.open(dumpfile, "wb"))
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
--dump cart into file
dump_prgrom(file, prg_size, false)
dump_chrrom(file, chr_size, false)
--close file
assert(file:close())
print("DONE Dumping PRG & CHR ROMs")
end
--erase the cart
if erase then
print("\nerasing ", mapname)
init_mapper()
--PLCC
print("erasing PRG-ROM PLCC-32");
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x80)
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x10)
--SOP
--print("erasing PRG-ROM SOP-44 flash takes a couple sec...");
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x80)
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x10)
rv = dict.nes("NES_CPU_RD", 0x8000)
local i = 0
--TODO create some function to pass the read value
--that's smart enough to figure out if the board is actually erasing or not
while ( rv ~= 0xFF ) do
rv = dict.nes("NES_CPU_RD", 0x8000)
i = i + 1
end
print(i, "naks, done erasing prg.");
--TODO erase CHR-ROM only if present
init_mapper()
print("erasing CHR-ROM");
dict.nes("NES_PPU_WR", 0x1555, 0xAA)
dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
dict.nes("NES_PPU_WR", 0x1555, 0x80)
dict.nes("NES_PPU_WR", 0x1555, 0xAA)
dict.nes("NES_PPU_WR", 0x0AAA, 0x55)
dict.nes("NES_PPU_WR", 0x1555, 0x10)
rv = dict.nes("NES_PPU_RD", 0x0000)
local i = 0
--TODO create some function to pass the read value
--that's smart enough to figure out if the board is actually erasing or not
while ( rv ~= 0xFF ) do
rv = dict.nes("NES_PPU_RD", 0x8000)
i = i + 1
end
print(i, "naks, done erasing chr.");
end
--write to wram on the cart
if writeram then
print("\nWritting to WRAM...")
init_mapper()
--SRAM always enabled
file = assert(io.open(ramwritefile, "rb"))
flash.write_file( file, wram_size, "NOVAR", "PRGRAM", false )
--close file
assert(file:close())
print("DONE Writting WRAM")
end
--program flashfile to the cart
if program then
--open file
file = assert(io.open(flashfile, "rb"))
--determine if auto-doubling, deinterleaving, etc,
--needs done to make board compatible with rom
if filetype == "nes" then
--advance past the 16byte header
--TODO set mirroring bit via ciccom
local buffsize = 1
local byte
local count = 1
for byte in file:lines(buffsize) do
local data = string.unpack("B", byte, 1)
--print(string.format("%X", data))
count = count + 1
if count == 17 then break end
end
end
flash_prgrom(file, prg_size, false)
flash_chrrom(file, chr_size, false)
--close file
assert(file:close())
end
--verify flashfile is on the cart
if verify then
--for now let's just dump the file and verify manually
print("\nPost dumping PRG & CHR ROMs...")
init_mapper()
file = assert(io.open(verifyfile, "wb"))
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
print("DONE post dumping PRG & CHR ROMs")
--dump cart into file
time.start()
dump_prgrom(file, prg_size, false)
dump_chrrom(file, chr_size, false)
time.report(prg_size+chr_size)
--close file
assert(file:close())
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")
end
-- global variables so other modules can use them
-- call functions desired to run when script is called/imported
-- functions other modules are able to call
mmc2.process = process
-- return the module's table
return mmc2

22
host/scripts/nes/mmc3.lua
View File

@ -8,6 +8,8 @@ local nes = require "scripts.app.nes"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local buffers = require "scripts.app.buffers"
local time = require "scripts.app.time"
local files = require "scripts.app.files"
-- file constants
local mapname = "MMC3"
@ -192,6 +194,7 @@ local function dump_prgrom( file, rom_size_KB, debug )
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x08 -- $8000
--TODO update to NES_CPU_PAGE instead of NES_CPU_4KB
while ( read_count < num_reads ) do
@ -422,7 +425,7 @@ local function flash_prgrom(file, rom_size_KB, debug)
--Have the device write a banks worth of data
--FAST! 13sec for 512KB = 39KBps
flash.write_file( file, 8, mapname, "PRGROM", false )
flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
cur_bank = cur_bank + 1
end
@ -533,8 +536,8 @@ local function process(process_opts, console_opts)
local wram_size = console_opts["wram_size_kb"]
--local filetype = "nes"
local filetype = "bin"
local filetype = "nes"
--local filetype = "bin"
--initialize device i/o for NES
dict.io("IO_RESET")
@ -720,14 +723,25 @@ local function process(process_opts, console_opts)
file = assert(io.open(verifyfile, "wb"))
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
print("DONE post dumping PRG & CHR ROMs")
--dump cart into file
time.start()
dump_prgrom(file, prg_size, false)
dump_chrrom(file, chr_size, false)
time.report(prg_size+chr_size)
--close file
assert(file:close())
print("DONE post dumping PRG & CHR ROMs")
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")

89
host/scripts/nes/mmc4.lua
View File

@ -8,6 +8,8 @@ local nes = require "scripts.app.nes"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local buffers = require "scripts.app.buffers"
local time = require "scripts.app.time"
local files = require "scripts.app.files"
-- file constants
local mapname = "MMC4"
@ -43,8 +45,19 @@ local function init_mapper( debug )
--can use upper 16KB $D555 for $5555 commands
--need lower bank for $AAAA commands and writes
--this only allows for writting to even banks when A14=0
dict.nes("NES_CPU_WR", 0xA000, 0x00) --16KB @ CPU $8000
--mapper control A14-18
--even bank A14 = 0
--odd bank A14 = 1
--$8000-BFFF bank selected
--$C000-FFFF fixed to last 16KB (A14 always high)
--$C000-DFFF A14 is low
--$E000-FFFF A14 is high
--ROM A14 = MAP assign A14 XOR with CPU A13
--With this mapper modification $5555 -> $D555, $2AAA -> $EAAA
end
@ -81,18 +94,20 @@ local function prgrom_manf_id( debug )
if debug then print("reading PRG-ROM manf ID") end
--SOP
dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
dict.nes("NES_CPU_WR", 0xF555, 0x55)
dict.nes("NES_CPU_WR", 0xFAAA, 0x90)
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x90)
--PLCC
--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
--dict.nes("NES_CPU_WR", 0xD555, 0x90)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x90)
rv = dict.nes("NES_CPU_RD", 0x8000) --0xC2 = MXIC
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
rv = dict.nes("NES_CPU_RD", 0x8002) --SOP 0x23/0xAB 512KB top/bottom
--rv = dict.nes("NES_CPU_RD", 0x8002) --SOP 0x23/0xAB 512KB top/bottom
--SOP 0x51/0x57 256KB top/bottom
--SOP 0xD6/0x58 1MB top/bottom
rv = dict.nes("NES_CPU_RD", 0x8001) --PLCC 0xB5/B6/B7 128-512KB SST
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
--exit software
@ -369,7 +384,7 @@ local function flash_prgrom(file, rom_size_KB, debug)
--Have the device write a banks worth of data
--FAST! but needs firmware specific functions and flash control
flash.write_file( file, bank_size/1024, "MMC4", "PRGROM", false )
flash.write_file( file, bank_size/1024, mapname, "PRGROM", false )
cur_bank = cur_bank + 1
end
@ -475,6 +490,9 @@ local function process(process_opts, console_opts)
local chr_size = console_opts["chr_rom_size_kb"]
local wram_size = console_opts["wram_size_kb"]
local filetype = "nes"
--local filetype = "bin"
--initialize device i/o for NES
dict.io("IO_RESET")
dict.io("NES_INIT")
@ -550,22 +568,23 @@ local function process(process_opts, console_opts)
init_mapper()
--PLCC
--print("erasing PRG-ROM");
--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
--dict.nes("NES_CPU_WR", 0xD555, 0x80)
--dict.nes("NES_CPU_WR", 0xD555, 0xAA)
--dict.nes("NES_CPU_WR", 0xAAAA, 0x55)
--dict.nes("NES_CPU_WR", 0xD555, 0x10)
print("erasing PRG-ROM PLCC-32");
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x80)
dict.nes("NES_CPU_WR", 0xD555, 0xAA)
dict.nes("NES_CPU_WR", 0xEAAA, 0x55)
dict.nes("NES_CPU_WR", 0xD555, 0x10)
--SOP
print("erasing PRG-ROM SOP-44 flash takes a couple sec...");
dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
dict.nes("NES_CPU_WR", 0xF555, 0x55)
dict.nes("NES_CPU_WR", 0xFAAA, 0x80)
dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
dict.nes("NES_CPU_WR", 0xF555, 0x55)
dict.nes("NES_CPU_WR", 0xFAAA, 0x10)
--print("erasing PRG-ROM SOP-44 flash takes a couple sec...");
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x80)
--dict.nes("NES_CPU_WR", 0xFAAA, 0xAA)
--dict.nes("NES_CPU_WR", 0xF555, 0x55)
--dict.nes("NES_CPU_WR", 0xFAAA, 0x10)
rv = dict.nes("NES_CPU_RD", 0x8000)
local i = 0
@ -630,6 +649,21 @@ local function process(process_opts, console_opts)
file = assert(io.open(flashfile, "rb"))
--determine if auto-doubling, deinterleaving, etc,
--needs done to make board compatible with rom
if filetype == "nes" then
--advance past the 16byte header
--TODO set mirroring bit via ciccom
local buffsize = 1
local byte
local count = 1
for byte in file:lines(buffsize) do
local data = string.unpack("B", byte, 1)
--print(string.format("%X", data))
count = count + 1
if count == 17 then break end
end
end
flash_prgrom(file, prg_size, false)
flash_chrrom(file, chr_size, false)
@ -648,14 +682,25 @@ local function process(process_opts, console_opts)
file = assert(io.open(verifyfile, "wb"))
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
print("DONE post dumping PRG & CHR ROMs")
--dump cart into file
time.start()
dump_prgrom(file, prg_size, false)
dump_chrrom(file, chr_size, false)
time.report(prg_size+chr_size)
--close file
assert(file:close())
print("DONE post dumping PRG & CHR ROMs")
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
end
dict.io("IO_RESET")

31
host/scripts/nes/nrom.lua
View File

@ -133,6 +133,18 @@ local function dump_chrrom( file, rom_size_KB, debug )
read_count = read_count + 1
end
--Zorchenhimer had issues dumping "Popeye no Eigo Asobi" http://bootgod.dyndns.org:7777/profile.php?id=3867
--which appears to have 2 transistors with connections to PPU A12 and CHR-ROM /OE.?
--not sure what's going on there, but slowly dumping one byte at at time instead of 128Byte read bursts
--with normal dumping method above corrected the issue.
--[[
for i = 0x0000,0x1FFF,1 do
val = dict.nes("NES_PPU_RD", i)
file:write(string.char(val))
end
file:flush()
--]]
end
@ -300,6 +312,9 @@ local function process(process_opts, console_opts)
local wram_size = console_opts["wram_size_kb"]
local mirror = console_opts["mirror"]
local filetype = "nes"
--local filetype = "bin"
--initialize device i/o for NES
dict.io("IO_RESET")
dict.io("NES_INIT")
@ -433,6 +448,22 @@ local function process(process_opts, console_opts)
file = assert(io.open(flashfile, "rb"))
--determine if auto-doubling, deinterleaving, etc,
--needs done to make board compatible with rom
if filetype == "nes" then
--advance past the 16byte header
--TODO set mirroring bit via ciccom
local buffsize = 1
local byte
local count = 1
for byte in file:lines(buffsize) do
local data = string.unpack("B", byte, 1)
--print(string.format("%X", data))
count = count + 1
if count == 17 then break end
end
end
--flash cart
--flash.write_file( file, 32, "NROM", "PRGROM", true )
--flash.write_file( file, 8, "NROM", "CHRROM", true )

459
host/scripts/nes/unrom_tsop.lua Normal file
View File

@ -0,0 +1,459 @@
-- create the module's table
local unrom = {}
-- import required modules
local dict = require "scripts.app.dict"
local nes = require "scripts.app.nes"
local dump = require "scripts.app.dump"
local flash = require "scripts.app.flash"
local files = require "scripts.app.files"
local swim = require "scripts.app.swim"
local buffers = require "scripts.app.buffers"
-- file constants & variables
local mapname = "UxROM"
--local banktable_base = nil
local banktable_base = 0xCC84
--Nomolos' bank table is at $CC84
--wr_bank_table(0xCC84, 32)
--Owlia bank table
--wr_bank_table(0xE473, 32)
--rushnattack
--wr_bank_table(0x8000, 8)
--twindragons
--wr_bank_table(0xC000, 32)
--Armed for Battle
--wr_bank_table(0xFD69, 8)
--local rom_FF_addr = 0x8000
-- local functions
local function create_header( file, prgKB, chrKB )
local mirroring = nes.detect_mapper_mirroring()
--write_header( file, prgKB, chrKB, mapper, mirroring )
nes.write_header( file, prgKB, 0, op_buffer[mapname], mirroring)
end
local function init_mapper( debug )
--need to select bank0 so PRG-ROM A14 is low when writting to lower bank
--TODO this needs to be written to rom where value is 0x00 due to bus conflicts
--so need to find the bank table first!
--this could present an even larger problem with a blank flash chip
--would have to get a byte written to 0x00 first before able to change the bank..
--becomes catch 22 situation. Will have to rely on mcu over powering PRG-ROM..
--ahh but a way out would be to disable the PRG-ROM with exp0 (/WE) going low
--for now the write below seems to be working fine though..
dict.nes("NES_CPU_WR", 0x8000, 0x00)
end
--read PRG-ROM flash ID
local function prgrom_manf_id( debug )
init_mapper()
if debug then print("reading PRG-ROM manf ID") end
--enter software mode
--ROMSEL controls PRG-ROM /OE which needs to be low for flash writes
--So unlock commands need to be addressed below $8000
--DISCRETE_EXP0_PRGROM_WR doesn't toggle /ROMSEL by definition though, so A15 is unused
-- 15 14 13 12
-- 0x5 = 0b 0 1 0 1 -> $5555
-- 0x2 = 0b 0 0 1 0 -> $2AAA
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x90)
--read manf ID
local rv = dict.nes("NES_CPU_RD", 0x8000)
if debug then print("attempted read PRG-ROM manf ID:", string.format("%X", rv)) end
--read prod ID
rv = dict.nes("NES_CPU_RD", 0x8002)
if debug then print("attempted read PRG-ROM prod ID:", string.format("%X", rv)) end
--exit software
dict.nes("FLASH_3V_WR", 0x8000, 0xF0)
end
--find a viable banktable location
local function find_banktable( banktable_size )
local search_base = 0x0C -- search in $C000-$F000, the fixed bank
local KB_search_space = 16
--get the fixed bank's content
local search_data = ""
dump.dumptocallback(
function (data)
search_data = search_data .. data
end,
KB_search_space, search_base, "NESCPU_4KB", false
)
--construct the byte sequence that we need
local searched_sequence = ""
while ( searched_sequence:len() < banktable_size ) do
searched_sequence = searched_sequence .. string.char(searched_sequence:len())
end
--search for the banktable in the fixed bank
position_in_fixed_bank = string.find( search_data, searched_sequence, 1, true )
if ( position_in_fixed_bank == nil ) then
return nil
end
--compute the cpu offset of this data
return 0xC000 + position_in_fixed_bank - 1
end
--dump the PRG ROM
local function dump_prgrom( file, rom_size_KB, debug )
local KB_per_read = 16
local num_reads = rom_size_KB / KB_per_read
local read_count = 0
local addr_base = 0x08 -- $8000
while ( read_count < num_reads ) do
if debug then print( "dump PRG part ", read_count, " of ", num_reads) end
--select desired bank(s) to dump
dict.nes("NES_CPU_WR", banktable_base+read_count, read_count) --16KB @ CPU $8000
dump.dumptofile( file, KB_per_read, addr_base, "NESCPU_4KB", false )
read_count = read_count + 1
end
end
local function wr_prg_flash_byte(addr, value, bank, debug)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xA0) --without unlock bypass
dict.nes("FLASH_3V_WR", addr, value)
local rv = dict.nes("NES_CPU_RD", addr)
local i = 0
while ( rv ~= value ) do
rv = dict.nes("NES_CPU_RD", addr)
i = i + 1
end
if debug then print(i, "naks, done writing byte.") end
--TODO report error if write failed
end
--base is the actual NES CPU address, not the rom offset (ie $FFF0, not $7FF0)
local function wr_bank_table(base, entries, numtables)
local cur_bank
--need to have A14 clear when lower bank enabled
init_mapper()
--UxROM can have a single bank table in $C000-FFFF (assuming this is most likely)
--or a bank table in all other banks in $8000-BFFF
local i = 0
while( i < entries) do
wr_prg_flash_byte(base+i, i, 0)
i = i+1;
end
--[[
if( base >= 0xC000 ) then
--only need one bank table in last bank
cur_bank = entries - 1 --16 minus 1 is 15 = 0x0F
else
--need bank table in all banks except last
cur_bank = entries - 2 --16 minus 2 is 14 = 0x0E
end
while( cur_bank >= 0 ) do
--select bank to write to (last bank first)
--use the bank table to make the switch
dict.nes("NES_CPU_WR", base+cur_bank, cur_bank)
--write bank table to selected bank
local i = 0
while( i < entries) do
print("write entry", i, "bank:", cur_bank)
wr_prg_flash_byte(base+i, i)
i = i+1;
end
cur_bank = cur_bank-1
if( base >= 0xC000 ) then
--only need one bank table in last bank
break
end
end
--]]
--TODO verify the bank table was successfully written before continuing!
end
--this is controlled from the host side one bank at a time
--but requires mapper specific firmware flashing functions
local function flash_prgrom(file, rom_size_KB, debug)
--init_mapper()
--bank table should already be written
--test some bytes
--wr_prg_flash_byte(0x0000, 0xA5, true)
--wr_prg_flash_byte(0xFFFF, 0x5A, true)
print("\nProgramming PRG-ROM flash")
local base_addr = 0x8000 --writes occur $8000-9FFF
local bank_size = 16*1024 --UNROM 16KByte per PRG bank
local buff_size = 1 --number of bytes to write at a time
local cur_bank = 0
local total_banks = rom_size_KB*1024/bank_size
local byte_num --byte number gets reset for each bank
local byte_str, data, readdata
--set the bank table address
--dict.nes("SET_BANK_TABLE", banktable_base)
if debug then print("get banktable:", string.format("%X", dict.nes("GET_BANK_TABLE"))) end
while cur_bank < total_banks do
if (cur_bank %4 == 0) then
print("writting PRG bank: ", cur_bank, " of ", total_banks-1)
end
--select bank to flash
--dict.nes("SET_CUR_BANK", cur_bank)
--if debug then print("get bank:", dict.nes("GET_CUR_BANK")) end
dict.nes("NES_CPU_WR", 0x8000, cur_bank)
--program the entire bank's worth of data
--[[ This version of the code programs a single byte at a time but doesn't require
-- MMC3 specific functions in the firmware
print("This is slow as molasses, but gets the job done")
byte_num = 0 --current byte within the bank
while byte_num < bank_size do
--read next byte from the file and convert to binary
byte_str = file:read(buff_size)
data = string.unpack("B", byte_str, 1)
--write the data
--SLOWEST OPTION: no firmware MMC3 specific functions 100% host flash algo:
wr_prg_flash_byte(base_addr+byte_num, data, cur_bank, false) --0.7KBps
--EASIEST FIRMWARE SPEEDUP: 5x faster, create MMC3 write byte function:
--can use same write function as NROM
--dict.nes("UNROM_PRG_FLASH_WR", base_addr+byte_num, data) --3.8KBps (5.5x faster than above)
if (verify) then
readdata = dict.nes("NES_CPU_RD", base_addr+byte_num)
if readdata ~= data then
print("ERROR flashing byte number", byte_num, " in bank",cur_bank, " to flash ", data, readdata)
end
end
byte_num = byte_num + 1
end
--]]
--Have the device write a banks worth of data
--Same as NROM
flash.write_file( file, bank_size/1024, "A53", "PRGROM", false )
cur_bank = cur_bank + 1
end
print("Done Programming PRG-ROM flash")
end
--Cart should be in reset state upon calling this function
--this function processes all user requests for this specific board/mapper
local function process(process_opts, console_opts)
local test = process_opts["test"]
local read = process_opts["read"]
local erase = process_opts["erase"]
local program = process_opts["program"]
local verify = process_opts["verify"]
local dumpfile = process_opts["dump_filename"]
local flashfile = process_opts["flash_filename"]
local verifyfile = process_opts["verify_filename"]
local rv = nil
local file
local prg_size = console_opts["prg_rom_size_kb"]
local chr_size = console_opts["chr_rom_size_kb"]
local wram_size = console_opts["wram_size_kb"]
--initialize device i/o for NES
dict.io("IO_RESET")
dict.io("NES_INIT")
--test cart by reading manf/prod ID
if test then
print("Testing ", mapname)
nes.detect_mapper_mirroring(true)
nes.ppu_ram_sense(0x1000, true)
print("EXP0 pull-up test:", dict.io("EXP0_PULLUP_TEST"))
prgrom_manf_id(true)
--[[
--test reading back CIC version
dict.io("SWIM_INIT", "SWIM_ON_A0")
--dict.io("SWIM_INIT", "SWIM_ON_EXP0")
if swim.start() then
swim.read_stack()
else
print("ERROR trying to read back CIC signature stack data")
end
swim.stop_and_reset()
--]]
dict.io("IO_RESET")
dict.io("NES_INIT")
end
--dump the cart to dumpfile
if read then
print("\nDumping PRG-ROM...")
file = assert(io.open(dumpfile, "wb"))
--find bank table to avoid bus conflicts
if ( banktable_base == nil ) then
local KB_per_bank = 16
banktable_base = find_banktable( prg_size / KB_per_bank )
if ( banktable_base == nil ) then
print( "BANKTABLE NOT FOUND" )
return
else
print( "found banktable addr = " .. banktable_base )
end
end
--create header: pass open & empty file & rom sizes
create_header(file, prg_size, chr_size)
--dump cart into file
--dump.dumptofile( file, prg_size, "UxROM", "PRGROM", true )
dump_prgrom(file, prg_size, false)
--close file
assert(file:close())
print("DONE Dumping PRG-ROM")
end
--erase the cart
if erase then
print("\nErasing", mapname);
init_mapper()
print("erasing PRG-ROM");
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x80)
dict.nes("FLASH_3V_WR", 0x8AAA, 0xAA)
dict.nes("FLASH_3V_WR", 0x8555, 0x55)
dict.nes("FLASH_3V_WR", 0x8AAA, 0x10)
rv = dict.nes("NES_CPU_RD", 0x8000)
local i = 0
--TODO create some function to pass the read value
--that's smart enough to figure out if the board is actually erasing or not
while ( rv ~= 0xFF ) do
rv = dict.nes("NES_CPU_RD", 0x8000)
i = i + 1
end
print(i, "naks, done erasing prg.");
end
--program flashfile to the cart
if program then
--open file
file = assert(io.open(flashfile, "rb"))
--determine if auto-doubling, deinterleaving, etc,
--needs done to make board compatible with rom
--find bank table in the rom
--write bank table to all banks of cartridge
--wr_bank_table(banktable_base, prg_size/16) --16KB per bank gives number of entries
--flash cart
flash_prgrom(file, prg_size, false)
--close file
assert(file:close())
end
--verify flashfile is on the cart
if verify then
--for now let's just dump the file and verify manually
print("\nPost dumping PRG-ROM")
file = assert(io.open(verifyfile, "wb"))
--dump cart into file
dump_prgrom(file, prg_size, false)
--close file
assert(file:close())
--compare the flash file vs post dump file
if (files.compare( verifyfile, flashfile, true ) ) then
print("\nSUCCESS! Flash verified")
else
print("\n\n\n FAILURE! Flash verification did not match")
end
print("DONE post dumping PRG-ROM")
end
dict.io("IO_RESET")
end
-- global variables so other modules can use them
-- call functions desired to run when script is called/imported
-- functions other modules are able to call
unrom.process = process
-- return the module's table
return unrom

6
shared/shared_dict_bootload.h
View File

@ -75,13 +75,15 @@
//application code version
//this is updated more frequently than the USB firmware version
//#define GET_APP_VER 12 //RL=3 0-error, 1-len, 2-version
//just set pointer to 0x08000800 and read 4 bytes for now
#define GET_APP_VER 12 //RL=3 0-error, 1-len, 2-version (2345-version if string "AV##")
//STM32 just set pointer to 0x08000800 and read 4 bytes for now
//AVR has to use this method..
//APPLICATION VERSION NUMBERS
//#define APP_VERSION "AV00" //released with usb firmware v2.3
//main update was addition of usb firmware updater
//also added the bootloader pointer memory access
//include ram functions & starting to have NES flash algos return data
#define APP_VERSION 3 //released 8/16 with N64 dump fix and MMC2/4 support
#endif

5
shared/shared_dict_buffer.h
View File

@ -127,6 +127,10 @@
#define GENESIS_ROM_PAGE1 0x29 //bank address A17-23 must have been latched already
#define N64_ROM_PAGE 0x30
#define NESPPU_1KB_TOGGLE 0x31 //similar to PPU page read but /RD signal toggles with each read
#define NESCPU_4KB_TOGGLE 0x32 //similar to CPU page read but M2 toggles with each read
//operand LSB
//SST 39SF0x0 manf/prod IDs
#define SST_MANF_ID 0xBF
@ -174,6 +178,7 @@
#define HDIVER 78
#define GTROM 111
#define DxROM 205
#define MM2 253
#define DPROM 254 //just a random mapper number for whatever I need it for
// UNKNOWN 255 don't assign to something meaningful

7
shared/shared_dict_nes.h
View File

@ -60,12 +60,13 @@
#define MMC4_CHR_FLASH_WR 0x11 //needs cur_bank set prior to calling
#define MAP30_PRG_FLASH_WR 0x12 //needs cur_bank set prior to calling
#define GTROM_PRG_FLASH_WR 0x13 //desired bank must be selected
#define MMC4_PRG_FLASH_WR 0x14 //mapper mod to XOR A14 with A13
#define SET_CUR_BANK 0x20
#define SET_BANK_TABLE 0x21
#define NES_M2_LOW_WR 0x22 //like CPU WR, but M2 stays low
#define M2_LOW_WR 0x22 //like CPU WR, but M2 stays low
//write a page worth of random data to ppu
//make sure the LSFR is initialized first in misc dict
@ -74,6 +75,10 @@
#define PPU_PAGE_WR_LFSR 0x23
#define SET_NUM_PRG_BANKS 0x24 //used for determining banktable structure for mapper 11 and such
#define M2_HIGH_WR 0x25 //like CPU WR, but M2 stays high
#define FLASH_3V_WR 0x25 //same as above but easier to remember when
//being used to write to 3v tssop flash
#define MMC3S_PRG_FLASH_WR 0x26 //TODO set return lengths for all these functions
//=============================================================================================
// OPCODES WITH OPERAND AND RETURN VALUE plus SUCCESS/ERROR_CODE