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Creation of pinport abstraction layer to make firmware more generic to the 

underlying hardware/mcu.  Created avr_gpio.h to define AVR pin registers
in a struct fashion similar to what's common with ARM code.  Doing that
makes things much easier to abstract in pin macro 'functions'.

Added define to Makefiles that flags pinport_al.h which board is targetted
for build.

Tested and able to turn on/off and pull-up LED on all 3 builds.
This commit is contained in:
Paul Molloy 2017-07-22 23:58:16 -05:00
parent 750ab2f082
commit ea5f1d9842
17 changed files with 571 additions and 201 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
firmware/Make_avr
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@ -14,7 +14,7 @@ BUILD = build_avr
#SOURCES=$(wildcard source/**/*.c source/*.c)
SOURCES=$(wildcard source/*.c)
CFLAGS = -Iusbdrv_Vusb -Isource -DDEBUG_LEVEL=0 -DAVR_CORE
CFLAGS = -Iusbdrv_Vusb -Isource -DDEBUG_LEVEL=0 -DAVR_CORE -DAVR_KAZZO
USBOBJ = usbdrv_Vusb/usbdrv.o usbdrv_Vusb/usbdrvasm.o usbdrv_Vusb/oddebug.o
OBJECTS=$(patsubst %.c,%.o,$(SOURCES)) $(USBOBJ)

8
firmware/Make_stm
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@ -49,11 +49,11 @@ LDSCRIPTS=-L. -L$(BASE)/include_stm -T nokeep.ld
LFLAGS=$(USE_NANO) $(USE_NOHOST) $(LDSCRIPTS) $(GC) $(MAP)
DEFINE+=\
-DSTM32F070xB \
-DSTM32F070x6 \
-DF_CPU=16000000 \
-DSTM_CORE
#128KB version of all packages (LQFP-48,64,100)
-DSTM_CORE \
-DSTM_ADAPTER #stm32 to kazzo adapter board
# -DSTM_INL6 #inlretro 6connector
# -DSTM32F072x8 \ #64KB version of all packages (LQFP-48,64,100)
# -DSTM32F070xB \ #128KB version of both packages (LQFP-48,64)
# -DSTM32F070x6 \ #32KB version of both packages (TSSOP-20,LQFP-48)

BIN
firmware/avr_kazzo.elf
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96
firmware/avr_kazzo.hex
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@ -1,96 +0,0 @@
:100000000C9476000C94B8010C9493000C9493001B
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:0205D800FF5AC8
:00000001FF

BIN
firmware/build_avr/avr_kazzo.elf
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12
firmware/build_avr/avr_kazzo.hex
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@ -13,10 +13,10 @@
:1000C00049006E00660069006E00690074006500FA
:1000D0004E00650073004C006900760065007300F7
:1000E0002E0063006F006D000403090411241FBE7D
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@ -89,8 +89,8 @@
:1005800000611AB11B7E402F4B7E54E05A95F1F763
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:1005C000A8950E949900FCCFA895EFE9FFE031972C
:0C05D000F1F700C00000EECFF894FFCF60
:0205DC00FF5AC4
:00000001FF

BIN
firmware/build_stm/inlretro_stm.bin
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BIN
firmware/build_stm/inlretro_stm.elf
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60
firmware/build_stm/inlretro_stm.hex
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@ -13,7 +13,7 @@
:1000B000FD000008FD000008FD000008BD0100086B
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@ -50,38 +50,40 @@
:10030000DED080210B431C490B8000231370D7E7FC
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128
firmware/build_stm/inlretro_stm.map
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@ -45,12 +45,12 @@ Discarded input sections
.ARM.exidx 0x00000000 0x8 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.ARM.attributes
0x00000000 0x1b c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
.data 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.bss 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.data 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.bss 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.text 0x00000000 0x0 source/main.o (symbol from plugin)
.text 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.text 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.data 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.bss 0x00000000 0x0 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.text 0x00000000 0x0 source/usb.o (symbol from plugin)
.text 0x00000000 0x0 source_stm_only/stm_init.o (symbol from plugin)
.text 0x00000000 0x0 source_stm_only/usbstm.o (symbol from plugin)
@ -156,9 +156,9 @@ Linker script and memory map
LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtbegin.o
LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/../../../../arm-none-eabi/lib/thumb/v6-m/crt0.o
LOAD C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
LOAD C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
LOAD source/main.o
LOAD C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
LOAD C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
LOAD source/usb.o
LOAD source_stm_only/stm_init.o
LOAD source_stm_only/usbstm.o
@ -175,12 +175,12 @@ END GROUP
LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtend.o
LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtn.o
.text 0x08000000 0x534
.text 0x08000000 0x558
*(.isr_vector)
.isr_vector 0x08000000 0xc0 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.isr_vector 0x08000000 0xc0 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
0x08000000 __isr_vector
*(.text*)
.text 0x080000c0 0x40 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.text 0x080000c0 0x40 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
0x080000c0 Reset_Handler
0x080000fc TSC_IRQHandler
0x080000fc ADC1_COMP_IRQHandler
@ -220,23 +220,23 @@ LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm
0x080000fc USART1_IRQHandler
0x080000fc TIM1_BRK_UP_TRG_COM_IRQHandler
.text.control_xfr_in
0x08000100 0xbc C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x08000100 0xbc C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.text.USB_IRQHandler
0x080001bc 0x1cc C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x080001bc 0x1cc C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
0x080001bc USB_IRQHandler
.text.HardFault_Handler
0x08000388 0x2 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x08000388 0x2 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
0x08000388 HardFault_Handler
*fill* 0x0800038a 0x2
.text.startup.main
0x0800038c 0xe8 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x0800038c 0x10c C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
0x0800038c main
*(.init)
.init 0x08000474 0x4 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
0x08000474 _init
.init 0x08000498 0x4 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
0x08000498 _init
*(.fini)
.fini 0x08000478 0x4 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
0x08000478 _fini
.fini 0x0800049c 0x4 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
0x0800049c _fini
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend.o *crtend?.o) .ctors)
@ -249,45 +249,45 @@ LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm
*(.dtors)
*(.rodata*)
.rodata.config_desc
0x0800047c 0x12 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x080004a0 0x12 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.rodata.device_desc
0x0800048e 0x12 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x080004b2 0x12 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.rodata.string0_desc
0x080004a0 0x4 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x080004c4 0x4 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.rodata.string1_desc
0x080004a4 0x54 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x080004c8 0x54 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.rodata.string2_desc
0x080004f8 0x3c C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x0800051c 0x3c C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
*(.eh_frame*)
.glue_7 0x08000534 0x0
.glue_7 0x08000534 0x0 linker stubs
.glue_7 0x08000558 0x0
.glue_7 0x08000558 0x0 linker stubs
.glue_7t 0x08000534 0x0
.glue_7t 0x08000534 0x0 linker stubs
.glue_7t 0x08000558 0x0
.glue_7t 0x08000558 0x0 linker stubs
.vfp11_veneer 0x08000534 0x0
.vfp11_veneer 0x08000534 0x0 linker stubs
.vfp11_veneer 0x08000558 0x0
.vfp11_veneer 0x08000558 0x0 linker stubs
.v4_bx 0x08000534 0x0
.v4_bx 0x08000534 0x0 linker stubs
.v4_bx 0x08000558 0x0
.v4_bx 0x08000558 0x0 linker stubs
.iplt 0x08000534 0x0
.iplt 0x08000534 0x0 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtbegin.o
.iplt 0x08000558 0x0
.iplt 0x08000558 0x0 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtbegin.o
.rel.dyn 0x08000534 0x0
.rel.iplt 0x08000534 0x0 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtbegin.o
.rel.dyn 0x08000558 0x0
.rel.iplt 0x08000558 0x0 c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crtbegin.o
.ARM.extab
*(.ARM.extab* .gnu.linkonce.armextab.*)
0x08000534 __exidx_start = .
0x08000558 __exidx_start = .
.ARM.exidx
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
0x08000534 __exidx_end = .
0x08000534 __etext = ALIGN (0x4)
0x08000558 __exidx_end = .
0x08000558 __etext = ALIGN (0x4)
.data 0x20000000 0x0 load address 0x08000534
.data 0x20000000 0x0 load address 0x08000558
0x20000000 __data_start__ = .
*(vtable)
*(.data*)
@ -316,20 +316,20 @@ LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm
0x20000000 . = ALIGN (0x4)
0x20000000 __bss_start__ = .
*(.bss*)
.bss.log 0x20000000 0x4 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.bss.log 0x20000000 0x4 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.bss.new_address
0x20000004 0x1 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x20000004 0x1 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
*fill* 0x20000005 0x1
.bss.num_bytes_req
0x20000006 0x2 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x20000006 0x2 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.bss.num_bytes_sending
0x20000008 0x2 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x20000008 0x2 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.bss.num_bytes_xfrd
0x2000000a 0x2 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.bss.req_dir 0x2000000c 0x1 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x2000000a 0x2 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.bss.req_dir 0x2000000c 0x1 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
*fill* 0x2000000d 0x3
.bss.usbMsgPtr
0x20000010 0x4 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x20000010 0x4 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
*(COMMON)
0x20000014 . = ALIGN (0x4)
0x20000014 __bss_end__ = .
@ -338,12 +338,12 @@ LOAD c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm
0x20000018 __end__ = .
[!provide] PROVIDE (end, .)
*(.heap*)
.heap 0x20000018 0x0 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.heap 0x20000018 0x0 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
0x20000018 __HeapLimit = .
.stack_dummy 0x20000018 0xc00
*(.stack*)
.stack 0x20000018 0xc00 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.stack 0x20000018 0xc00 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
0x20001800 __StackTop = (ORIGIN (RAM) + LENGTH (RAM))
0x20000c00 __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
0x20001800 PROVIDE (__stack, __StackTop)
@ -355,41 +355,41 @@ OUTPUT(build_stm/inlretro_stm.elf elf32-littlearm)
.ARM.attributes
0x00000000 0x1e c:/program files (x86)/gnu tools arm embedded/6.2 2016q4/bin/../lib/gcc/arm-none-eabi/6.2.1/thumb/v6-m/crti.o
.ARM.attributes
0x0000001e 0x1b C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
0x0000001e 0x1b C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.ARM.attributes
0x00000039 0x2f C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x00000039 0x2f C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.comment 0x00000000 0x6e
.comment 0x00000000 0x6e C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.comment 0x00000000 0x6e C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
0x6f (size before relaxing)
.debug_line 0x00000000 0x31d
.debug_line 0x00000000 0x6f C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.debug_line 0x0000006f 0x2ae C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_line 0x00000000 0x324
.debug_line 0x00000000 0x6f C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.debug_line 0x0000006f 0x2b5 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_info 0x00000000 0x501
.debug_info 0x00000000 0x83 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.debug_info 0x00000083 0x47e C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_info 0x00000000 0x83 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.debug_info 0x00000083 0x47e C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_abbrev 0x00000000 0x277
.debug_abbrev 0x00000000 0x14 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
.debug_abbrev 0x00000014 0x263 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_abbrev 0x00000000 0x14 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.debug_abbrev 0x00000014 0x263 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_aranges 0x00000000 0x58
.debug_aranges
0x00000000 0x20 C:\Users\Paul\AppData\Local\Temp\ccUpdoNL.o
0x00000000 0x20 C:\Users\Paul\AppData\Local\Temp\cc6oNvuz.o
.debug_aranges
0x00000020 0x38 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
0x00000020 0x38 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_loc 0x00000000 0xa4
.debug_loc 0x00000000 0xa4 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_loc 0x00000000 0xa4 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_ranges 0x00000000 0xc0
.debug_ranges 0x00000000 0xc0 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_ranges 0x00000000 0xc0 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
.debug_str 0x00000000 0x360
.debug_str 0x00000000 0x360 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_str 0x00000000 0x360 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o
0x38a (size before relaxing)
.debug_frame 0x00000000 0x70
.debug_frame 0x00000000 0x70 C:\Users\Paul\AppData\Local\Temp\ccBQWscb.ltrans0.ltrans.o
.debug_frame 0x00000000 0x70 C:\Users\Paul\AppData\Local\Temp\ccxBHZ68.ltrans0.ltrans.o

2
firmware/include_stm/stm32f070x6.h
View File

@ -122,7 +122,7 @@ typedef enum
*/
#include "core_cm0.h" /* Cortex-M0 processor and core peripherals */
#include "system_stm32f0xx.h" /* STM32F0xx System Header */
//create our own system functions! #include "system_stm32f0xx.h" /* STM32F0xx System Header */
#include <stdint.h>
/** @addtogroup Peripheral_registers_structures

32
firmware/source/avr_gpio.h Normal file
View File

@ -0,0 +1,32 @@
#define __IO volatile /*!< Defines 'read / write' permissions */
/**
* @brief General Purpose I/O
*/
typedef struct
{
__IO uint8_t PIN; /*!< GPIO port output type register, Address offset: 0x00 */
__IO uint8_t DDR; /*!< GPIO port input data register, Address offset: 0x01 */
__IO uint8_t PORT; /*!< GPIO port output data register, Address offset: 0x02 */
} GPIO_TypeDef;
#define REGISTER_BASE ((uint16_t)0x0000U)
/*!< GPIO peripherals */
#define GPIOA_BASE (REGISTER_BASE + 0x0020)
#define GPIOB_BASE (REGISTER_BASE + 0x0023)
#define GPIOC_BASE (REGISTER_BASE + 0x0026)
#define GPIOD_BASE (REGISTER_BASE + 0x0029)
#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE)
#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE)
#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE)
//#define GPIO_MODER_MODER0_Pos (0U)
//#define GPIO_MODER_MODER0_Msk (0x3U << GPIO_MODER_MODER0_Pos) /*!< 0x00000003 */
//#define GPIO_MODER_MODER0 GPIO_MODER_MODER0_Msk

8
firmware/source/main.c
View File

@ -75,6 +75,14 @@ int main(void)
//Initialize board/system
#endif
//Turn on LED
#ifdef STM_CORE
RCC->AHBENR |= (IOP_LED_EN);
#endif
// PCb_OP_EN(LEDbank, LED);
// PCb_SET_HI(LEDbank, LED);
PCb_IP_PU(LEDbank, LED);
//=================
//MAIN LOOP
//=================

421
firmware/source/pinport_al.h Normal file
View File

@ -0,0 +1,421 @@
#ifndef _pinport_al_h
#define _pinport_al_h
//Define the board type in makefile
//#define AVR_KAZZO
//#define STM_ADAPTER
//#define STM_INL6
#ifdef AVR_CORE
#include "avr_gpio.h"
#elif STM_CORE
#include <stm32f0xx.h>
#endif
//=============================================================================================
//
// PINPORT ABSTRACTION LAYER
//
//=============================================================================================
//
// The pinport abstraction layer creates definitions of generic device GPIO ports.
// These generic ports are designed to make high level firmware generic to the
// actual underlying hardware. The ports created have defined sizes and access rules
// that keeps firmware from growing in complexity based on the specific hardware.
//
// Idea is to define ports which are available on all hardware, but also create ports
// which may not be available to other hardwares. If the firmware is instructed to
// perform an operation on a port that's not present, or not initialized/setup error
// codes will be sent back to the host to designate the lack of port presence.
//
// ---------------------------------------------------------------------------------------
// CONTROL PORT: 16bits for function
// C15-0
// Directionality: All pins are able to be toggled between input/output individually
// Driver: All pins indiv selectable pull-up or float for input. Output always push pull.
// Write/Output: Bit access only, no byte/word accesses
// Read/Input: Bit access only, returned byte/word will be zero if clear, non-zero if set
// ---------------------------------------------------------------------------------------
// STM32 GPIO registers are quite different than AVR style
// they are more flexible/capable, but a little tricky to interface with
// some features present on STM32 pins, but not AVR
// - PULL-DOWN ability (and PULL-UP like AVR)
// - Speed/Slew rate selection
// - Open drain outputs (and push/pull like AVR)
// - Bit set/reset registers to remove necessity of RMW operations
// - Lockability to keep port config bits from changing until reset
// - GPIO blocks must be provided a clock and enabled to "turn on"
// failing to do so will cause hard faults when accessing registers!!
//
// All GPIO registers can be accessed in byte, halfword, or 32bit full words
// unless otherwise noted
//
// GPIOx->MODER[1:0] 32bit registers control direction/type of driver
// 00- Input (default reset state, except SWC-PA15 & SWD-PA13 default AF)
// 01- Gen Purp Output
// 10- Alternate func (SPI, I2C, etc)
// 11- reserved
// MODER[1] typically leave clear unless using AltFunc
// MODER[0] becomes equivalent of AVR DDR
#define MODER_OP 0x01
#define MODER_AF 0x10
//
// GPIOx->OTYPER 16bit registers control driver type
// 0- Push Pull (default reset state)
// 1- Open Drain
// N/A when MODER is set to "00" INPUT
// we can generally just ignore this register and use pushpull as AVR does
//
// GPIOx->OSPEEDR[1:0] 32bit registers control pin driver speed/slew
// x0- Low speed (default reset state, except SWD-PA13 default High Spd)
// 01- Medium speed
// 11- High speed
// N/A when MODER is set to "00" INPUT
// we can generally just ignore this register and use slow speed
//
// GPIOx->PUPDR[1:0] 32bit registers control pull-up/down resistors
// this register is in effect even when alternate functions are enabled
// 00- floating/disabled, no pull-up/down (default for most pins except below)
// 01- Pull-up enabled (default SWD-PA13) also CIRAM A10
// 10- Pull-down enabled (default SWC-PA14)
// 11- Reserved, don't use (prob enables both which would be bad...)
// PUPDR[0] is kinda like AVR PORT when DDR is set to INPUT, and PUPDR[1]=0
// This ends up being a little cleaner than AVR i/o interfacing
// Can probably just enable pull-ups on everything and leave it like that
// -only exception being USB pins (PA11/12) better leave those floating
#define PUPDR_FLT 0x00
#define PUPDR_PU 0x01
#define PUPDR_PD 0x10
//
// GPIOx->IDR 16bit register used to read current input level on pin
// this register is read only
//
// GPIOx->ODR 16bit register used to set output of pin if enabled by MODER
// this register is read/writeable
//
// GPIOx->BSRR 32bit register to only set/clear pins
// BR[31:16] upper halfword is will reset/clear pin if written to '1' value
// BS[15:00] lower halfword is will set pin if written to '1' value
// writing 0 to any bit has no effect
// if setting both BS register has priority (bit will be set)
// this register is write only!
//
// GPIO->BRR 16bit register equivalent to upper word of BSRR register above
// provides convinent separate BR register that doesn't need shifted
//
// GPIOx->LCKR 17bit register MUST BE ACCESSED in 32bit full words!!!
// complex sequence needed to set, but once done lock config/altfunc
// bits for that GPIO. I interpret this to mean the registers above
// plus AF registers, exception of IDR, ODR, BSRR registers
// Good to use this for things than we don't want to accidentally change:
// - USB & XTAL pins come to mind as good candidates
//
// GPIOx->AFRL/H 2 sets of 32bit registers to determine alternate function
// of GPIO if enabled with MODER registers. Default is AF0 at reset
// AVR GPIO are rather simple in comparison to STM32 GPIO:
//
// DDRx 8bit direction register
// Determines 'direction' of pin driver
// set for output, clear of input
// reads give current status of register
//
// PORTx 8bit output/pullup register
// writes set/clear pin if DDR is set/OP
// write '1' to enable pull-up if DDR is clear/IP
// write '0' to disable pull-up if DDR is clear/IP
// reads give current status of register
// bit access must be done by means of RMW/shadow reg
//
// PINx 8bit read register
// read when DDR is clear/IP to get current pin level
// reading when O/P is of little use, as should be value of PORTx
// read only register
//kaz6 is PB1
//#define LED (1U)
//#define IOP_LED_EN RCC_AHBENR_GPIOBEN
//#define GPIO_LED GPIOB
//
////kaz adapter is PC13
//#define LED (13U)
//#define IOP_LED_EN RCC_AHBENR_GPIOCEN
//#define GPIO_LED GPIOC
//
////kaz adapter data0 debug is PB8
//#define DEBUG (8U)
//#define IOP_DEBUG_EN RCC_AHBENR_GPIOBEN
//#define GPIO_DEBUG GPIOB
//
//#define LED_ON() (GPIO_LED->ODR |= (0x1U<<LED))
//#define LED_OFF() (GPIO_LED->ODR &= ~(0x1U<<LED))
//
//#define DEBUG_HI() (GPIO_DEBUG->ODR |= (0x1U<<DEBUG))
//#define DEBUG_LO() (GPIO_DEBUG->ODR &= ~(0x1U<<DEBUG))
#ifdef STM_INL6
#define IOP_LED_EN RCC_AHBENR_GPIOBEN
//C0 "ROMSEL" pinA0
#define C0bank GPIOA
#define C0 (0U)
//C1 "R/W" pinA1
#define C1bank GPIOA
#define C1 (1U)
//C2 "/RD" pinA2
#define C2bank GPIOA
#define C2 (2U)
//C3 "/WR" pinA3
#define C3bank GPIOA
#define C3 (3U)
//C4 "AUDIO_L" pinA4
#define C4bank GPIOA
#define C4 (4U)
//C5 "AUDIO_R" pinA5
#define C5bank GPIOA
#define C5 (5U)
//C6 "CART_RST" pinA6
#define C6bank GPIOA
#define C6 (6U)
//C7 "KEY_DIN" pinA7
#define C7bank GPIOA
#define C7 (7U)
//C8 "CLK_OUT" pinA8
#define C8bank GPIOA
#define C8 (8U)
//C9 "FLIPFLOP" pinB0
#define C9bank GPIOB
#define C9 (0U)
//C10 "LED" pinB1
#define C10bank GPIOB
#define C10 (1U)
//C11 "KEY_DOUT" pinD2
#define C11bank GPIOD
#define C11 (2U)
//C12 "BOOTLOAD" not present
//#define C12bank GPIO
//#define C12 (U)
//C13 "SWDIO" pinA13
#define C13bank GPIOA
#define C13 (13U)
//C14 "SWCLK" pinA14
#define C14bank GPIOA
#define C14 (14U)
//C15 "IRQ" pinA15
#define C15bank GPIOA
#define C15 (15U)
#endif
#ifdef STM_ADAPTER
#define IOP_LED_EN RCC_AHBENR_GPIOCEN
//C0 "ROMSEL" pinA4
#define C0bank GPIOA
#define C0 (4U)
//C1 "R/W" pinA5
#define C1bank GPIOA
#define C1 (5U)
//C2 "/RD" pinA7
#define C2bank GPIOA
#define C2 (7U)
//C3 "/WR" pinB0
#define C3bank GPIOB
#define C3 (0U)
//C4 "AUDIO_L/AHL" pinB1
#define C4bank GPIOB
#define C4 (1U)
//C5 "AUDIO_R/FREE" pinA6
#define C5bank GPIOA
#define C5 (6U)
//C6 "CART_RST/EXP0" pinA0
#define C6bank GPIOA
#define C6 (0U)
////C7 "KEY_DIN" pinA7
//#define C7bank GPIOA
//#define C7 (7U)
//C8 "CLK_OUT/M2" pinA3
#define C8bank GPIOA
#define C8 (3U)
//C9 "FLIPFLOP/AXL" pinA2
#define C9bank GPIOA
#define C9 (2U)
//C10 "LED" pinC13
#define C10bank GPIOC
#define C10 (13U)
//C11 "KEY_DOUT/CIRAMCE" pinA10
#define C11bank GPIOA
#define C11 (10U)
//C12 "BOOTLOAD" not present
//#define C12bank GPIO
//#define C12 (U)
//C13 "SWDIO/CIRAMA10" pinA13
#define C13bank GPIOA
#define C13 (13U)
//C14 "SWCLK" pinA14
#define C14bank GPIOA
#define C14 (14U)
//C15 "IRQ" pinA15
#define C15bank GPIOA
#define C15 (15U)
#endif
#ifdef AVR_KAZZO
//C0 "ROMSEL" pinC1
#define C0bank GPIOC
#define C0 (1U)
//C1 "R/W" pinC2
#define C1bank GPIOC
#define C1 (2U)
//C2 "/RD" pinC4
#define C2bank GPIOC
#define C2 (4U)
//C3 "/WR" pinC5
#define C3bank GPIOC
#define C3 (5U)
//C4 "AUDIO_L/AHL" pinC7
#define C4bank GPIOC
#define C4 (7U)
//C5 "AUDIO_R/FREE" pinC3
#define C5bank GPIOC
#define C5 (3U)
//C6 "CART_RST/EXP0" pinD0
#define C6bank GPIOD
#define C6 (0U)
////C7 "KEY_DIN" pinA7
//#define C7bank GPIOA
//#define C7 (7U)
//C8 "CLK_OUT/M2" pinC0
#define C8bank GPIOC
#define C8 (0U)
//C9 "FLIPFLOP/AXL" pinD7
#define C9bank GPIOD
#define C9 (7U)
//C10 "LED" pinD1
#define C10bank GPIOD
#define C10 (1U)
//C11 "KEY_DOUT/CIRAMCE" pinC6
#define C11bank GPIOC
#define C11 (6U)
//C12 "BOOTLOAD" pinD6
#define C12bank GPIOD
#define C12 (6U)
//C13 "SWDIO/CIRAMA10" pinD5
#define C13bank GPIOD
#define C13 (5U)
////C14 "SWCLK" pinA14
//#define C14bank GPIOA
//#define C14 (14U)
//C15 "IRQ" pinD3
#define C15bank GPIOD
#define C15 (3U)
#endif
//pinport abstraction layer pin mappings roughly based on inl6 schematic
//C0 "ROMSEL"
//C1 "R/W"
//C2 "/RD"
//C3 "/WR"
//C4 "AUDIO_L"
//C5 "AUDIO_R"
//C6 "CART_RST"
//C7 "KEY_DIN"
//C8 "CLK_OUT"
//C9 "FLIPFLOP"
//C10 "LED"
//C11 "KEY_DOUT"
//C12 "BOOTLOAD"
//C13 "SWDIO"
//C14 "SWCLK"
//C15 "IRQ"
#define LED C10
#define LEDbank C10bank
#ifdef STM_CORE
// 00- Input (default reset state, except SWC-PA15 & SWD-PA13 default AF)
// 01- Gen Purp Output
// Assume MODER[1] is clear (default setting, only gets set of AF)
// Assume PUPDR[1] is clear (default setting, only set if pulldown enabled)
#define PCb_IP_PU(bank, pin) bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR |= (PUPDR_PU<<(pin*2))
#define PCb_IP_FLT(bank, pin) bank->MODER &= ~(MODER_OP<<(pin*2)); bank->PUPDR &= ~(PUPDR_PU<<(pin*2))
#define PCb_OP_EN(bank, pin) bank->MODER |= (MODER_OP<<(pin*2))
#define PCb_READ(bank, pin, val) val = (bank->IDR & (1<<pin))
#define PCb_SET_HI(bank, pin) bank->BSRR = 1<<pin
// PCb_SET_HI(C0bank, C0)
#define PCb_SET_LO(bank, pin) bank->BRR = 1<<pin
#endif //STM_CORE
#ifdef AVR_CORE
#define PCb_IP_PU(bank, pin) bank->DDR &= ~(1<<pin); bank->PORT |= (1<<pin)
#define PCb_IP_FLT(bank, pin) bank->DDR &= ~(1<<pin); bank->PORT &= ~(1<<pin)
#define PCb_OP_EN(bank, pin) bank->DDR |= (1<<pin)
#define PCb_READ(bank, pin, val) val = (bank->PIN & (1<<pin))
#define PCb_SET_HI(bank, pin) bank->PORT |= (1<<pin)
#define PCb_SET_LO(bank, pin) bank->PORT &= ~(1<<pin)
#endif //AVR_CORE
#endif

1
firmware/source/usb.c
View File

@ -48,6 +48,7 @@ USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]) {
uint16_t usbFunctionSetup(uint8_t data[8]) {
#endif
//defined and controled by buffer.c
// extern buffer *cur_usb_load_buff;

2
firmware/source/usb.h
View File

@ -21,6 +21,8 @@
#endif
//end STM CORE
#include "pinport_al.h"
/*
#include "shared_dictionaries.h"
#include "types.h"

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host/source/pindef.h → host/source/old/pindef.h
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